PHE13005,127

TO -2 20A B PHE13005 Silicon diffused power transistor 21 January 2014 Product data sheet 1. General description High voltage, high speed NPN planar-passivated power switching transistor in a SOT78 plastic package intended for use in high frequency electronic lighting ballast applications 2. Features and benefits • • • Fast switching High voltage capability of 700 V Low thermal resistance 3. Applications • Electronic lighting ballasts 4. Quick reference data Table 1. Quick reference data Symbol Parameter Conditions Min Typ Max Unit IC collector current DC; Fig. 4; Fig. 1; Fig. 2 - - 4 A Ptot total power dissipation Tmb ≤ 25 °C; Fig. 3 - - 75 W VCESM collector-emitter peak voltage VBE = 0 V - - 700 V IC = 1 A; VCE = 5 V; Tmb = 25 °C; 12 20 40 10 17 28 Static characteristics hFE DC current gain Fig. 11 IC = 2 A; VCE = 5 V; Tmb = 25 °C; Fig. 11 Scan or click this QR code to view the latest information for this product PHE13005 NXP Semiconductors Silicon diffused power transistor 5. Pinning information Table 2. Pinning information Pin Symbol Description Simplified outline 1 B base 2 C collector 3 E emitter mb C mounting base; connected to collector Graphic symbol C mb B E sym123 1 2 3 TO-220AB (SOT78) 6. Ordering information Table 3. Ordering information Type number Package PHE13005 Name Description Version TO-220AB plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Conditions Min Max Unit VCESM collector-emitter peak voltage VBE = 0 V - 700 V VCBO collector-base voltage IE = 0 A - 700 V VCEO collector-emitter voltage IB = 0 A - 400 V IC collector current DC; Fig. 4; Fig. 1; Fig. 2 - 4 A ICM peak collector current - 8 A IB base current - 2 A IBM peak base current - 4 A Ptot total power dissipation - 75 W Tstg storage temperature -65 150 °C Tj junction temperature - 150 °C VEBO emitter-base voltage - 9 V PHE13005 Product data sheet DC Tmb ≤ 25 °C; Fig. 3 IC = 0 A All information provided in this document is subject to legal disclaimers. 21 January 2014 © NXP N.V. 2014. All rights reserved 2 / 12 PHE13005 NXP Semiconductors Silicon diffused power transistor VCC LC IBon VBB LB IC (A) VCL(CE) probe point 6 DUT 001aab999 Fig. 1. 003aad544 8 VBE = - 5V 4 Test circuit for reverse bias safe operating area 2 0 Fig. 2. 0 200 400 600 800 VCL(CE) (V) Reverse bias safe operating area 03aa13 120 Pder (%) 80 40 0 Fig. 3. 0 50 100 150 Th (°C) 200 Normalized total power dissipation as a function of heatsink temperature PHE13005 Product data sheet All information provided in this document is subject to legal disclaimers. 21 January 2014 © NXP N.V. 2014. All rights reserved 3 / 12 PHE13005 NXP Semiconductors Silicon diffused power transistor 001aai071 102 IC (A) duty cycle = 0.01 10 ICM(max) IC(max) tp = 20 µs (4) (1) 1 50 µs 100 µs 200 µs 500 µs DC (2) 10- 1 (3) 10- 2 (5) 10- 3 Fig. 4. 1 102 10 103 VCL(CE) (V) Forward bias safe operating area 8. Thermal characteristics Table 5. Thermal characteristics Symbol Parameter Conditions Min Typ Max Unit Rth(j-mb) thermal resistance from junction to mounting base Fig. 5 - - 1.67 K/W Rth(j-a) thermal resistance from junction to ambient in free air - 60 - K/W 003aad543 10 Zth(j-mb) (K/W) 1 δ = 0.5 0.2 0.1 10- 1 0.05 0.02 P δ= 0.01 tp 10- 2 10- 5 Fig. 5. tp 1/f 10- 4 10- 3 10- 2 10- 1 1 t 1/f tp (s) 10 Transient thermal impedance from junction to mounting base as a function of pulse duration PHE13005 Product data sheet All information provided in this document is subject to legal disclaimers. 21 January 2014 © NXP N.V. 2014. All rights reserved 4 / 12 PHE13005 NXP Semiconductors Silicon diffused power transistor 9. Characteristics Table 6. Characteristics Symbol Parameter Conditions Min Typ Max Unit IC = 2 A; IBon = 0.4 A; IBoff = -0.4 A; - 2.7 4 µs - 1.2 2 µs - 1.4 4 µs - 0.3 0.9 µs - 0.1 0.5 µs - 0.16 0.9 µs collector-emitter cut-off VBE = -1.5 V; VCE = 700 V; Tj = 25 °C current VBE = -1.5 V; VCE = 700 V; Tj = 100 °C - - 1 mA - - 5 mA ICBO collector-base cut-off current VCB = 700 V; IE = 0 A; Tmb = 25 °C - - 1 mA ICEO collector-emitter cut-off VCE = 400 V; IB = 0 A; Tmb = 25 °C current - - 0.1 mA IEBO emitter-base cut-off current VEB = 9 V; IC = 0 A; Tmb = 25 °C - - 1 mA VCEOsus collector-emitter sustaining voltage IB = 0 A; IC = 10 mA; LC = 25 mH; 400 - - V collector-emitter saturation voltage IC = 1 A; IB = 0.2 A; Tmb = 25 °C; Fig. 8; - 0.1 0.5 V - 0.2 0.6 V - 0.3 1 V - 0.85 1.2 V Dynamic characteristics ts storage time RL = 75 Ω; Tmb = 25 °C; resistive load; Fig. 12; Fig. 13 IC = 2 A; IBon = 0.4 A; VBB = -5 V; LB = 1 µH; Tmb = 25 °C; inductive load; Fig. 14; Fig. 15 IC = 2 A; IBon = 0.4 A; VBB = -5 V; LB = 1 µH; Tmb = 100 °C; inductive load; Fig. 14; Fig. 15 tf fall time IC = 2 A; IBon = 0.4 A; IBoff = -0.4 A; RL = 75 Ω; Tmb = 25 °C; resistive load; Fig. 12; Fig. 13 IC = 2 A; IBon = 0.4 A; VBB = -5 V; LB = 1 µH; Tmb = 25 °C; inductive load; Fig. 14; Fig. 15 IC = 2 A; IBon = 0.4 A; VBB = -5 V; LB = 1 µH; Tmb = 100 °C; inductive load; Fig. 14; Fig. 15 Static characteristics ICES VCEsat Tmb = 25 °C; Fig. 6; Fig. 7 Fig. 9 IC = 2 A; IB = 0.5 A; Tmb = 25 °C; Fig. 8; Fig. 9 IC = 4 A; IB = 1 A; Tmb = 25 °C; Fig. 8; Fig. 9 VBEsat base-emitter saturation IC = 1 A; IB = 0.2 A; Tmb = 25 °C; voltage Fig. 10 PHE13005 Product data sheet All information provided in this document is subject to legal disclaimers. 21 January 2014 © NXP N.V. 2014. All rights reserved 5 / 12 PHE13005 NXP Semiconductors Silicon diffused power transistor Symbol Parameter Conditions Min Typ Max Unit IC = 2 A; IB = 0.5 A; Tmb = 25 °C; - 0.92 1.6 V 12 20 40 10 17 28 Fig. 10 hFE IC = 1 A; VCE = 5 V; Tmb = 25 °C; DC current gain Fig. 11 IC = 2 A; VCE = 5 V; Tmb = 25 °C; Fig. 11 IC (mA) 50 V 100 Ω to 200 Ω horizontal oscilloscope 250 vertical 6V 300 Ω 1Ω 100 30 Hz to 60 Hz Fig. 6. 001aab987 Test circuit for collector-emitter sustaining voltage 10 0 min VCE (V) VCEOsus 001aab988 Fig. 7. 003aad540 2.0 VCEsat (V) 1.6 Oscilloscope display for collector-emitter sustaining voltage test waveform IC = 1 A 2A 003aad542 VCEsat (V) 1.0 3A 4A 0.8 1.2 0.6 0.8 0.4 0.4 0 10- 2 Fig. 8. 0.2 10- 1 1 IB (A) 0 10- 1 10 Collector-emitter saturation voltage; typical values PHE13005 Product data sheet Fig. 9. IC (A) 10 Collector-emitter saturation voltage as a function of collector current; typical values All information provided in this document is subject to legal disclaimers. 21 January 2014 1 © NXP N.V. 2014. All rights reserved 6 / 12 PHE13005 NXP Semiconductors Silicon diffused power transistor 003aad541 1.4 VBEsat (V) 1.2 003aad539 102 hFE VCE = 5 V 1.0 0.8 1V 10 0.6 0.4 0.2 0 10- 1 1 IC (A) 1 10- 2 10 Fig. 10. Base-emitter saturation voltage; typical values VIM 0 RB 1 10 IC (A) Fig. 11. DC current gain as a function of collector current; typical values VCC RL 10- 1 IC ICon 90 % 90 % DUT 10 % tp T 001aab989 IB Fig. 12. Test circuit for resistive load switching ts ton tf t toff IBon 10 % t tr ≤ 30 ns - IBoff 001aab990 Fig. 13. Switching times waveforms for resistive load PHE13005 Product data sheet All information provided in this document is subject to legal disclaimers. 21 January 2014 © NXP N.V. 2014. All rights reserved 7 / 12 PHE13005 NXP Semiconductors Silicon diffused power transistor VCC IC ICon 90 % LC IBon VBB LB DUT 001aab991 10 % Fig. 14. Test circuit for inductive load switching IB ts toff t tf IBon t - IBoff 001aab992 Fig. 15. Switching times waveforms for inductive load PHE13005 Product data sheet All information provided in this document is subject to legal disclaimers. 21 January 2014 © NXP N.V. 2014. All rights reserved 8 / 12 PHE13005 NXP Semiconductors Silicon diffused power transistor 10. Package outline Plastic single-ended package; heatsink mounted; 1 mounting hole; 3-lead TO-220AB SOT78 E A A1 p q mounting base D1 D L1(1) L2(1) Q L b1(2) (3×) b2(2) (2×) 1 2 3 b(3×) e c e 0 5 10 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 b b1(2) b2(2) c D D1 E e L L1(1) L2(1) max. p q Q mm 4.7 4.1 1.40 1.25 0.9 0.6 1.6 1.0 1.3 1.0 0.7 0.4 16.0 15.2 6.6 5.9 10.3 9.7 2.54 15.0 12.8 3.30 2.79 3.0 3.8 3.5 3.0 2.7 2.6 2.2 Notes 1. Lead shoulder designs may vary. 2. Dimension includes excess dambar. OUTLINE VERSION SOT78 REFERENCES IEC JEDEC JEITA 3-lead TO-220AB SC-46 EUROPEAN PROJECTION ISSUE DATE 08-04-23 08-06-13 Fig. 16. Package outline TO-220AB (SOT78) PHE13005 Product data sheet All information provided in this document is subject to legal disclaimers. 21 January 2014 © NXP N.V. 2014. All rights reserved 9 / 12 PHE13005 NXP Semiconductors Silicon diffused power transistor In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. 11. 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This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 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NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the All information provided in this document is subject to legal disclaimers. 21 January 2014 © NXP N.V. 2014. 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Contents 1 General description ............................................... 1 2 Features and benefits ............................................1 3 Applications ........................................................... 1 4 Quick reference data ............................................. 1 5 Pinning information ............................................... 2 6 Ordering information ............................................. 2 7 Limiting values .......................................................2 8 Thermal characteristics .........................................4 9 Characteristics ....................................................... 5 10 Package outline ..................................................... 9 11 11.1 11.2 11.3 11.4 Legal information .................................................10 Data sheet status ............................................... 10 Definitions ...........................................................10 Disclaimers .........................................................10 Trademarks ........................................................ 11 © NXP N.V. 2014. All rights reserved For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 21 January 2014 PHE13005 Product data sheet All information provided in this document is subject to legal disclaimers. 21 January 2014 © NXP N.V. 2014. All rights reserved 12 / 12