Fremont Micro Devices
FT24C02A-EXX
Two-Wire Serial EEPROM
2K (8-bit wide)
FEATURES
Low voltage and low power operations:
FT24C02A-EXX: VCC = 1.8V to 5.5V, Industrial temperature range (-40℃ to 85℃).
Maximum Standby current < 1µA (typically 0.02µA and 0.06µ A @ 1.8V and 5.5V respectively).
16 bytes page write mode.
Partial page write operation allowed.
Internally organized: 256 × 8 (2K).
Standard 2-wire bi-directional serial interface.
Schmitt trigger, filtered inputs for noise protection.
Self-timed programming cycle (5ms maximum).
1 MHz (2.5-5V), 400 kHz (1.8V) Compatibility.
Automatic erase before write operation.
High reliability: typically 1,000,000 cycles endurance.
100 years data retention.
Standard 8-pin DIP/SOP/MSOP/TSSOP/DFN and 5-pin SOT-23/TSOT-23 Pb-free packages.
en
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on
DESCRIPTION
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The FT24C02A-EXX is 2048 bits of serial Electrical Erasable and Programmable Read Only Memory,
commonly known as EEPROM. They are organized as 256 words of 8 bits (1 byte) each. The devices are
C
fabricated with proprietary advanced CMOS process for low power and low voltage applications. These
devices are available in standard 8-lead DIP, 8-lead SOP, 8-lead MSOP, 8-lead TSSOP, 8-lead DFN and
5-lead SOT-23/TSOT-23 packages. A standard 2-wire serial interface is used to address all read and write
FM
D
functions. Our extended VCC range (1.8V to 5.5V) devices enables wide spectrum of applications.
© 2016 Fremont Micro Devices Inc.
Confidential Rev1.0
FT24C02A-EXX-page1
Fremont Micro Devices
FT24C02A-EXX
PIN CONFIGURATION
Pin Name
Pin Function
A2, A1, A0
SDA
SCL
Device Address Inputs
Serial Data Input / Open Drain Output
Serial Clock Input
Power Supply
Ground
No-Connect
Table 1
All these packaging types come in conventional or Pb-free certified.
FT24C02A-EXX
8
2
7
3
6
4
5
DIP
SOP
TSSOP
DFN
MSOP
SCL
GND
SDA
1
5
NC
4
VCC
2
3
5L SOT-23
5L TSOT-23
on
8L
8L
8L
8L
8L
VCC
NC
SCL
SDA
en
1
FT24C02A-EXX
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A0
A1
A2
GND
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VCC
GND
NC
FM
D
C
Figure 1: Package types
© 2016 Fremont Micro Devices Inc.
Confidential Rev1.0
FT24C02A-EXX-page2
Fremont Micro Devices
FT24C02A-EXX
ABSOLUTE MAXIMUM RATINGS
Industrial operating temperature:
-40℃ to 85℃
Storage temperature:
-50℃ to 125℃
Input voltage on any pin relative to ground:
-0.3V to VCC + 0.3V
Maximum voltage:
8V
ESD protection on all pins:
>2000V
Pgm High Voltage
Generation
Start/Stop
Control Logic
FM
D
C
A0
A1
A2
Data Address
Counter
Slave Address
Monitor
Row
Decoder
on
SCL
Page Data Latch
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Serial Bus
Control Logic
en
SDA
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* Stresses exceed those listed under “Absolute Maximum Rating” may cause permanent damage to the
device. Functional operation of the device at conditions beyond those listed in the specification is not
guaranteed. Prolonged exposure to extreme conditions may affect device reliability or functionality.
© 2016 Fremont Micro Devices Inc.
EEPROM
ARRAY
Column Decoder
Data Reg
Sense Amp
Dataout/ACK
Figure 2: Block Diagram
Confidential Rev1.0
FT24C02A-EXX-page3
Fremont Micro Devices
FT24C02A-EXX
PIN DESCRIPTIONS
(A) SERIAL CLOCK (SCL)
The rising edge of this SCL input is to latch data into the EEPROM device while the falling edge of
this clock is to clock data out of the EEPROM device.
(B) SERIAL DATA LINE (SDA)
SDA data line is a bi-directional signal for the serial devices. It is an open drain output signal and can
(C) DEVICE / CHIP SELECT ADDRESSES (A2, A1, A0)
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be wired-OR with other open-drain output devices.
en
These are the chip select input signals for the serial EEPROM devices. Typically, these signals are
hardwired to either VIH or VIL. If left unconnected, they are internally recognized as VIL.
MEMORY ORGANIZATION
The FT24C02A-EXX devices have 16 pages. Since each page has 16 bytes, random word addressing to
fid
FT24C02A-EXX will require 8 bits data word addresses.
DEVICE OPERATION
on
(A) SERIAL CLOCK AND DATA TRANSITIONS
The SDA pin is typically pulled to high by an external resistor. Data is allowed to change only when
Serial clock SCL is at VIL. Any SDA signal transition may interpret as either a START or STOP
C
condition as described below.
(B) START CONDITION
With SCL ≥ VIH, a SDA transition from high to low is interpreted as a START condition. All valid
FM
D
commands must begin with a START condition.
(C) STOP CONDITION
With SCL ≥ VIH, a SDA transition from low to high is interpreted as a STOP condition. All valid read
or write commands end with a STOP condition. The device goes into the STANDBY mode if it is after
a read command. A STOP condition after page or byte write command will trigger the chip into the
STANDBY mode after the self-timed internal programming finish.
(D) ACKNOWLEDGE
The 2-wire protocol transmits address and data to and from the EEPROM in 8 bit words. The
EEPROM acknowledges the data or address by outputting a "0" after receiving each word. The
ACKNOWLEDGE signal occurs on the 9th serial clock after each word.
© 2016 Fremont Micro Devices Inc.
Confidential Rev1.0
FT24C02A-EXX-page4
Fremont Micro Devices
FT24C02A-EXX
(E) STANDBY MODE
The EEPROM goes into low power STANDBY mode after a fresh power up, after receiving a STOP bit
in read mode, or after completing a self-time internal programming operation.
SCL
Data
Valid
Data
Transition
STOP
Condition
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START
Condition
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SDA
Figure 3: Timing diagram for START and STOP conditions
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START Condition
C
Data in
on
SCL
FM
D
Data out
ACK
Figure 4: Timing diagram for output ACKNOWLEDGE
© 2016 Fremont Micro Devices Inc.
Confidential Rev1.0
FT24C02A-EXX-page5
Fremont Micro Devices
FT24C02A-EXX
DEVICE ADDRESSING
The 2-wire serial bus protocol mandates an 8 bits device address word after a START bit condition to invoke
a valid read or write command. The first four most significant bits of the device address must be 1010,
which is common to all serial EEPROM devices. The next three bits are device address bits. These three
th
th
th
device address bits (5 , 6 and 7 ) are to match with the external chip select/address pin states. If a match
th
is made, the EEPROM device outputs an ACKNOWLEDGE signal after the 8 read/write bit, otherwise the
chip will go into STANDBY mode. However, matching may not be needed for some or all device address
th
th
th
bits (5 , 6 and 7 ) as noted below. The last or 8th bit is a read/write command bit. If the 8th bit is at V IH
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then the chip goes into read mode. If a “0” is detected, the device enters programming mode.
WRITE OPERATIONS
(A) BYTE WRITE
en
A byte write operation starts when a micro-controller sends a START bit condition, follows by a proper
EEPROM device address and then a write command. If the device address bits match the chip select
th
address, the EEPROM device will acknowledge at the 9 clock cycle. The micro-controller will then
th
send the rest of the lower 8 bits word address. At the 18 cycle, the EEPROM will acknowledge the
The micro-controller will then transmit the 8 bit data. Following an
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8-bit address word.
th
ACKNOWLDEGE signal from the EEPROM at the 27 clock cycle, the micro-controller will issue a
STOP bit. After receiving the STOP bit, the EEPROM will go into a self-timed programming mode
on
during which all external inputs will be disabled.
After a programming time of T WC, the byte
programming will finish and the EEPROM device will return to the STANDBY mode.
(B) PAGE WRITE
C
A page write is similar to a byte write with the exception that one to sixteen bytes can be programmed
along the same page or memory row.
All FT24C02A-EXX are organized to have 16 bytes per
memory row or page.
FM
D
With the same write command as the byte write, the micro-controller does not issue a STOP bit after
st
sending the 1 byte data and receiving the ACKNOWLEDGE signal from the EEPROM on the 27
th
clock cycle. Instead it sends out a second 8-bit data word, with the EEPROM acknowledging at the
th
36 cycle. This data sending and EEPROM acknowledging cycle repeats until the micro-controller
th
sends a STOP bit after the n × 9 clock cycle. After which the EEPROM device will go into a self-
timed partial or full page programming mode. After the page programming completes after a time of
TWC, the devices will return to the STANDBY mode.
The least significant 4 bits of the word address (column address) increments internally by one after
receiving each data word. The rest of the word address bits (row address) do not change internally,
but pointing to a specific memory row or page to be programmed. The first page write data word can
be of any column address. Up to 16 data words can be loaded into a page. If more then 16 data
th
st
th
words are loaded, the 9 data word will be loaded to the 1 data word column address. The 10 data
word will be loaded to the 2
nd
data word column address and so on. In other word, data word address
(column address) will “roll” over the previously loaded data.
© 2016 Fremont Micro Devices Inc.
Confidential Rev1.0
FT24C02A-EXX-page6
Fremont Micro Devices
FT24C02A-EXX
(C) ACKNOWLEDGE POLLING
ACKNOWLEDGE polling may be used to poll the programming status during a self-timed internal
programming. By issuing a valid read or write address command, the EEPROM will not acknowledge
at the 9
th
clock cycle if the device is still in the self-timed programming mode.
However, if the
programming completes and the chip has returned to the STANDBY mode, the device will return a
th
valid ACKNOWLEDGE signal at the 9 clock cycle.
th
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READ OPERATIONS
The read command is similar to the write command except the 8 read/write bit in address word is set to “1”.
The three read operation modes are described as follows:
(A) CURRENT ADDRESS READ
en
The EEPROM internal address word counter maintains the last read or write address plus one if the
power supply to the device has not been cut off. To initiate a current address read operation, the
th
micro-controller issues a START bit and a valid device address word with the read/write bit (8 ) set to
th
“1”. The EEPROM will response with an ACKNOWLEDGE signal on the 9 serial clock cycle. An 8automatically increase by one.
The internal address word counter will then
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bit data word will then be serially clocked out.
For current address read the micro-controller will not issue an
th
ACKNOWLEDGE signal on the 18 clock cycle. The micro-controller issues a valid STOP bit after
th
(B) SEQUENTIAL READ
on
the 18 clock cycle to terminate the read operation. The device then returns to STANDBY mode.
The sequential read is very similar to current address read. The micro-controller issues a START bit
th
C
and a valid device address word with read/write bit (8 ) set to “1”. The EEPROM will response with
an ACKNOWLEDGE signal on the 9
th
serial clock cycle. An 8-bit data word will then be serially
clocked out. Meanwhile the internally address word counter will then automatically increase by one.
th
FM
D
Unlike current address read, the micro-controller sends an ACKNOWLEDGE signal on the 18 clock
cycle signaling the EEPROM device that it wants another byte of data.
Upon receiving the
ACKNOWLEDGE signal, the EEPROM will serially clocked out an 8-bit data word based on the
incremented internal address counter. If the micro-controller needs another data, it sends out an
th
ACKNOWLEDGE signal on the 27 clock cycle. Another 8-bit data word will then be serially clocked
out. This sequential read continues as long as the micro-controller sends an ACKNOWLEDGE signal
after receiving a new data word. When the internal address counter reaches its maximum valid
address, it rolls over to the beginning of the memory array address. Similar to current address read,
the micro-controller can terminate the sequential read by not acknowledging the last data word
received, but sending a STOP bit afterwards instead.
© 2016 Fremont Micro Devices Inc.
Confidential Rev1.0
FT24C02A-EXX-page7
Fremont Micro Devices
FT24C02A-EXX
(C) RANDOM READ
Random read is a two-steps process. The first step is to initialize the internal address counter with a
target read address using a “dummy write” instruction. The second step is a current address read.
To initialize the internal address counter with a target read address, the micro-controller issues a
th
START bit first, follows by a valid device address with the read/write bit (8 ) set to “0”. The EEPROM
will then acknowledge. The micro-controller will then send the address word. Again the EEPROM
will acknowledge. Instead of sending a valid written data to the EEPROM, the micro-controller
performs a current address read instruction to read the data. Note that once a START bit is issued,
- which is to read the current address.
W
T
R
A
I
D E V IC E
R
ADDRESS
T
S
T
W ORD
T
O
DATA
ADDRESS
E
P
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S
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the EEPROM will reset the internal programming process and continue to execute the new instruction
S D A L IN E
M
L R A M
L A
A
S
S / C S
S C
C
B
B W K B
B K
K
S
fid
Figure 5: Byte Write
W
R
A
on
T
S
T
I
D E V IC E
R
S D A L IN E
M
S
B
T
O
D A T A (N )
A D D R E S S (N )
E
P
D A T A (N + X )
...
L R A M
L A
A
A
S / C S
S C
C
C
B W K B
B K
K
K
C
ADDRESS
T
W ORD
FM
D
Figure 6: Page Write
S
R
T
S
E
A
R
T
D E V IC E
A
ADDRESS
D
T
O
DATA
P
S D A L IN E
M
L R A
N
S
S
O
B
B W K
/ C
A
C
K
Figure 7: Current Address Read
© 2016 Fremont Micro Devices Inc.
Confidential Rev1.0
FT24C02A-EXX-page8
Fremont Micro Devices
FT24C02A-EXX
R
S
E
D E V IC E
A
ADDRESS
D
T
O
D A T A (N )
D A T A (N + 1 )
D A T A (N + 2 )
D A T A (N + 3 )
P
S D A L IN E
R A
A
A
A
N
/ C
C
C
C
O
W K
K
K
K
A
C
K
Figure 8: Sequential Read
W
T
R
T
A
I
A
D E V IC E
R
W ORD
T
ADDRESS
T
S
S
E
R
A D D R E S S (N )
E
R
T
D E V IC E
A
ADDRESS
D
S D A L IN E
M
L R A M
L A
M
L R A
S
S
/ C S
S C
S
S
B
B W K B
B K
B
B W K
/ C
T
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S
O
D A T A (N )
P
N
O
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A
C
K
FM
D
C
on
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Figure 9: Random Read
© 2016 Fremont Micro Devices Inc.
Figure 10: SCL and SDA Bus Timing
Confidential Rev1.0
FT24C02A-EXX-page9
Fremont Micro Devices
FT24C02A-EXX
AC CHARACTERISTICS
1.8 V
Parameter
Min
fSCL
tLOW
tHIGH
tI
tAA
Clock frequency, SCL
tHD.STA
tSU.STA
tHD.DAT
tSU.DAT
tR
tF
tSU.STO
tDH
0.6
Data in hold time
µs
ns
0.55
µs
0.5
0.6
µs
0.25
µs
0.25
µs
0
µs
100
ns
(1)
0.3
0.3
µs
300
100
ns
STOP set-up time
0.6
0.25
µs
Date out hold time
50
50
ns
o
25 C, Page Mode, 3.3V
fid
Endurance
0.2
1.3
100
(1)
Write cycle time
(1)
0.9
50
en
Input fall time
µs
0.4
0
Data in set-up time
WR
5
1,000,000
5
ms
Write Cycles
1. This Parameter is expected by characterization but is not fully screened by test.
on
Notes*:
START set-up time
kHz
0.4
50
0.2
Unit
Max
1000
0.6
(1)
Clock low to data out valid
Time the bus must be free
before a new transmission can
(1)
start
START hold time
Input rise time
Min
1.3
Clock pulse width high
tBUF
Max
400
Clock pulse width low
Noise suppression time
2.5-5.0 V
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Symbol
2. AC Measurement conditions:
RL (Connects to Vcc): 1.3KΩ
C
Input Pulse Voltages: 0.3Vcc to 0.7Vcc
FM
D
Input and output timing reference Voltages: 0.5Vcc
© 2016 Fremont Micro Devices Inc.
Confidential Rev1.0
FT24C02A-EXX-page10
Fremont Micro Devices
FT24C02A-EXX
DC CHARACTERISTICS
Symbol
Parameter
Test Conditions
Min
Typical
Max
Unit
s
5.5
V
VCC1
Power supply VCC
ICC
Supply read current
VCC @ 5.0V SCL = 400 kHz
0.5
1.0
mA
ICC
Supply write current
VCC @ 5.0V SCL = 400 kHz
2.0
3.0
mA
ISB1
Supply current
VCC @ 1.8V, VIN = VCC or VSS
1.0
µA
ISB2
Supply current
VCC @ 2.5V, VIN = VCC or VSS
1.0
µA
ISB3
Supply current
VCC @ 5.0V, VIN = VCC or VSS
1.0
µA
IIL
Input leakage current
Output leakage
current
VIN = VCC or VSS
3.0
µA
VIN = VCC or VSS
3.0
µA
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ILO
1.8
Input low level
-0.6
VCC × 0.3
V
VIH
Input high level
VCC × 0.7
VCC + 0.5
V
VOL1
Output low level
VCC @ 1.8V, IOL = 0.15 mA
VOL2
Output low level
VCC @ 3.0V, IOL = 2.1 mA
0.2
V
0.4
V
FM
D
C
on
fid
en
VIL
© 2016 Fremont Micro Devices Inc.
Confidential Rev1.0
FT24C02A-EXX-page11
Fremont Micro Devices
FT24C02A-EXX
ORDER CODE:
FT24C02A - E X X - X
Circuit Type
Packaging
B: Tube
T: Tape and Reel
HSF
R: RoHS
G: RoHS and Halogen Free
Temp. Range
E: -40℃-85℃
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Package
D: DIP8
S: SOP8
M: MSOP8
T: TSSOP8
L: SOT23-5
P: TSOT23-5
N: DFN8
Temperature
Range
Vcc
SOT23-5
-40℃-85℃
1.8V-5.5V
TSOT23-5
-40℃-85℃
1.8V-5.5V
DIP8
-40℃-85℃
1.8V-5.5V
C
-40℃-85℃
TSSOP8
DFN8
-40℃-85℃
-40℃-85℃
Packaging
Order code
RoHS
Tape and Reel
FT24C02A-ELR-T
Green
Tape and Reel
FT24C02A-ELG-T
RoHS
Tape and Reel
FT24C02A-EPR-T
Green
Tape and Reel
FT24C02A-EPG-T
RoHS
Tube
FT24C02A-EDR-B
Green
Tube
FT24C02A-EDG-B
Tube
FT24C02A-ESR-B
RoHS
Tape and Reel
FT24C02A-ESR-T
Tube
FT24C02A-ESG-B
Tape and Reel
FT24C02A-ESG-T
Tube
FT24C02A-ETR-B
Tape and Reel
FT24C02A-ETR-T
Tube
FT24C02A-ETG-B
Tape and Reel
FT24C02A-ETG-T
RoHS
Tape and Reel
FT24C02A-ENR-T
Green
Tape and Reel
FT24C02A-ENG-T
1.8V-5.5V
FM
D
SOP8
HSF
on
Package
fid
ORDER INFORMATION
Green
RoHS
1.8V-5.5V
1.8V-5.5V
© 2016 Fremont Micro Devices Inc.
Green
Confidential Rev1.0
FT24C02A-EXX-page12
Fremont Micro Devices
FT24C02A-EXX
Symbol
Dimensions In Millimeters
Dimensions In Inches
Min
Max
Min
Max
1.050
1.250
0.041
0.049
FM
D
A
C
on
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SOT-23-5 PACKAGE OUTLINE DIMENSIONS
A1
0.000
0.100
0.000
0.004
A2
1.050
1.150
0.041
0.045
b
0.300
0.500
0.012
0.020
c
0.100
0.200
0.004
0.008
D
2.820
3.020
0.111
0.119
E
1.500
1.700
0.059
0.067
E1
2.650
2.950
0.104
0.116
e
0.95 (BSC)
0.037 (BSC)
e1
1.800
2.000
0.071
0.079
L
0.300
0.600
0.012
0.024
0°
8°
0°
6°
© 2016 Fremont Micro Devices Inc.
Confidential Rev1.0
FT24C02A-EXX-page13
Fremont Micro Devices
FT24C02A-EXX
A
A1
Dimensions In Inches
Min
Max
Min
Max
0.700
0.900
0.028
0.035
0.000
0.100
0.000
0.004
0.700
0.800
0.028
0.031
FM
D
A2
Dimensions In Millimeters
C
Symbol
on
fid
en
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TSOT-23-5 PACKAGE OUTLINE DIMENSIONS
b
0.350
0.500
0.014
0.020
c
0.080
0.200
0.003
0.008
D
2.820
3.020
0.111
0.119
E
1.600
1.700
0.063
0.067
E1
2.650
2.950
0.104
0.116
e
0.95 (BSC)
0.037 (BSC)
e1
1.90 (BSC)
0.075 (BSC)
L
0.300
0.600
0.012
0.024
0°
8°
0°
8°
© 2016 Fremont Micro Devices Inc.
Confidential Rev1.0
FT24C02A-EXX-page14
Fremont Micro Devices
FT24C02A-EXX
Symbol
fid
en
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DIP8 PACKAGE OUTLINE DIMENSIONS
Dimensions In Millimeters
Max
Min
Max
4.310
0.146
0.170
on
Min
Dimensions In Inches
3.710
0.510
A2
3.200
3.600
0.126
0.142
B
0.380
0.570
0.015
0.022
B1
C
A
A1
0.020
1.524(BSC)
0.204
0.360
0.060(BSC)
0.008
0.014
D
9.000
9.400
0.354
0.370
E
6.200
6.600
0.244
0.260
E1
7.320
7.920
0.288
0.312
FM
D
C
e
2.540 (BSC)
L
3.000
3.600
0.100(BSC)
0.118
0.142
E2
8.400
9.000
0.331
© 2016 Fremont Micro Devices Inc.
Confidential Rev1.0
0.354
FT24C02A-EXX-page15
Fremont Micro Devices
FT24C02A-EXX
Dimensions In Millimeters
C
Symbol
on
fid
en
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SOP8 PACKAGE OUTLINE DIMENSIONS
Dimensions In Inches
Min
Max
Min
Max
1.350
1.750
0.053
0.069
0.100
0.250
0.004
0.010
A2
1.350
1.550
0.053
0.061
b
0.330
0.510
0.013
0.020
c
0.170
0.250
0.006
0.010
D
4.700
5.100
0.185
0.200
E
3.800
4.000
0.150
0.157
E1
5.800
6.200
0.228
0.244
A
FM
D
A1
e
1.270 (BSC)
0.050 (BSC)
L
0.400
1.270
0.016
0.050
θ
0°
8°
0°
8°
© 2016 Fremont Micro Devices Inc.
Confidential Rev1.0
FT24C02A-EXX-page16
Fremont Micro Devices
FT24C02A-EXX
Dimensions In Millimeters
Min
FM
D
Symbol
C
on
fid
en
tia
l
TSSOP8 PACKAGE OUTLINE DIMENSIONS
Dimensions In Inches
Max
Min
Max
D
2.900
3.100
0.114
0.122
E
4.300
4.500
0.169
0.177
b
0.190
0.300
0.007
0.012
c
0.090
0.200
0.004
0.008
E1
6.250
6.550
0.246
0.258
A
1.100
0.043
A2
0.800
1.000
0.031
0.039
A1
0.020
0.150
0.001
0.006
e
L
0.65 (BSC)
0.500
H
θ
0.026 (BSC)
0.700
0.020
7°
1°
0.25 (TYP)
1°
© 2016 Fremont Micro Devices Inc.
0.028
0.01 (TYP)
Confidential Rev1.0
7°
FT24C02A-EXX-page17
Fremont Micro Devices
FT24C02A-EXX
fid
en
tia
l
DFN8 PACKAGE OUTLINE DIMENSIONS
A
Min
Dimensions In Millimeters
Nom
Max
0.70
0.75
0.80
0.05
on
Symbol
-
0.02
b
0.18
0.25
0.30
c
0.18
0.20
0.25
D
1.90
2.00
2.10
C
A1
1.50REF
e
0.50BSC
Nd
1.50BSC
FM
D
D2
E
2.90
3.00
3.10
L
0.30
1.60REF
0.40
0.50
h
0.20
0.25
0.30
E2
L/F Surface Electroplate
NIPdAu (Nickel, Pd, Metal)
Dimension(mil)
67*75
© 2016 Fremont Micro Devices Inc.
Confidential Rev1.0
FT24C02A-EXX-page18
Fremont Micro Devices
FT24C02A-EXX
Fremont Micro Devices (SZ) Limited
#1&5-8, 10/F, Changhong Building, Ke-Ji Nan 12 Road, Nanshan District, Shenzhen
Tel: (86 755) 86117811
Fax: (86 755) 86117810
Fremont Micro Devices (Hong Kong) Limited
tia
l
#16, 16/F, Blk B, Veristrong Industrial Centre, 34-36 Au Pui Wan Street, Fotan, Shatin, Hong Kong
Tel: (852) 27811186
Fax: (852) 27811144
Fremont Micro Devices (USA), Inc.
en
42982 Osgood Road Fremont, CA 94539
Tel: (1-510) 668-1321
Fax: (1-510) 226-9918
FM
D
C
on
fid
Web Site: http://www.fremontmicro.com/
* Information furnished is believed to be accurate and reliable. However, Fremont Micro Devices, Incorporated
(BVI) assumes no responsibility for the consequences of use of such information or for any infringement of
patents of other rights of third parties which may result from its use. No license is granted by implication or
otherwise under any patent rights of Fremont Micro Devices, Incorporated (BVI). Specifications mentioned in this
publication are subject to change without notice. This publication supersedes and replaces all information
previously supplied. Fremont Micro Devices, Incorporated (BVI) products are not authorized for use as critical
components in life support devices or systems without express written approval of Fremont Micro Devices,
Incorporated (BVI). The FMD logo is a registered trademark of Fremont Micro Devices, Incorporated (BVI). All
other names are the property of their respective owners.
© 2016 Fremont Micro Devices Inc.
Confidential Rev1.0
FT24C02A-EXX-page19