MXD8544A
0.1-3.0GHz SP4T Antenna Tuning Switch
VED
APPRO
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Company Limited (Maxscend) and may not be reproduced in any form without express written consent of
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MXD8544A – 0.1-3.0GHz SP4T Antenna Tuning Switch
General Description
Applications
The MXD8544A is a CMOS silicon-on-insulator
GSM/WCDMA/LTE band and mode switching
(SOI), single-pole, four-throw (SP4T) switch. The
Antenna tuning switch
high linearity and ruggedness performance and
extremely low insertion loss makes the device an
ideal
choice
for
GSM/WCDMA/LTE
handset
antenna tuning application.
The MXD8544A SP4T switch is provided in a
compact LGA 1.1mm x 1.5mm x 0.36mm package.
Features
Broadband frequency range: 0.1 to 3.0 GHz
Low insertion 0.50dB @ 2.7 GHz
High P0.1dB of 43.3dBm
Positive low voltage control: VC = 1.0 to 3.0 V,
A functional block diagram is shown in Figure 1.
The pin configuration and package are shown in
VDD = 2.5 to 3.3 V, Small LGA (10-pin,
1.1mm x 1.5mm x 0.36mm) package
Figure 2. Signal pin assignments and functional
pin descriptions are provided in Table 1.
Functional Block Diagram and Pin Function
ANT
ANT
RF1
RF3
RF1
1
RF2
RF4
RF2
2
8
V3
3
7
GND
VDD
4
6
V2
Decoder
V1 V2 V3 VDD
Figure 1.Functional Block Diagram
10
5
9
RF3
RF4
V1
Figure 2.Pin-out (Top View)
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MXD8544A – 0.1-3.0GHz SP4T Antenna Tuning Switch
Application Circuit
Antenna Port
RF1
RF Port1
RF2
RF Port2
1
10
RF3
9
2
8
3
7
RF Port3
RF4
RF Port4
GND
V3
100pF
5
4
VDD
6
V2
100pF
100pF
V1
100pF
Figure 3. MXD8544A Application Circuit
Table 1. Pin Description
Pin No.
1
2
3
4
5
Name
RF1
RF2
V3
VDD
V1
Description
Pin No.
RF port 1
RF port 2
Control Logic #3
DC power supply
Control Logic #1
6
7
8
9
10
Name
V2
GND
RF4
RF3
ANT
Description
Control Logic #2
Ground
RF port 4
RF port 3
Antenna port
Truth Table
Table 2.
State
V1
V2
V3
RF Path
1
2
3
4
5
6
7
8
0
0
1
0
0
1
1
1
0
1
0
0
1
0
1
1
1
1
1
0
0
0
0
1
All Ron
ANT to RF1 and RF2
ANT to RF3 and RF4
ANT to RF1
ANT to RF2
ANT to RF3
ANT to RF4
All isolation
Note: “1” = 1.0 V to 3.00 V. “0” = 0 V to +0.3 V.
Recommended Operation Range
Table 3.
Parameters
Operation Frequency
Power supply
Switch Control Voltage High
Switch Control Voltage Low
Symbol
Min
Typ
Max
f1
0.1
2.5
1.0
0
2.8
1.8
0
3.0
3.3
3.0
0.3
VDD
VCTL_H
VCTL_L
Units
GHz
V
V
V
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MXD8544A – 0.1-3.0GHz SP4T Antenna Tuning Switch
Specifications
Table 4.Electrical Specifications
Parameter
Symbol
DC Specifications
Control voltage:
Low
High
Supply voltage
Supply current
VCTL_L
VCTL_H
VDD
IDD
Control current
Specification
Min.
Typical
Max.
0
1.0
2.5
ICTL
Units
Test Condition
0
1.8
2.8
75
0.3
3.0
3.3
110
V
V
V
uA
VDD = 2.8 V
1
5
uA
VCTL = 1.8 V
dB
dB
dB
dB
dB
dB
dB
0.8 to 1.0 GHz
1.0 to 2.2 GHz
2.2 to 3.0 GHz
0.8 to 1.0 GHz
1.0 to 2.2 GHz
2.2 to 3.0 GHz
0.8 to 3.0 GHz
RF Specifications
Isolation
ISO
Return loss
Voltage Standing
Wave Ratio
On Resistance
(RF1/2/3/4 to ANT)
OFF Capacitance
(RF1/2/3/4 to ANT)
Input 0.1 dB
compression point
Peak RF operating
voltage
|S11|
0.35
0.45
0.50
28
24
22
20
VSWR
1.20
Ron
1.05
1.15
Ω
Switch on Path
Coff
130
150
fF
Switch off Path
Insertion loss
IL
+43
0.8 to 3.0 GHz
+43.3
dBm
Vpeak
45
V
LTE TX harmonic
(RF1/2/3/4 to ANT)
2f0
-90
-80
dBm
3f0
-80
-70
dBm
GSM LB harmonic
(RF1/2/3/4 to ANT)
2f0
-60
-50
dBm
3f0
-60
-50
dBm
GSM HB harmonic
(RF1/2/3/4 to ANT)
2f0
-60
-50
dBm
3f0
-60
-50
dBm
IMD2
-112
-105
dBm
IMD3
-112
-105
dBm
3.0
5.0
μs
Switching off time
3.0
5.0
μs
Startup time
10
20
μs
Second order
intermodulation
Third order
intermodulation
Switching on time
P0.1dB
26
22
19
0.45
0.55
0.70
0.8 to 3.0 GHz,
ANT to RF1/2/3/4
f0 = 700 to 2700 MHz,
25% duty cycle
f0 = 700 to 2700 MHz, PIN = +26
dBm
f0 = 824 to 915 MHz, PIN = +35
dBm
f0 = 1710 to 2690 MHz, PIN = +33
dBm
CW Carrier on RF Port, +20 dBm
CW Interferer on ANT port, -15 dBm
CW Carrier on RF Port, +20 dBm
CW Interferer on ANT port, -15 dBm
50% VCTL to 90% RF
50% VCTL to 10% RF
Power off state to any RF
switch state
Page 4 of 7
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MXD8544A – 0.1-3.0GHz SP4T Antenna Tuning Switch
Table 5. IMD2 Test Conditions
Band
In-band freq
MHz
1 Low
1 High
5 Low
5 High
2140
2140
881.5
881.5
CW Carrier
MHz
dBm
CW Interferer
MHz
dBm
1950
1950
836.5
836.5
190
4090
45
1718
+20
+20
+20
+20
-15
-15
-15
-15
Table 6. IMD3 Test Conditions
In-band freq
MHz
Band
1
5
2140
881.5
CW Carrier
MHz
dBm
CW Interferer
MHz
dBm
1950
836.5
1760
791.5
+20
+20
-15
-15
Absolute Maximum Ratings
Table 7. Maximum ratings
Parameters
Symbol
Minimum
Maximum
Units
Supply voltage
Digital control voltage
RF input power
Operating temperature
VDD
VCTL
PIN
TOP
+2.5
0
V
V
dBm
–30
+3.6
+3.6
+43.8
+85
Storage temperature
Electrostatic Discharge
Human body model
(HBM), Class 2
Machine Model (MM),
Class B
Charged device model
(CDM), Class III
TSTG
–55
+150
℃
ESD_HBM
2000
ESD_MM
200
ESD_CDM
500
℃
V
Note: Exposure to maximum rating conditions for extended periods may reduce device reliability. There is no damage to device with
only one parameter set at the limit and all other parameters set at or below their nominal value. Exceeding any of the limits listed
here may result in permanent damage to the device.
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MXD8544A – 0.1-3.0GHz SP4T Antenna Tuning Switch
Package Outline Dimension
Figure 4. Package outline dimension
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MXD8544A – 0.1-3.0GHz SP4T Antenna Tuning Switch
Reflow Chart
tP
TP
Critical Zone
TL to TP
Ramp-up
Temperature
TL
TSmax
tL
TSmin
Ramp-down
tS
Preheat
t 25 ℃ to Peak
Time
Figure 5. Recommended Lead-Free Reflow Profile
Table 8.
Profile Parameter
Lead-Free Assembly, Convection, IR/Convection
Ramp-up rate(TSmax to Tp)
3℃/second max.
Preheat temperature(TSmin to TSmax)
150℃ to 200℃
Preheat time(ts)
60 - 180 seconds
Time above TL , 217℃(tL)
60 - 150 seconds
Peak temperature(Tp)
260℃
Time within 5℃ of peak temperature(tp)
20 - 40 seconds
Ramp-down rate
6℃/second max.
Time 25℃ to peak temperature
8 minutes max.
ESD Sensitivity
Integrated circuits are ESD sensitive and can be damaged by static electric charge. Proper ESD
protection techniques should be used when handling these devices.
RoHS Compliant
This product does not contain lead, mercury, cadmium, hexavalent chromium, polybrominated biphenyls
(PBB) and polybrominated diphenyl ethers (PBDE), and are considered RoHS compliant.
1.2.1
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