uP9616
Conceptual
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3.3A Charger Interface, Wide Input Sensorless CC/CV
Synchronous-Rectified Buck Converter
for QC2.0/QC3.0/PE+1.1/PE+2.0 And FCP
Applications
General Description
PDA Like Device Car Chargers
Portable Charging Devices
Ordering Information
en
The uP9616 is a high-efficiency synchronous-rectified buck
converter with an internal power switch. With internal low
RDS(ON) switches, the high-efficiency buck converter is
capable of delivering up to 3.3A output current for charger
interface and a wide input voltage range from 8V to 32V. It
operates in either CV (Constant Output Voltage) mode or
CC (Constant Output Current) mode and provides a current
limitation function. The uP9616 has a constant output
voltage 5.2V/9V/12V for Qualcomm® Quick ChargeTM 3.0/
2.0(QC2.0/QC3.0) that is detected from D+ and D- line and
automatically detects whether a connected Powered Device
(PD) is Quick Charge (QC2.0/QC3.0) capable before
enabling output voltage adjustment. If a PD not compliant
to Quick Charge (QC2.0/QC3.0) is detected, the uP9616
disables output voltage adjustment to ensure safe operation
with legacy 5.2V only USB PDs.
uP9616 is a USB secondary side fast-charging converter,
supporting Qualcomm® Quick ChargeTM 3.0 (QC 3.0) High
Voltage Dedicated Charging Port (HVDCP) Class A
specification.
uP9616 allows for selection of the output voltage of an AC/
DC USB adapter based on commands from the Portable
Device (PD) being powered. Selecting a higher charging
voltage will reduce the charging current for a given power
level resulting in reduced IR drops and increased system
efficiency. Another advantage of QC3.0 is a decreased
battery charging time and a reduced PD system cost thanks
to the ability to select an optimum charging voltage. This
eliminates the need for costly DC/DC converters within the
PD. The USB-bus voltage can be controlled in discreet
steps from 3.6 V up to 12.1V. The output current is limited
not to exceed maximum allowable power level.
Other features for the buck converter include internal softstart, adjustable external CC (Constant Output Current)
limit setting, built-in fixed line-compensation, short circuit
protection, VIN/VOUT over voltage protection, and over
temperature protection. It is available in space saving
VDFN6x5-8L and VDFN5x6-10L packages.
Order Number
Package Type
Top Marking
uP9616PDC8
VDFN6x5-8L
uP9616P
uP9616PDYA
VDFN5x6-10L
uP9616P
uP9616-DS-C3202, Feb. 2017
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Pin Configuration
VIN
1
VIN
2
8
LX
7
BOOT
GND
D+
3
6
SENSE+
D-
4
5
SENSE-
VIN
5
CC2
CC1
D+
4
3
9
8
7
6
SENSE+
BOOT
LX
LX
10
GND
2
1
D-
VDFN6x5-8L
SENSE-
uP
IC
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Note:
(1) Please check the sample/production availability with
uPI representatives.
(2) uPI products are compatible with the current IPC/JEDEC
J-STD-020 requirement. They are halogen-free, RoHS
compliant and 100% matte tin (Sn) plating that are suitable
for use in SnPb or Pb-free soldering processes.
VDFN5x6-10L
1
uP9616
Conceptual
Features
Compliant with Apple® and Samsung Devices
Certification: uP9616 is certified by Qualcomm®
and UL. Please refer to the information below
for verification:
l
Internal QC2.0/QC3.0/PE+1.1/PE+2.0/FCP
Protocol and USB Type C
Qualcomm Quick Charge is a product of
Qualcomm Technologies, Inc.
Wide Output Voltage Range: 3.6V to 12.1V
UL Certificate No. 47876554328-2 for uP9616
Series
Output Voltage Accuracy: +1.5%
Fixed 125kHz Frequency Operation
Up to 95% Conversion Efficiency
Fixed Cable Compensation Voltage
Adjustable External CC (Constant Output
Current) Limit Setting: Default = 3.3A
CC (Constant Output Current) Limit Accurarcy:+3%
Short Circuit Protection
VIN/VOUT Over Voltage Protection and Over
Temperature Protections
VDFN6x5-8L and VDFN5x6-10L Packages
RoHS Compliant and Halogen Free
Wide Input Voltage Range : 8V to 32V
Input Voltage Absolute Maximum Rating: 36V
Up to 3.3A Output Current
CV/CC Mode Control (Constant Voltage and
Constant Current)
en
http://www.qualcomm.com/documents/quickcharge-device-list
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Supports USB DCP Shorting D+ Line to D- Line
Per USB Battery Charging Sepecification BC 1.2
Supports USB DCP Applying 2.7V on D+ Line
and 2.7V on D- Line
Supports USB DCP Applying 1.2V on D+ Line
and D- Line
VIN=8V~32V
on
Typical Application Circuit
VIN
C1
100uF/50V
BOOT
C3
0.1uF
C2
1uF/50V
GND
RSENSE
39m ohm
VOUT = 3.6V~12.1V
LX
uP9616PDC8
D+
SENSE+
D-
SENSE-
VIN
BOOT
IC
L1
22uH
R1
3.3 ohm
C6
3.3nF
C4
22uFx4/16V/X7R/MLCC
220uF/16V/ESR=90m ohm/EC
220uF/16V/ESR=25m ohm/OSCON
C5
0.1uF/16V
USB/FCP
VIN=8V~32V
USB/FCP/QC
2.0 and 3.0
GND
uP9616PDYA
D-
L1
22uH
RSENSE
39m ohm
VOUT = 3.6V~12.1V
LX
D+
SENSE+
R1
3.3 ohm
C6
3.3nF
C4
22uFx4/16V/X7R/MLCC
220uF/16V/ESR=90m ohm/EC
220uF/16V/ESR=25m ohm/OSCON
C5
0.1uF/16V
CC1
USB Type C
Detect
2
C3
0.1uF
C2
1uF/50V
uP
C1
100uF/50V
SENSECC2
uP9616-DS-C3202, Feb. 2017
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uP9616
Conceptual
Functional Pin Description
Pin No.
Pin Name Pin Function
PDYA
1,2
5
VIN
Pow er Supply Input. Input voltage that supplies current to the output voltage and
powers the internal control circuit. Bypass the input voltage with a minimum 1uFx1
X5R or X7R ceramic capacitor.
--
4
CC1
USB Type C Port CC1 Input Connection. CC1 Voltage On Source Side.
--
3
CC2
USB Type C Port CC2 Input Connection. CC2 Voltage On Source Side.
3
2
D+
USB Port D+ Input Connection. USB D+ data line input.
4
1
D-
USB Port D- Input Connection. USB D- data line input.
5
10
SENSE-
6
9
SENSE+ The Current Sense Input (+) Pin. Adjustable line and cable compensation voltage.
7
8
BOOT
Bootstrap Supply for the Floating Upper Gate Driver. Connect the bootstrap
capacitor C BOOT between BOOT pin and the LX pin to form a bootstrap circuit.
The bootstrap capacitor provides the charge to turn on the upper MOSFET.
Typical value for C BOOT is 0.1uF or greater. Ensure that C BOOT is placed near
the IC.
8
6,7
LX
en
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The Current Sense Input (-) Pin. Adjustable line and cable compensation voltage.
Internal Sw itches Output. Connect this pin to the output inductor.
Ground. Ground of the buck converter. The exposed pad is the main path for heat
convection and should be well-soldered to the PCB for best thermal performance.
uP
IC
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Exposed Pad (GND)
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PD C 8
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uP9616
Conceptual
Functional Block Diagram
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VIN
POR
Internal
Regulator
POR
VCC VREF VA
VA
VREF_CV
COMP_CV
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Current Sense
BOOT
UG Driver
VREF_UVP
UVP
FB
LX
VCC
VREF_OVP
OTP
SENSEX1
Control &
Protection Logic
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OVP
LG Driver
OTP
GND
COMP_CC
SENSE+
VREF_CC
Diff Amplifier
EN
EN Logic
Current Sense/CC (Constant
Output Current) Limit Amplifier
CC1
USB TYPE C
BC1.2/QC2.0/
QC3.0/FCP
D+
CC2
Line/Cable
Compensation
D-
uP
IC
PE+1.1/PE+2.0
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Set Current Limit
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uP9616
Conceptual
Functional Description
CV/CC Mode Control
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200
tia
150
VCOMP (mV)
100
RCOMP = 60mV/A (Fixed)
50
en
The uP9616 provides CV/CC function. It operates in either
CV (Constant Output Voltage) mode or CC (Constant Output
Current) mode. The function provides a current limitation
function and adjusts external current limit setting
(Default=3.3A). In the CV mode, the output voltage is
controlled within +1.5%. In the CC mode, the output current
variation is less than +3% of the nominal value which can
be set up to 3.3A by the current sensing resistor.
When Output current increase until it reaches the CC limit
set by the RSENSE resistor. At this point, the device will
transition from regulating output voltage to regulating output
current, and the output voltage will drop with increasing
load.
CC (Constant Output Current) Limit =
0
500
1000
1500
2000
2500
3000
ILOAD (mA)
Figure 1 USB Cable Compensation at
a Fixed Resistor Divider Value
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The CC (Constant Output Current) limit is set at 3.3A by
default with an external resistance RSENSE = 39mΩ, When
the (SENSE1+) - (SENSE1-) voltage gets higher than
130mV and reaches the current limit, the driver is turned
off. The CC (Constant Output Current) limit is set according
to the following equation:
0
130mV
RSENSE
Output Cable Resistance Compensation
The uP9616 continuously monitors the inductor current,
when the inductor current is higher than current limit
threshold, the current limit function activates and forces
the upper switch turning off to limit inductor current cycle
by cycle.
Output Short Circuit Protection
IC
on
In charger applications, the large load will cause voltage
drop in the output cable. The uP9616 has a built-in cable
compensation function. When the load increases, the
cable compensator will increase an adjustable regulation
of the error amplifier that can make the output voltage
constant. Use the curve and table to adjust internal the
reference voltage values for fixed USB cable compensation
by outside resistance RSENSE = 39mΩ (default), as shown in
Figure 1 and Table 1.The fixed cable compensation is
calculated as follows:
Current Limit Protection
VCOMP = ILOAD x RCOMP
RCOMP(mΩ)
60
Fixed USB Cable Compensation Voltage
(mV)
0
0
uP
ILOAD(mA)
500
0
1000
60
1500
90
2000
120
2500
150
3000
180
The uP9616 provides output short circuit protection function. Once the output loader short-circuits, the SCP will
be triggered then always hiccup, the hiccup cycle time is
set by an internal counter. When the SCP condition is
removed or disappears, the converter will resume normal
operation and the hiccup status will terminate.
Output Over Voltage Protection
The uP9616 provides output over voltage protection. Once
the output voltage (measured the at SENSE- pin) gets higher
than OVP threshold, the OVP will be triggered to shut down
the converter. When the OVP condition disappears, the
converter will resume normal operation and resume the
normal state automatically.
Over Temperature Protection
The OTP is triggered and shuts down the uP9616 if the
junction temperature is higher than 150oC The OTP is a
non-latch type protection. The uP9616 automatically
initiates another soft start cycle if the junction temperature
drops below 130oC.
Table 1 USB Cable Compensation Application Table
uP9616-DS-C3202, Feb. 2017
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5
uP9616
Conceptual
Functional Description
High Voltage Dedicated Charging Port (HVDCP) Mode
D-
Output Voltage
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D+
HVDCP Class A
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Portable Device
After power-up pins D+ and D- of uP9616 are shorted with
impedance RDCP_DAT and internal reference voltage VREF is
set to VBUS voltage 5.2V. The device is in a BC1.2 compatible
mode. If a portable device compatible with the Qualcomm
Quick Charge specification is connected, a negotiation
between HVDCP and PD is executed. Once the negotiation
is successful the uP9616 opens D+ and D- short connection
and D- is pulled down with a RDM_DWN. The uP9616 enters
HVDCP mode. It monitors D+ and D- inputs. Based on the
specified control patterns, the internal voltage reference
value VREF is adjusted in order to increase or decrease output
voltage to the required value.
GND
5.2V
3.3V
0.6V
9V
0.6V
0.6V
12V
0.6V
3.3V
Continuous Mode
en
0.6V
3.3
Previous Voltage
Table2. HVDCP detection voltage coding and status
Note: GND is not forced by the portable device. The portable
device shall go High-Z and the HVDCP pulls D- low through
Rdm_dwn. This is to prevent misdetection when current
flowing through GND causes the GND in the portable device
to be at a higher voltage relative to HVDCP GND. Care
should be taken in the portable device as this can result in
a negative relative voltage on D- as seen by the portable
device.
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The uP9616 is available in Class A version. Class A allows
to change the output voltage up to VBUS = 12V. If the
unplug event is detected the decoder circuitry turns-on an
internal current sink, which discharges the output capacitors
to a safe voltage level. If the uP9616 is set to a Continuous
mode it responds to the PD requests in a Single request
mode. It does not support Group request mode.
3.3
uP
IC
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HVDCP Continuous Mode
The continuous mode of operation leverages the previously
unused state in QC2.0. If the portable devices try and utilize
this mode, it applies voltages on D+ and D- per Table 2.
Assuming the HVDCP supports this mode of operation, it
will glitch filter the request as it currently does, using
TGLITCH_V_CHANGE(40ms). Before the portable device
can begin to increment or decrement the voltage, it must
wait TV_NEW_REQUEST_CONT before pulling D+ and Dhigh or low. Once this time has finished, the portable device
now attempts to increment or decrement the voltage. To
increment, the portable device sends a pulse of width
TACTIVE by pulling D+ to VDP_UP and then must return
D+ to VDP_SRC for TINACTIVE.
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uP9616
Conceptual
Absolute Maximum Rating
(Note 1)
en
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Supply Input Voltage, VIN ------------------------------------------------------------------------------------------------------------- -0.3V to +36V
LX Voltage to GND ------------------------------------------------------------------------------------------------------- -0.3V to + (VIN + -0.3V)
D+/D-/CC1/CC2 Pin Voltage -------------------------------------------------------------------------------------------------------------- -0.3V to +6.0V
SENSE+/SENSE- Pin Voltage ---------------------------------------------------------------------------------------------------------- -0.3V to +14V
Storage Temperature Range ------------------------------------------------------------------------------------------------------------- -65oC to +150oC
Junction Temperature ------------------------------------------------------------------------------------------------------------------------------------ 150oC
Lead Temperature (Soldering, 10 sec) ------------------------------------------------------------------------------------------------------------ 260oC
ESD Rating (Note 2)
D+/D-/Sense- Pin
HBM (Human Body Mode) --------------------------------------------------------------------------------------------------------------------- 4kV
MM (Machine Mode) ----------------------------------------------------------------------------------------------------------------------------- 400V
Other Pins
HBM (Human Body Mode) --------------------------------------------------------------------------------------------------------------------- 2kV
MM (Machine Mode) ----------------------------------------------------------------------------------------------------------------------------- 200V
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Thermal Information
on
Package Thermal Resistance (Note 3)
VDFN6x5 - 8L θJA -------------------------------------------------------------------------------------------------------------------- 45oC/W
VDFN6x5 - 8L θJC ------------------------------------------------------------------------------------------------------------------------- 4oC/W
VDFN5x6 - 10L θJA -------------------------------------------------------------------------------------------------------------------- 45oC/W
VDFN5x6 - 10L θJC ------------------------------------------------------------------------------------------------------------------------ 4oC/W
Power Dissipation, PD @ TA = 25oC
VDFN6x5 - 8L --------------------------------------------------------------------------------------------------------------------------------------- 2.2W
VDFN5x6 - 10L ------------------------------------------------------------------------------------------------------------------------------------- 2.2W
Recommended Operation Conditions
(Note 4)
IC
Operating Junction Temperature Range ------------------------------------------------------------------------------------------ -40oC to +125oC
Operating Ambient Temperature Range ------------------------------------------------------------------------------------------ -40oC to +85oC
Supply Input Voltage, VIN ------------------------------------------------------------------------------------------------------------------- +8V to 32V
uP
Note 1. Stresses listed as the above Absolute Maximum Ratings may cause permanent damage to the device.
These are for stress ratings. Functional operation of the device at these or any other conditions beyond those
indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
rating conditions for extended periods may remain possibility to affect device reliability.
Note 2. Devices are ESD sensitive. Handling precaution recommended.
Note 3. θJA is measured in the natural convection at TA = 25oC on a low effective thermal conductivity test board of
JEDEC 51-3 thermal measurement standard.
Note 4. The device is not guaranteed to function outside its operating conditions.
uP9616-DS-C3202, Feb. 2017
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7
uP9616
Conceptual
Electrical Characteristics
(VIN = 12V, TA =25oC, unless otherwise specified)
Symbol
Test Conditions
Input Voltage Range
32
V
--
7.5
--
V
--
7.0
--
V
32.8
--
--
V
32.3
--
--
V
--
1
1.50
mA
--
--
150
uA
--
70
--
mΩ
--
45
--
mΩ
--
125
--
kHz
96
98
99
%
-1.50
--
+1.50
VIN = 12V, VOUT = 9V, only for QC2.0/QC3.0
-1.50
--
+1.50
VIN = 12V, VOUT = 9.2V, only for FCP
-1.50
--
+1.50
VIN = 24V, VOUT = 12V, only for QC2.0/QC3.0
-1.50
--
+1.50
VIN = 24V, VOUT = 12.1V, only for FCP
-1.50
--
+1.50
--
10
--
ms
VOUT = 5.2V
127
130
133
mV
VOUT = 5.2V, IO = 2.5A measured at VSENSE
110
150
190
mV
VIN Falling
VIN_OVP Rising
en
VIN_OVP Falling
Supply Input Current
Input Quiescent Current
IQ1
No switching
Input Standby Current
IQ2
Type C detection
RDS(ON)
Low-Side Switch On Resistance
RDS(ON)
Oscillation Frequency
fOSC
Maximum Duty Cycle
DMAX
Output Voltage and Soft Start
fid
Pow er Sw itches
Hi-Side Switch On Resistance
Soft Start Time
on
VIN = 12V, VOUT = 5.2V,
only for C2.0/QC3.0/FCP
Output Voltage Accuracy
∆VOUT
TSS
IC
Current Sense Amplifier
Voltage Difference Between
SENSE+ and SENSE- at CC
Mode Operation
∆VSEN
Units
--
VIN Rising
VIN_OVP
Max
8
VIN
VIN POR Threshold
Input OVP Threshold
Typ
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Supply Input Voltage
Min
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Parameter
%
Output Cable Resistance Compensation
Fixed Line Compensation
uP
Protection
VOUT
CC (Constant Output Current)
Limit
IOUT
RSENSE = 39mΩ , VOUT = 5.2V
3.256
3.33
3.410
A
Output Voltage needs to
collapse threshold
VOUT
Into CC (Constant Output Current) Limit. Only
for QC2.0/3.0 and MTK
2.850
3.100
3.350
V
Output Over Voltage Protection
VOVP
measured at VSENSE-
--
10
--
%
6.7
--
VUVP
VOUT = 9.2V, only for FCP
--
Output Under Voltage Protection
VOUT = 12.1V, only for FCP
--
10
--
8
V
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uP9616
Conceptual
Electrical Characteristics
Parameter
Symbol
Test Conditions
TSD
Thermal Shutdown Hysteresis
TSDHYS
Max
High Voltage Dedicated Charging Port (D+/D-)
150
--
o
C
--
20
--
o
C
VDAT_REF
0.25
0.325
0.40
V
Output Voltagte Selection
Reference
VSEL_REF
2.0V Reference for Selection HVDCP
Voltage
1.80
2
2.20
V
Current Limit for HVDCP at
Any Output Voltage
IHVDCP_MIN
All HVDCP's must output this current at
minimum
500
--
--
mA
TGLITCHP_DM_LOW
After D+/- A are open and Rdm_dwn is
asserted, how long should HVDCP expect
D- to stay low before being pulled high.
1
--
--
ms
D- High Glitch Filter Time
TGLITCHP_DM_HIGH
After D+/- A are open and Rdm_dwn is
asserted, how long after a portable device
sees D- go low, before it makes first
voltage request and pulls D-high.
40
--
--
ms
D+ High Glitch Filter Time
TGLITCHP_BC_Done
After BC1.2 Detection is complete,
HVDCP
1
--
1.50
s
Output Voltage Glitch Filter
Time
fid
en
Data Detect Voltage
Units
--
tia
Thermal Shutdown Temprature
Typ
l
Protection (Cont.)
Min
TGLITCHP_V_CHANGE
Glitch filter after D+/- toggle before
HVDCP attempts to change output voltage
20
40
60
ms
Time for Vbus to discharge to 5.2V in
HVDCP on unplug
--
--
500
ms
Time for D+/D- to short on HVDCP
--
10
20
ms
Equivalent capacitance on D+ and D- to
GND
--
--
1
nF
RDAT_LKG
300
--
1500
kΩ
RD-_DWN
12
15
18
kΩ
--
20
40
Ω
Unplug Vbus Discharge
D+/D- HVDCP Short Time
D+D- Capacitance
Data Line Leakage
TD+_D-_SHORT
CDCP_PWR
IC
D- Pull Down Resistance
TV_UNPLUG
on
D- Low Glitch Filter Time
BC 1.2 DCP Mode (Short Mode)
D+ to D- Resistance During
DCP Mode
RDCP_DAT
D+ Output Voltage
VDP_1.2V+
VIN = 12V
1.12
1.20
1.28
V
D- Output Voltage
VDM_1.2V+
VIN = 12V
1.12
1.20
1.28
V
RDP_1.2V
ID+ = -5uA
80
102
130
kΩ
VDM_1.2V+
ID- = -5uA
80
102
130
kΩ
D+ Output Voltage
VD+_2.7V
VIN = 12V
2.57
2.70
2.84
V
D- Output Voltage
VD-_2.7V
VIN = 12V
2.57
2.70
2.84
V
D+ Output Impedance
RD+_2.7V
ID+ = -5uA
--
36
--
kΩ
D- Output Impedance
RD-_2.7V
ID- = -5uA
--
36
--
kΩ
uP
D+ Output Impedance
D- Output Impedance
Divider Mode (2.7V/2.7V)
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uP9616
Conceptual
en
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Typical Operation Characteristics
uP
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This page is intentionally left blank and will be updated when data is available.
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uP9616
Conceptual
Application Information
Output Capacitor Selection
Output inductor selection is usually based on the
considerations of inductance, rated current value, size
requirements and DC resistance (DCR).
The ESR of the output capacitor determines the output
ripple voltage and the initial voltage drop following a high
slew rate load transient edge. The output ripple voltage
can be calculated as:
∆IL =
tia
∆VOUT = ∆IC × (ESR +
1
)
8 × fOSC × C OU T
Where f OSC = operating frequency, C OUT = output
capacitance and ∆IC = ∆IL = ripple current in the inductor.
The ceramic capacitor with low ESR value provides the low
output ripple and low size profile.
In the case of electrolytic capacitors, the ripple is dominated
by RESR multiplied by the ripple current. Connect a 220uF
electrolytic capacitor at output SENSE+ terminal for good
performance and low output ripple and place output
capacitor5s as close as possible to the device.
In the case of ceramic output capacitors, RESR is very small
and does not contribute to the output ripple. Connect a
0.1uF ceramic capacitor at output SENSE- terminal for good
performance and place output capacitors as close as
possible to the device.
en
The inductance is chosen based on the desired ripple
current. Large value inductors result in lower ripple currents
and small value inductors result in higher ripple currents.
Higher VIN or VOUT also increases the ripple current as
shown in the equation below. A reasonable starting point
for setting ripple current is ∆IL = 900mA (30% of 3000mA).
l
Output Inductor Selection
V
1
× VOUT (1 − OUT )
fOSC × L OUT
VIN
fid
Maximum current ratings of the inductor are generally
specified in two methods: permissible DC current and
saturation current. Permissible DC current is the allowable
DC current that causes 40oC temperature raise. The
saturation current is the allowable current that causes 10%
inductance loss. Make sure that the inductor will not
saturate over the operation conditions including temperature
range, input voltage range, and maximum output current. If
possible, choose an inductor with rated current higher than
5A so that it will not saturate even under current limit
condition.
The PCB layout is an important step to maintain the high
performance of the uP9616. High switching frequencies
and relatively large peak currents make the PCB layout a
very important part of all high frequency switching power
supply design. Both the high current and the fast switching
nodes demand full attention to the PCB layout to save the
robustness of the uP9616 through the PCB layout.
Improper layout might show the symptoms of poor load or
lineregulation, radiate excessive noise at ground or input,
output voltage shifts, stability issues, unsatisfying EMI
behavior or worsened efficiency. Follow the PCB layout
guidelines for optiomal performances of uP9616.
on
The size requirements refer to the area and height
requirement for a particular design. For better efficiency,
choose a low DC resistance inductor. DCR is usually
inversely proportional to size.
PCB Layout Consideration
IC
Different core materials and shapes will change the size,
current and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar electrical
characteristics. The choice of which style inductor to use
often depends on the price vs. size requirements and any
radiated field/EMI requirements.
Input Capacitor Selection
uP
The input capacitor needs to be carefully selected to
maintain sufficiently low ripple at the supply input of the
converter. A low ESR capacitor is highly recommended.
Since large current flows in and out of this capacitor during
switching, its ESR also affects efficiency.
The input capacitance needs to be higher than 22uF. The
best choice is he ceramic type and low ESR electrolytic
types may also be used provided that the RMS ripple
current rating is higher than 50% of the output current. In
the case of the electrolytic types, they can be further away
if a small parallel 1uF ceramic capacitor is placed right
close to the IC. A 100uF elecrolytic capacitor and 1uF
ceramic capacitor are recommended and placed close to
VIN and GND pins, with the shortest traces possible.
uP9616-DS-C3202, Feb. 2017
www.upi-semi.com
11
uP9616
Conceptual
Application Information
Layout Guidelines For uP9616PDC8:
en
tia
l
1. Arrange the power components to reduce the AC loop size consisting of CIN, VIN (Pin 1, 2) and LX (Pin 8)
2. The input decoupling ceramic capacitor 1uF must be placed closest to the VIN (Pin 1, 2) and Exposed Pad GND plane
through vias or a short and wide path.
3. Return SENSE+ (PIN 6) to signal GND pin, and connect the signal GND to power GND at a single point for best
noise immunity. Connect exposed pad to power ground opper area with copper and vias.
4. Apply copper plane to Exposed Pad GND for best heat dissipation and noise immunity. The exposed pad is the
main path for heat convection and should be well-soldered to the PCB for best thermal performance.
5. Use a short trace connecting the bootstrap capacitor CBOOT to BOOT (Pin 7) and LX (Pin 8) to form a bootstrap
circuit.
6. Use a short trace connecting R-C to LX (Pin 8) and Exposed Pad GND Plane to form a Snubber Circuit.
7. The LX (Pin 8) pad is the noise node switching from VIN (Pin 1, 2) to GND. LX node copper area should be
GND Plane
fid
minimized to reduce EMI and should be isolated from the rest of circuit for good EMI and low noise operation.
8. The D+ (Pin 3) pad and D- (Pin 4) pad of the uP9616 are the USB detect data line input node, the D+ and D- Pin of
the via or trace area should be isolated using 0.96mm space to prevent direct contact with VIN area components
which may cause voltage of D+ and D- pins to exceed maximum rating of 6V.
-
+
1
VIN Plane
2
Via to D+
8
Exposed
Pad (GND)
4
USB Connector
SENSEPlane
5V
7
D+
6
D-
on
3
Via to D-
SENSE+
Plane
+
5
Via to GND Plan
GND
GND Plane
uP
IC
uP9616PDC8
12
uP9616-DS-C3202, Feb. 2017
www.upi-semi.com
uP9616
Conceptual
Application Information
Layout Guidelines For uP9616PDYA:
GND Plane
fid
en
tia
l
1. Arrange the power components to reduce the AC loop size consisting of CIN, VIN (Pin 5) and LX (Pin 6,7)
2. The input decoupling ceramic capacitor 1uF must be placed closest to the VIN (Pin 5) and Exposed Pad GND plane
through vias or a short and wide path.
3. Return SENSE+ (PIN 9) to signal GND pin, and connect the signal GND to power GND at a single point for best noise
immunity. Connect exposed pad to power ground copper area with copper and vias.
4. Apply copper plane to Exposed Pad GND for best heat dissipation and noise immunity. The exposed pad is the main
path for heat convection and should be well-soldered to the PCB for best thermal performance.
5. Use a short trace connecting the bootstrap capacitor CBOOT to BOOT (Pin 8) and LX (Pin 6,7) to form a bootstrap
circuit.
6. Use a short trace connecting R-C to LX (Pin 6,7) and Exposed Pad GND Plane to form a Snubber Circuit.
7. The LX (Pin 6,7) pad is the noise node switching from VIN (Pin 5) to GND. LX node copper area should be minimized
to reduce EMI and should be isolated from the rest of circuit for good EMI and low noise operation.
8. The CC1 (Pin 4), CC2 (Pin 5), D+ (Pin 2) pad and D- (Pin 1) pad of the uP9616 are the USB detect data line input
node, the CC1, CC2, D+ and D- Pin of the via or trace area should be isolated using 0.96mm space to prevent direct
contact with VIN area components which may cause voltage of CC1, CC2, D+ and D- pins to exceed maximum
rating of 6V.
-
+
6
5
Via to CC1
4
Via to CC2
3
Via to D+
Via to D-
Exposed
Pad (GND)
USB Connector
SENSEPlane
5V
7
D+
8
D-
on
VIN Plane
SENSE+
Plane
+
2
9
1
10
Via to GND Plan
GND
GND Plane
CC1
CC2
uP
IC
uP9616PDYA
uP9616-DS-C3202, Feb. 2017
www.upi-semi.com
13
uP9616
Conceptual
Package Information
VDFN6x5 - 8L
3.85 - 4.15
0.50 - 0.80
tia
8
en
6.00 BSC
3.25 - 3.55
5
l
5.00 BSC
4
1.27 BSC
0.31 - 0.51
0.80 - 1.00
fid
θ
1
0.20 REF
0.00 - 0.05
uP
IC
on
Note
1.Package Outline Unit Description:
BSC: Basic. Represents theoretical exact dimension or dimension target
MIN: Minimum dimension specified.
MAX: Maximum dimension specified.
REF: Reference. Represents dimension for reference use only. This value is not a device specification.
TYP. Typical. Provided as a general value. This value is not a device specification.
2.Dimensions in Millimeters.
3.Drawing not to scale.
4.These dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm.
14
uP9616-DS-C3202, Feb. 2017
www.upi-semi.com
uP9616
Conceptual
Package Information
VDFN5x6 - 10L
l
0.31 - 0.51
6.00 BSC
1.20BSC
tia
1
en
5.00 BSC
2.60 - 2.80
0.50 - 0.90
5
6
10
4.40 - 4.60
fid
0.80 - 1.00
θ
0.20 REF
0.00 - 0.05
uP
IC
on
Note
1.Package Outline Unit Description:
BSC: Basic. Represents theoretical exact dimension or dimension target
MIN: Minimum dimension specified.
MAX: Maximum dimension specified.
REF: Reference. Represents dimension for reference use only. This value is not a device specification.
TYP. Typical. Provided as a general value. This value is not a device specification.
2.Dimensions in Millimeters.
3.Drawing not to scale.
4.These dimensions do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.15mm.
uP9616-DS-C3202, Feb. 2017
www.upi-semi.com
15
uP9616
Conceptual
l
Important Notice
uP
IC
on
fid
en
tia
uPI and its subsidiaries reserve the right to make corrections, modifications, enhancements, improvements, and other
changes to its products and services at any time and to discontinue any product or service without notice. Customers
should obtain the latest relevant information before placing orders and should verify that such information is current and
complete.
uPI products are sold subject to the taerms and conditions of sale supplied at the time of order acknowledgment.
However, no responsibility is assumed by uPI or its subsidiaries for its use or application of any product or circuit; nor
for any infringements of patents or other rights of third parties which may result from its use or application, including but
not limited to any consequential or incidental damages. No uPI components are designed, intended or authorized for
use in military, aerospace, automotive applications nor in systems for surgical implantation or life-sustaining. No license
is granted by implication or otherwise under any patent or patent rights of uPI or its subsidiaries.
COPYRIGHT (C) 2016, UPI SEMICONDUCTOR CORP.
uPI Semiconductor Corp.
Headquarter
9F.,No.5, Taiyuan 1st St. Zhubei City,
Hsinchu Taiwan, R.O.C.
TEL : 886.3.560.1666 FAX : 886.3.560.1888
16
uPI Semiconductor Corp.
Sales Branch Office
12F-5, No. 408, Ruiguang Rd. Neihu District,
Taipei Taiwan, R.O.C.
TEL : 886.2.8751.2062 FAX : 886.2.8751.5064
uP9616-DS-C3202, Feb. 2017
www.upi-semi.com
uP9616
uP
IC
on
fid
en
tia
l
Conceptual
uP9616-DS-C3202, Feb. 2017
www.upi-semi.com
17
uP9616
uP
IC
on
fid
en
tia
l
Conceptual
18
uP9616-DS-C3202, Feb. 2017
www.upi-semi.com
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