BT151U-650C,127

DISCRETE SEMICONDUCTORS DATA SHEET BT151U series C Thyristors Product specification August 2018 WeEn Semiconductors Product specification Thyristors BT151U series C GENERAL DESCRIPTION Passivated thyristors in a plastic envelope, intended for use in applications requiring high bidirectional blocking voltage capability and high thermal cycling performance. Typical applications include motor control, industrial and domestic lighting, heating and static switching. PINNING - SOT533, (I-PAK) PIN NUMBER DESCRIPTION 1 cathode QUICK REFERENCE DATA SYMBOL VDRM, VRRM IT(AV) IT(RMS) ITSM PARAMETER BT151URepetitive peak off-state voltages Average on-state current RMS on-state current Non-repetitive peak on-state current PIN CONFIGURATION MAX. MAX. MAX. UNIT 500C 500 650C 650 800C 800 V 7.5 12 100 7.5 12 100 7.5 12 100 A A A SYMBOL mb A K G 2 anode 3 gate tab anode sym037 1 2 3 IPAK (SOT533) LIMITING VALUES Limiting values in accordance with the Absolute Maximum System (IEC 60134). SYMBOL PARAMETER CONDITIONS VDRM, VRRM Repetitive peak off-state voltages IT(AV) IT(RMS) ITSM I2t dIT/dt IGM VRGM PGM PG(AV) Tstg Tj Average on-state current RMS on-state current Non-repetitive peak on-state current half sine wave; Tmb ≤ 104 ˚C all conduction angles half sine wave; Tj = 25 ˚C prior to surge t = 10 ms t = 8.3 ms t = 10 ms ITM = 20 A; IG = 50 mA; dIG/dt = 50 mA/μs I2t for fusing Repetitive rate of rise of on-state current after triggering Peak gate current Peak reverse gate voltage Peak gate power Average gate power over any 20 ms period Storage temperature Junction temperature MIN. MAX. UNIT - -500C -650C -800C 5001 6501 800 V - 7.5 12 A A - 100 110 50 50 A A A2s A/μs -40 - 2 5 5 0.5 150 125 A V W W ˚C ˚C 1 Although not recommended, off-state voltages up to 800V may be applied without damage, but the thyristor may switch to the on-state. The rate of rise of current should not exceed 15 A/μs. August 2018 1 Rev 1.100 WeEn Semiconductors Product specification Thyristors BT151U series C THERMAL RESISTANCES SYMBOL PARAMETER Rth j-mb Thermal resistance junction to mounting base Thermal resistance in free air junction to ambient Rth j-a CONDITIONS MIN. TYP. MAX. UNIT - - 1.3 - 70 - K/W K/W K/W STATIC CHARACTERISTICS Tj = 25 ˚C unless otherwise stated SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNIT IGT IL IH VT VGT Gate trigger current Latching current Holding current On-state voltage Gate trigger voltage ID, IR Off-state leakage current VD = 12 V; IT = 0.1 A VD = 12 V; IGT = 0.1 A VD = 12 V; IGT = 0.1 A IT = 23 A VD = 12 V; IT = 0.1 A VD = VDRM(max); IT = 0.1 A; Tj = 125 ˚C VD = VDRM(max); VR = VRRM(max); Tj = 125 ˚C 0.25 - 2 10 7 1.44 0.6 0.4 0.1 15 40 20 1.75 1.5 0.5 mA mA mA V V V mA MIN. TYP. MAX. UNIT 50 200 - 130 1000 2 - V/μs V/μs μs - 70 - μs DYNAMIC CHARACTERISTICS Tj = 25 ˚C unless otherwise stated SYMBOL PARAMETER CONDITIONS dVD/dt Critical rate of rise of off-state voltage VDM = 67% VDRM(max); Tj = 125 ˚C; exponential waveform Gate open circuit RGK = 100 Ω ITM = 40 A; VD = VDRM(max); IG = 0.1 A; dIG/dt = 5 A/μs VD = 67% VDRM(max); Tj = 125 ˚C; ITM = 20 A; VR = 25 V; dITM/dt = 30 A/μs; dVD/dt = 50 V/μs; RGK = 100 Ω tgt tq August 2018 Gate controlled turn-on time Circuit commutated turn-off time 2 Rev 1.100 WeEn Semiconductors Product specification Thyristors BT151U series C 105.5 15 conduction angle Ptot (W) 10 form factor (α) (a) 30 30˚ 60˚ 90˚ 120˚ 180˚ 4 4.0 2.8 2.2 1.9 1.57 a = 1.57 120 Tmb(max) (°C) 1.9 2.2 ITSM IT 100 112 2.8 ITSM / A time T Tj initial = 25 C max 80 4 60 118.5 5 40 α 20 0 0 2 4 6 8 125 0 IT(AV) (A) Fig.1. Maximum on-state dissipation, Ptot, versus average on-state current, IT(AV), where a = form factor = IT(RMS)/ IT(AV). 1000 1 10 100 Number of half cycles at 50Hz 1000 Fig.4. Maximum permissible non-repetitive peak on-state current ITSM, versus number of cycles, for sinusoidal currents, f = 50 Hz. ITSM / A 25 IT(RMS) / A 20 dI T /dt limit 15 100 10 I TSM IT T time 5 Tj initial = 25 C max 10 10us 100us 10ms 1ms 0 0.01 T/s Fig.2. Maximum permissible non-repetitive peak on-state current ITSM, versus pulse width tp, for sinusoidal currents, tp ≤ 10ms. 0.1 1 surge duration / s 10 Fig.5. Maximum permissible repetitive rms on-state current IT(RMS), versus surge duration, for sinusoidal currents, f = 50 Hz; Tmb ≤ 100 ˚C. 15 IT(RMS) 1.6 VGT(Tj) VGT(25 C) 104 ˚C (A) 1.4 10 1.2 1 5 0.8 0.6 0 -50 0 50 100 Tmb (°C) 0.4 -50 150 Fig.3. Maximum permissible rms current IT(RMS) , versus mounting base temperature Tmb. August 2018 0 50 Tj / C 100 150 Fig.6. Normalised gate trigger voltage VGT(Tj)/ VGT(25˚C), versus junction temperature Tj. 3 Rev 1.100 WeEn Semiconductors Product specification Thyristors 3 BT151U series C IGT(Tj) IGT(25 C) 30 Tj = 125 °C Tj = 25 °C IT (A) 2.5 typ 20 2 max 1.5 10 1 0.5 Vo = 1.06 V Rs = 0.0304 ohms 0 -50 0 50 Tj / C 100 0 150 3 0.5 1 1.5 2 VT (V) Fig.10. Typical and maximum on-state characteristic. Fig.7. Normalised gate trigger current IGT(Tj)/ IGT(25˚C), versus junction temperature Tj. IL(Tj) IL(25 C) 0 10 Zth(j-mb) BT145 (K/W) 2.5 1 2 0.1 1.5 P D 1 tp 0.01 0.5 t 0 -50 0 50 Tj / C 100 0.001 10us 150 1ms 10ms 0.1s 1s 10s tp (s) Fig.11. Transient thermal impedance Zth j-mb, versus pulse width tp. Fig.8. Normalised latching current IL(Tj)/ IL(25˚C), versus junction temperature Tj. 3 0.1ms IH(Tj) IH(25 C) 10000 dVD/dt (V/us) 2.5 1000 2 RGK = 100 Ohms 1.5 100 1 gate open circuit 0.5 0 -50 0 50 Tj / C 100 10 150 50 100 150 Tj / C Fig.9. Normalised holding current IH(Tj)/ IH(25˚C), versus junction temperature Tj. August 2018 0 Fig.12. Typical, critical rate of rise of off-state voltage, dVD/dt versus junction temperature Tj. 4 Rev 1.100 WeEn Semiconductors Product specification Thyristors BT151U series C MECHANICAL DATA Plastic single-ended package (IPAK); 3 leads (in-line) SOT533 E A E1 A1 D1 mounting base D2 L1 Q L 1 2 3 e1 b w c M e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A mm 2.38 2.22 A1 b 0.93 0.89 0.46 0.71 c D1 D2 E 0.56 0.46 1.10 0.96 6.22 5.98 6.73 6.47 E1 e e1 4.57 2.285 5.21 5.00 BSC (1) BSC (1) L L1 (2) max Q w 9.6 9.2 2.7 1.1 1.0 0.3 Notes 1. Basic spacing between centers. 2. Terminal dimensions are uncontrolled within zone L1. OUTLINE VERSION SOT533 August 2018 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 05-02-11 06-02-14 TO-251 5 Rev 1.100 WeEn Semiconductors Legal information Data sheet status Document status [1][2] Product status [3] Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Definition Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.ween-semi.com. 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