ISM480F1-C4.3

Inventek Systems GPS Module ISM480F1 DOC-DS-20002-1.2 Page 1 Table of Contents 1 2 GENERAL DESCRIPTION ....................................................................................... 3 PART NUMBER DETAIL DESCRIPTION .............................................................. 3 Ordering Information................................................................................................. 3 3 GENERAL FEATURES ............................................................................................. 3 3.1 Improved Jamming Mitigation ........................................................................... 4 4 COMPLIMENTARY DOCUMENTATION ............................................................. 4 4.1 Inventek Systems ................................................................................................ 4 4.2 SiRF Technology ................................................................................................ 4 5 SPECIFICATIONS ..................................................................................................... 5 5.1 General ................................................................................................................ 5 5.2 Module Architecture ........................................................................................... 5 5.3 Hardware Features .............................................................................................. 6 5.4 Mechanical Specifications .................................................................................. 6 5.5 Environmental Specifications ............................................................................. 6 6 PERFORMANCE ....................................................................................................... 6 6.1 Position and Velocity .......................................................................................... 6 6.2 Time To First Fix (See Note 2) (TTFF) .................................................................... 7 6.3 Dynamic Constraints ........................................................................................... 7 6.4 Receiver Sensitivity ............................................................................................ 7 7 HARDWARE ELECTRICAL SPECIFICATIONS ................................................... 9 7.1 Power Supply Maximum Ratings ....................................................................... 9 7.2 Specifications ...................................................................................................... 9 7.2.1 Electrical Specification ................................................................................... 9 7.2.2 Mechanical Specification .............................................................................. 10 7.2.3 Pin Positions................................................................................................. 10 7.2.4 Detailed Pin Description ............................................................................... 12 8 BASIC OPERATION (SPI or UART) ..................................................................... 13 8.1 NMEA input and output messages ................................................................... 14 8.2 SiRF OSP Protocol ........................................................................................... 14 8.3 Antenna ............................................................................................................. 15 Antenna Patch specifications –Inventek PAT154 ( ISM480 Ground plane) ................ 15 8.4 Return Loss ....................................................................................................... 15 8.5 Impedance – Smith Chart.................................................................................. 16 8.6 Gain Pattern (Unit: dBic) .................................................................................. 17 8.7 Return Loss and Impedance .............................................................................. 17 8.8 Axial Ratio ........................................................................................................ 19 9 Product Compliance Considerations ......................................................................... 19 10 ORDERING INFORMATION ................................................................................. 19 11 REVISION CONTROL ............................................................................................ 20 12 CONTACT INFORMATION ................................................................................... 20 DOC-DS-20002-1.2 Page 2 1 GENERAL DESCRIPTION The Inventek ISM480F1 is a 48 channel global positioning system (GPS) receiver with an integrated 15x15x4 mm ceramic patch antenna with high sensitivity, high gain, and low power. The small form factor GPS receiver is based on the fast and deep GPS signal search capabilities of CSR, SiRFstar IV™ architecture. Several key features about this module are: The module is capable of generating and storing extended ephemeris data to an external device for much faster hot starts in weak signal environments. Built-in jamming detection and mitigation to permit fast and accurate navigation solutions in high noise environments. Default output is SPI (Slave). An addition 4 dB in tracking sensitivity and 4 dB navigation sensitivity over the world class SiRFstar III devices. 2 PART NUMBER DETAIL DESCRIPTION Ordering Information Device Description GPS Module, Commercial Temp., Standard ISM480F1 ISM480F1 ISM480EVB Firmware GPS Module, Commercial Temp, with 9600 baud NEMA Firmware GPS Evaluation board, with ISM480F1-C4.1, Cable, Logging, Display Ordering Number ISM480F1-C4.1 ISM480F1-C5.V0006 ISM480EVB 3 GENERAL FEATURES            Based on the high performance features of the SiRFstar IV, GSD4e-9411 processor. Compact module size for easy integration: 16.5x 16.5 x 7 mm (shield height included). Host UART or SPI or I2C interface ( Default SPI) 48 track verification channels Custom output Firmware can be provided Integrated LNA, SAW Filter, TCXO and RTC Single power supply voltage 1.8V. Lead Free Design which is compliant with ROHS requirements Cold, Warm, Hot Start Time: 35, 35, 1 Sec. respectively. Reacquisition Time: 1 second. Programmable DOC-DS-20002-1.2 Page 3 3.1 Improved Jamming Mitigation Better identification and dismissal of jamming signals through enhanced Carrier Wave (CW) detection. Removes in-band jammers up to 80 dB-Hz Tracks up to 8 CW jammers Enhanced development tools to identify noise issues for troubleshooting potential system level noise issues 4 COMPLIMENTARY DOCUMENTATION 4.1 Inventek Systems Inventek Test Report ISM480EVB- Board Specification 4.2 SiRF Technology NMEA Reference Manual (www.Inventeksys.com ) under specifications. SiRF Binary Protocol Reference Manual OSP Reference Manual Sirf Live Software DOC-DS-20002-1.2 Page 4 5 SPECIFICATIONS 5.1 General 5.2 Module Architecture GPI03 Figure 1 Inventek’s ISM480F1 General Block Diagram DOC-DS-20002-1.2 Page 5 5.3 Hardware Features The ISM480F1 is a complete navigation GPS processor built on a low power SiRF IV GSD4e processor. The module has an ARM7 processor and RF front end with integrated LAN and SAW to complete a standalone or Aided-GPS engine. 5.4 Mechanical Specifications The Physical dimensions of this GPS Module are as follow Items Length Width Height Connector Description 16.5 (-/+0.2 mm) 16.5 (-/+0.2 mm) 7.0 ± 0.2 mm 12 Pin IPEX P/N 20488012e-01 5.5 Environmental Specifications Item Operating temperature range Storage temperature range Humidity Altitude Velocity/Speed Jerk Acceleration Description -35 deg. C to +80 deg. C -55 deg. C to +100 deg. C 95% max non-condensing 18,000m (60,000 ft) max. 515 m/Sec (1000 knots) max. 20 m/Sec3 (max) 4 G (max) 6 PERFORMANCE 6.1 Position and Velocity Parameter Position Velocity Time Description 10m, 2D RMS Autonomous, and 5m 2D RMS, SBAS corrected. 0.1 m/Sec 1 uSec synchronized to GPS time 2D RMS (Root Mean Square) describes the position accuracy at approximately 95 percent of the data points occur with this distance of a know truth. DOC-DS-20002-1.2 Page 6 6.2 Time To First Fix (See Note 2) (TTFF) Mode TTFF Hot (valid almanac, position, time & ephemeris) TTFF Warm (valid almanac, position, & time) TTFF Cold (valid almanac) Re-Acquisition (20 measurements) Weak Signal Level 3.4 Cold Start TTFF Autonomous (Ave of >20 measurements) 26s Measure Ave. TTFF of all trials @-136dBm 3.5 Reacquisition 1min ON/1min OFF (Avg. of >20 measurements) 1.0s Rx must reacq all attempts @136dBm 4 FULL POWER STATIONARY 4.1 4.2 4.3 Number of Samples/3D Navigation (2 hrs min) Horizontal Position Accuracy (Max.) Horizontal Position Accuracy (Ave.) (Record Logfile) See Note 3 18891 1 second sampling with 100% 3D Nav 3.69m Horizontal Trajectory Plot 1.31m Same as 4.1 4.4 Vertical Position Accuracy (Max.) 3.2m Vertical Variation Plot 4.5 Vertical Position Accuracy (Ave.) 0.8m Same as 4.3 4.6 Horizontal (Max Dev.) 4.7 Vertical Velocity Accuracy (Max Dev.) Velocity Accuracy 0.1m/s Horizontal Velocity Plot 0.7m/s Vertical Velocity Plot Notes: 1. 2. 3. 4. All RF performance requirements for Section 2 are performed with a simulator and are as compared to a reference design. Acquisition/TTFF measurements are open sky rooftop antenna. Stationary at nominal signal level (-130dBm), open sky or simulator. All tests are to be performed at ambient temperature. DOC-DS-20002-1.2 Page 8 7 HARDWARE ELECTRICAL SPECIFICATIONS 7.1 Power Supply Maximum Ratings Parameter Input voltage Current (avg) at full power (1.8V) Battery backup voltage Hibernate KA State ISM480F1 Module 1.8 VDC 45 mA 1.8 VDC 20 uA 10 uA In rush current of approx. 55 mA on startup 7.2 Specifications 7.2.1 Electrical Specification DC Characteristics Parameter Input Voltage Power supply Current Input Voltage high Input Voltage Low Input capacitance Input Leakage Current Input Leakage Current DOC-DS-20002-1.2 Symbol Mode 1.71 V in Acquisition Icc Min 1.71 Tracking Hibernate PTF Typ 1.8 45 37 10 Max 1.89 Units V mA mA uA 3.5 .5 V in = 1.8V or 0V -10 10 V V pF uA V in = 1.8V or 0V -10 10 uA 5 GPIO Page 9 7.2.2 Mechanical Specification Dimensions Connector Weight Interconnect Cable 16.01 x 12.09 x 7.52 mm 12 position Mini Flex 0.5mm single - Ipex -20488-012E-01 7 ounces R12 - 12 strand Ribbon cables 7.2.3 Pin Positions Pin 1 DOC-DS-20002-1.2 Page 10 RES Pin No. Type Pin Definition 1 O CTS/SPI_Clk/Mode 2 I/O RX/MOSI/SDA 3 I/O TX/MISO/SCL 4 5 6 7 8 9 10 11 12 I/O I O I I O I Gnd Vcc SPI CS/RTS/GPIO7 Reset# Wakeup On /Off Flash Enable GPIO 3 RES Ground Vcc DOC-DS-20002-1.2 Descriptions SPI Clk/ Mode selection SSPI_DI slave SPI data input (MOSI) UART_RX UART data receive (RX) I2C_DIO I²C bus data (SDA) SSPI_DO slave SPI data output (MISO) UART_TX UART data transmit (TX) I2C_CLK I²C bus clock (SCL) SPI CS, RTS, GPIO -7 System Reset Power control pin ( Output – High GPS on) Pulse High (momentary) to turn on Strap High (1.8V) to put in Flash Mode Message ready (SPI) Reserved Gnd 1.8 V dc Page 11 7.2.4 Detailed Pin Description Pin 1: CLK CTS (GPI0 6) - See Section 8 Pin 2: Rx/ MOSI/SDA – The function of these pins are defined upon power per section 8  SPI – MOSI  UART – RX  I2C – SDA Pin 3: TX/MISO/SCL – The function of these pins are defined upon power per section 8  SPI – MISO  UART – TX  I2C – SCL Pin 4: RTS, SPI_CS, GPIO7- See Section 8 Pin 6: Wakeup: This is an output that indicates the state of the GPS. Low is hibernate and high is active. You should monitor Wake-up to know the state of the GPS Pin 7: On/OFF The input level is 1.8V level direct hardware connection to the internal Finite State Machine. The RTC clock must be on and state for this control to be functional. Minimum on pulse duration is two RTC ticks, about 63us. Minimum inter-pulse interval is one second. Minimum off duration is two RTC ticks, about 63us. See Figure below give a guideline for pulse waveform. A critical item to avoid is contact bounce if a mechanical switch is used. If you are using a mechanical switch, we recommend a 150KΩ pull down resistor. Pin 8: Flash Enable – Pull High to Flash, unconnected for normal operation Pin 9: Message Ready – When in SPI mode, PIN will go High to indicate a message is ready to be read. Pin 11: GND DOC-DS-20002-1.2 Page 12 Pin 12: 1.8 V - **Maximum input ripple is as follows: 0-3Mhz >3 Mhz 50 mV 15mV ** Additional filtering and decoupling must be added to your power supply circuit to reduce levels to less than the stated amount. 8 BASIC OPERATION (SPI or UART) The ISM480F1 has three outputs to the host, SPI, I2C and UART. All ports are multiplexed on a shared set of pins. At system reset, the host port pins are disabled, so no conflict occurs. At system reset, you can boot strap the device as follows: Port Type Pin 1 (GPIO 6) Pin 4 (GPIO 7) UART External pullup10KΩ (N/C) Do not connect SPI (Default) (N/C) Do not connect (N/C) Do not connect I2C (N/C) Do not connect Add a 10KΩ pull down The host ports are configured based on these straps. The software sets up the port pins requirements during low power modes. UART Mode Port Type UART Mode Pin 1 External pullup10KΩ Pin 4 (N/C) Do not connect The ISM480F1 will output NMEA-0183, 4800 baud, 8-N-1. The transmit and receive channel contain a 64B FIFO.  TX is GPS output  RX used for GPS control  nCTS and nRTS are optionally used for hardware flow control. Through this UART connection, your host microcontroller can change the baud rate, change the output to OSP ( SiRF Binary) or enable or disable many features of the ISM480F1. Outputs are LVCMOS 1.8V compatible. SPI Mode On initial power on, the GPS module will look at pin 1 and Pin 4 to determine the mode of operation. Your SPI bus should have no pull up or pull down is required. On power up the connection to Pin 1 and Pin 1 must be tri stated on the SPI bus. DOC-DS-20002-1.2 Page 13 Port Type SPI Mode Pin 1 (N/C) Do not connect Pin 4 (N/C) Do not connect The host interface SPI is a slave mode SPI.  MOSI,MISO,nCS and SCLK  Transmit and Receive have independent 1024B FIFO buffers.  An interrupt is provided when the transmit FIFO and output serial register are both empty.  The transmit and receive have individual software defined 2-byte idle patterns of 0xa7 0xb4.  Max clock of 6.8Mhz I2C Mode Port Type I2C Mode Pin 1 (N/C) Do not connect Pin 4 Add a 10KΩ pull down The host interface I2C mode.  Operation up to 400kbps.  Transmit and Receive have independent FIFO length of 64 bytes.  The default address is o RC: 0x60 o TX: 0x62  Multi-master I2C mode is default mode 8.1 NMEA input and output messages A complete description of each message is contained in the SiRF NMEA reference manual. 8.2 SiRF OSP Protocol A complete description of each binary message is contained in the SiRF OSP Protocol reference manual. DOC-DS-20002-1.2 Page 14 8.3 Antenna Antenna Patch specifications –Inventek PAT154 ( ISM480 Ground plane) The definition of the measured planes: H- Plane E- Plane 8.4 Return Loss DOC-DS-20002-1.2 Page 15 8.5 Impedance – Smith Chart DOC-DS-20002-1.2 Page 16 8.6 Gain Pattern (Unit: dBic) 8.7 Return Loss and Impedance Dimension(mm) 15 x 15 x 4 DOC-DS-20002-1.2 Return Loss -31.7 Impedance 52.3 – j 1.1 Gain 0˚H-Plane(dBic) -2.05 Page 17 Gain Pattern Data (dBic) Axial Ratio Data (dB) DOC-DS-20002-1.2 Page 18 8.8 Axial Ratio 9 Product Compliance Considerations RoHS: Restriction of Hazardous Substances (RoHS) directive has come into force since 1st July 2006 all electronic products sold in the EU must be free of hazardous materials, such as lead. Inventek is fully committed to being one of the first to introduce lead-free GPS products while maintaining backwards compatibility and focusing on a continuously high level of product and manufacturing quality. 10 ORDERING INFORMATION Part number ISM480F1-C4.1 ISM480F1-C5.6 Description GPS module GPS Mode ISM480EVB Evaluation Board DOC-DS-20002-1.2 Type Standard build NMEA - 9600 Baud default Firmware NMEA – 4800 Temperature -35C- 80 °C -35C- 80 °C Page 19 11 REVISION CONTROL Document : ISM480F1 External release GPS module DOC-DS-20002-1.2 Date 3/28/2011 7/19/2011 2/3/2012 Revision 1.0 1.1 1.2 Author FMT MT FMT Comment Preliminary Typo on SPI mode 1PPS changed to GPIO3, logo change 12 CONTACT INFORMATION Inventek Systems 2 Republic Road Billerica Ma, 01862 Tel: 978-667-1962 Sales@inventeksys.com www.inventeksys.com Inventek Systems reserves the right to make changes without further notice to any products or data herein to improve reliability, function, or design. The information contained within is believed to be accurate and reliable. However Inventek Systems does not assume any liability arising out of the application or use of this information, nor the application or use of any product or circuit described herein, neither does it convey any license under its patent rights nor the rights of others. DOC-DS-20002-1.2 Page 20