HT8232RSZ

HT8232R USB UART IC (Functional equivalent FT232R) Features        Single chip USB to asynchronous serial data transfer interface. Entire USB protocol handled on the chip - No USB-specific firmware programming required. UART interface support for 7 or 8 data bits, 1 or 2 stop bits and odd / even / mark / space / no parity. Fully assisted hardware or X-On / X-Off software handshaking. Data transfer rates from 300 baud to 3 Megabaud (RS422 / RS485 and at TTL levels) and 300 baud to 1 Megabaud (RS232). 256 byte receive buffer and 128 byte transmit buffer utilising buffer smoothing technology to allow for high data throughput. eliminate the requirement for USB driver development in most cases. In-built support for event characters and line break condition.                    Auto transmit buffer control for RS485 applications. Transmit and receive LED drive signals. New 48MHz, 24MHz,12MHz, and 6MHz clock output signal Options for driving external MCU or FPGA. FIFO receive and transmit buffers for high data throughput. Adjustable receive buffer timeout. Synchronous and asynchronous bit bang mode interface options with RD# and WR# strobes. New CBUS bit bang mode option.          Integrated 1024 Bit internal EEPROM for storing USB VID, PID, serial number and product description strings, and CBUS I/O configuration. Device supplied preprogrammed with unique USB serial number. Support for USB suspend and resume. Support for bus powered, self powered, and highpower bus powered USB configurations. Integrated 3.3V level converter for USB I/O . Integrated level converter on UART and CBUS for interfacing to 5V - 1.8V Logic. True 5V / 3.3V / 2.8V / 1.8V CMOS drive output and TTL input. High I/O pin output drive option. Integrated USB resistors. Integrated power-on-reset circuit. Fully integrated clock - no external crystal, oscillator, or resonator required. Fully integrated AVCC supply filtering - No separate AVCC pin and no external R-C filter required. UART signal inversion option. USB bulk transfer mode. 3.3V to 5.25V Single Supply Operation. Low operating and USB suspend current. Low USB bandwidth consumption. UHCI / OHCI / EHCI host controller compatible USB 2.0 Full Speed compatible. -40°C to 85°C extended operating temperature range. Available in compact Pb-free 28 Pin SSOP and QFN-32 packages (both RoHS compliant). 特别注意：新版本芯片只有1个ID号，不 支持多颗并在一起使用。 Rev. 01 HT8232R Driver Support Royalty-Free VIRTUAL COM PORT (VCP) DRIVERS for...  Windows 98, 98SE, ME, 2000, Server 2003, XP.  Windows Vista / Longhorn*  Windows XP 64-bit.*  Windows XP Embedded.  Windows CE.NET 4.2 & 5.0  MAC OS 8 / 9, OS-X  Linux 2.4 and greater Royalty-Free D2XX Direct Drivers (USB Drivers + DLL S/W Interface)  Windows 98, 98SE, ME, 2000, Server 2003, XP.  Windows Vista / Longhorn*  Windows XP 64-bit.*  Windows XP Embedded.  Windows CE.NET 4.2 & 5.0  Linux 2.4 and greater Typical Applications         USB to RS232 / RS422 / RS485 Converters Upgrading Legacy Peripherals to USB Cellular and Cordless Phone USB data transfer cables and interfaces Interfacing MCU / PLD / FPGA based designs to USB USB Audio and Low Bandwidth Video data transfer PDA to USB data transfer USB Smart Card Readers USB Instrumentation          USB Industrial Control USB MP3 Player Interface USB FLASH Card Reader / Writers Set Top Box PC - USB interface USB Digital Camera Interface USB Hardware Modems USB Wireless Modems USB Bar Code Readers USB Software / Hardware Encryption Dongles Rev. 01 HT8232R Functional Block Descriptions 3.3V LDO Regulator - The 3.3V LDO Regulator generates the 3.3V reference voltage for driving the USB transceiver cell output buffers. It requires an external decoupling capacitor to be attached to the 3V3OUT regulator output pin. It also provides 3.3V power to the 1.5kΩ internal pull up resistor on USBDP. The main function of this block is to power the USB Transceiver and the Reset Generator Cells rather than to power external logic. However, external circuitry requiring a 3.3V nominal supply at a current of around than 50mA could also draw its power from the 3V3OUT pin, if required. USB Transceiver - The USB Transceiver Cell provides the USB 1.1 / USB 2.0 full-speed physical interface to the USB cable. The output drivers provide 3.3V level slew rate control signalling, whilst a differential receiver and two single ended receivers provide USB data in, SEO and USB Reset condition detection. This Cell also incorporates internal USB series resistors on the USB data lines, and a 1.5kΩ pull up resistor on USBDP. USB DPLL - The USB DPLL cell locks on to the incoming NRZI USB data and provides separate recovered clock and data signals to the SIE block. Internal 12MHz Oscillator - The Internal 12MHz Oscillator cell generates a 12MHz reference clock input to the x4 Clock multiplier. The 12MHz Oscillator is also used as the reference clock for the SIE, USB Protocol Engine and UART FIFO controller blocks Clock Multiplier / Divider - The Clock Multiplier / Divider takes the 12MHz input from the Oscillator Cell and generates the 48MHz, 24MHz, 12MHz, and 6MHz reference clock signals. The 48Mz clock reference is used for the USB DPLL and the Baud Rate Generator blocks. Rev. 01 HT8232R Serial Interface Engine (SIE) - The Serial Interface Engine (SIE) block performs the Parallel to Serial and Serial to Parallel conversion of the USB data. In accordance to the USB 2.0 specification, it performs bit stuffing / un-stuffing and CRC5 / CRC16 generation / checking on the USB data stream. USB Protocol Engine - The USB Protocol Engine manages the data stream from the device USB control endpoint. It handles the low level USB protocol (Chapter 9) requests generated by the USB host controller and the commands for controlling the functional parameters of the UART. FIFO TX Buffer (128 bytes) - Data from the USB data out endpoint is stored in the FIFO TX buffer and removed from the buffer to the UART transmit register under control of the UART FIFO controller. FIFO RX Buffer (256 bytes) - Data from the UART receive register is stored in the FIFO RX buffer prior to being removed by the SIE on a USB request for data from the device data in endpoint. UART FIFO Controller - The UART FIFO controller handles the transfer of data between the FIFO RX and TX buffers and the UART transmit and receive registers. UART Controller with Programmable Signal Inversion and High Drive - Together with the UART FIFO Controller the UART Controller handles the transfer of data between the FIFO RX and FIFO TX buffers and the UART transmit and receive registers. It performs asynchronous 7 / 8 bit Parallel to Serial and Serial to Parallel conversion of the data on the RS232 (RS422 and RS485) interface. Control signals supported by UART mode include RTS, CTS, DSR , DTR, DCD and RI. The UART Controller also provides a transmitter enable control signal pin option (TXDEN) to assist with interfacing to RS485 transceivers. RTS / CTS, DSR / DTR and X-On / X-Off handshaking options are also supported. Handshaking, where required, is handled in hardware to ensure fast response times. The UART also supports the RS232 BREAK setting and detection conditions. A new feature, programmable in the internal EEPROM allows the UART signals to each be individually inverted. Another new EEPROM programmable feature allows a high signal drive strength to be enabled on the UART interface and CBUS pins. Baud Rate Generator - The Baud Rate Generator provides a x16 clock input to the UART Controller from the 48MHz reference clock and consists of a 14 bit prescaler and 3 register bits which provide fine tuning of the baud rate (used to divide by a number plus a fraction or “sub-integer”). This determines the Baud Rate of the UART, which is programmable from 183 baud to 3 million baud. The HT8232R supports all standard baud rates and non-standard baud rates from 300 Baud up to 3 Megabaud. Achievable non-standard baud rates are calculated as follows Baud Rate = 3000000 / (n + x) where n can be any integer between 2 and 16,384 ( = 214 ) and x can be a sub-integer of the value 0, 0.125, 0.25, 0.375, 0.5, 0.625, 0.75, or 0.875. When n = 1, x = 0, i.e. baud rate divisors with values between 1 and 2 are not possible. RESET Generator - The integrated Reset Generator Cell provides a reliable power-on reset to the device internal circuitry on power up. A RESET# input pin is provided to allow other devices to reset the HT8232R. RESET# can be tied to VCCIO or left unconnected, unless it is a requirement to reset the device from external logic or an external reset generator I.C. Rev. 01 HT8232R Device Pin Out and Signal Descriptions SSOP28 Package TXD 28 1 OSCO DTR# OSCI RTS# TEST VCCIO AGND RXD NC RI# CBUS0 GND CBUS1 NC GND DSR# VCC DCD# RESET# CTS# GND CBUS4 3V3OUT CBUS2 USBDM CBUS3 4 20 14 15 VCCIO TXD VCC RXD 16 USBDM RTS# 15 USBDP CTS# DTR# 8 19 24 NC DSR# HT8232R RESET# NC DCD# 27 OSCI 28 OSCO RI# CBUS0 CBUS1 17 3V3OUT A G N D 25 G N D 7 G N D 18 T E S T G N D 21 CBUS2 CBUS3 CBUS4 USBDP 1 5 3 11 2 9 10 6 23 22 13 14 12 26 Rev. 01 HT8232R QFN-32 Package 32 25 TOP 1 24 8 17 9 DTR# RTS# 28 NC 27 TXD OSCI 26 25 OSCO NC TEST BOTTOM 16 29 30 31 32 AGND 24 1 VCCIO NC 23 2 RXD CBUS0 22 3 RI# CBUS1 21 4 GND GND 20 5 NC VCC 19 6 DSR# RESET# 18 7 DCD# GND 17 8 CTS# 13 12 11 10 9 NC NC CBUS3 CBUS2 CBUS4 3V3OUT 1 19 14 USBDP 15 USBDM 16 VCCIO TXD VCC RXD 15 USBDM RTS# 14 5 12 13 25 29 18 23 27 28 16 USBDP CTS# NC NC DTR# NC DSR# HT8232R NC NC DCD# RI# RESET# NC CBUS0 OSCI OSCO 3V3OUT A G N D 24 CBUS1 G N D 4 G N D 17 T E S T G N D 20 CBUS2 CBUS3 CBUS4 30 2 32 8 31 6 7 3 22 21 10 11 9 26 Rev. 01 HT8232R SSOP-28 Package Signal Descriptions Pin No. Name Type Description USB Interface Group 15 USBDP I/O USB Data Signal Plus, incorporating internal series resistor and 1.5kΩ pull up resistor to 3.3V 16 USBDM I/O USB Data Signal Minus, incorporating internal series resistor. Power and Ground Group 4 VCCIO PWR +1.8V to +5.25V supply to the UART Interface and CBUS group pins (1...3, 5, 6, 9...14, 22, 23). In USB bus powered designs connect to 3V3OUT to drive out at 3.3V levels, or connect to VCC to drive out at 5V CMOS level. This pin can also be supplied with an external 1.8V - 2.8V supply in order to drive out at lower levels. It should be noted that in this case this supply should originate from the same source as the supply to Vcc. This means that in bus powered designs a regulator which is supplied by the 5V on the USB bus should be used. 7, 18, 21 GND PWR Device ground supply pins 17 3V3OUT Output 3.3V output from integrated L.D.O. regulator. This pin should be decoupled to ground using a 100nF capacitor. The prime purpose of this pin is to provide the internal 3.3V supply to the USB transceiver cell and the internal 1.5kΩ pull up resistor on USBDP. Up to 50mA can be drawn from this pin to power external logic if required. This pin can also be used to supply the HT8232R’s VCCIO pin. 20 VCC PWR 3.3V to 5.25V supply to the device core. 25 AGND PWR Device analog ground supply for internal clock multiplier Miscellaneous Signal Group 8, 24 NC NC No internal connection. 19 RESET# Input Can be used by an external device to reset the HT8232R. If not required can be left unconnected, or pulled up to VCCIO. 26 TEST Input Puts the device into I.C. test mode. Must be tied to GND for normal operation. 27 OSCI Input Input to 12MHz Oscillator Cell. Optional - Can be left unconnected for normal operation. * 28 OSCO Output Output from 12MHz Oscillator Cell. Optional - Can be left unconnected for normal operation if internal oscillator is used. * UART Interface and CBUS Group 1 TXD Output Transmit Asynchronous Data Output. 2 DTR# Output Data Terminal Ready Control Output / Handshake signal. 3 RTS# Output Request To Send Control Output / Handshake signal. 5 RXD Input Receive Asynchronous Data Input. 6 RI# Input Ring Indicator Control Input. When remote wake up is enabled in the internal EEPROM taking RI# low can be used to resume the PC USB host controller from suspend. 9 DSR# Input Data Set Ready Control Input / Handshake signal. 10 DCD# Input Data Carrier Detect Control input. 11 CTS# Input Clear to Send Control input / Handshake signal. 12 CBUS4 I/O Configurable CBUS I/O Pin. Function of this pin is configured in the device internal EEPROM. Factory Default function is SLEEP#. See CBUS Signal Options, Table 3. 13 CBUS2 I/O Configurable CBUS I/O Pin. Function of this pin is configured in the device internal EEPROM. Factory Default function is TXDEN. See CBUS Signal Options, Table 3. 14 CBUS3 I/O Configurable CBUS I/O Pin. Function of this pin is configured in the device internal EEPROM. Factory Default function is PWREN#. See CBUS Signal Options, Table 3. 22 CBUS1 I/O Configurable CBUS I/O Pin. Function of this pin is configured in the device internal EEPROM. Factory Default function is RXLED#. See CBUS Signal Options, Table 3. 23 CBUS0 I/O Configurable CBUS I/O Pin. Function of this pin is configured in the device internal EEPROM. Factory Default function is TXLED#. See CBUS Signal Options, Table 3. Rev. 01 HT8232R QFN-32 Package 32 25 TOP 1 24 8 17 9 16 DTR# RTS# 28 NC 27 TXD OSCI 26 25 OSCO NC TEST BOTTOM 29 30 31 32 AGND 24 1 VCCIO 23 2 RXD CBUS0 22 3 RI# NC CBUS1 21 4 GND GND 20 5 NC VCC 19 6 DSR# RESET# 18 7 DCD# GND 17 8 CTS# 13 12 11 10 9 NC NC CBUS3 CBUS2 CBUS4 3V3OUT 1 19 14 USBDP 15 USBDM 16 VCCIO TXD VCC RXD 15 USBDM RTS# 14 5 12 13 25 29 18 23 27 28 16 USBDP CTS# NC NC DTR# NC DSR# HT8232R NC NC DCD# RI# RESET# NC CBUS0 OSCI OSCO CBUS1 3V3OUT A G N D 24 G N D 4 G N D 17 T E S T G N D 20 CBUS2 CBUS3 CBUS4 30 2 32 8 31 6 7 3 22 21 10 11 9 26 Rev. 01 HT8232R QFN Package Pin Out Description Pin No. Name Type Description USB Interface Group 14 USBDP I/O USB Data Signal Plus, incorporating internal series resistor and 1.5kΩ pull up resistor to 3.3V 15 USBDM I/O USB Data Signal Minus, incorporating internal series resistor. Power and Ground Group 1 VCCIO PWR +1.8V to +5.25V supply to UART Interface and CBUS group pins (2,3, 6, ...,11, 21, 22, 30,..32). In USB bus powered designs connect to 3V3OUT to drive out at 3.3V levels, or connect to VCC to drive out at 5V CMOS level. This pin can also be supplied with an external 1.8V - 2.8V supply in order to drive out at lower levels. It should be noted that in this case this supply should originate from the same source as the supply to Vcc. This means that in bus powered designs a regulator which is supplied by the 5V on the USB bus should be used. Device ground supply pins 4, 17, 20 GND PWR 16 3V3OUT Output 3.3V output from integrated L.D.O. regulator. This pin should be decoupled to ground using a 100nF capacitor. The prime purpose of this pin is to provide the internal 3.3V supply to the USB transceiver cell and the internal 1.5kΩ pull up resistor on USBDP. Up to 50mA can be drawn from this pin to power external logic if required. This pin can also be used to supply the HT8232R’s VCCIO pin. 19 VCC PWR 3.3V to 5.25V supply to the device core. 24 AGND PWR Device analog ground supply for internal clock multiplier Miscellaneous Signal Group 5, 12, 13, 23, 25, 29 NC NC No internal connection. 18 RESET# Input Can be used by an external device to reset the HT8232R. If not required can be left unconnected or pulled up to VCCIO. 26 TEST Input Puts the device into I.C. test mode. Must be tied to GND for normal operation. 27 OSCI Input Input to 12MHz Oscillator Cell. Optional - Can be left unconnected for normal operation. * 28 OSCO Output Output from 12MHz Oscillator Cell. Optional - Can be left unconnected for normal operation if internal oscillator is used. * UART Interface and CBUS Group ** 30 TXD Output Transmit Asynchronous Data Output. 31 DTR# Output Data Terminal Ready Control Output / Handshake signal. 32 RTS# Output Request To Send Control Output / Handshake signal. 2 RXD Input Receive Asynchronous Data Input. 3 RI# Input Ring Indicator Control Input. When remote wake up is enabled in the internal EEPROM taking RI# low can be used to resume the PC USB host controller from suspend. 6 DSR# Input Data Set Ready Control Input / Handshake signal. 7 DCD# Input Data Carrier Detect Control input. 8 CTS# Input Clear to Send Control input / Handshake signal. 9 CBUS4 I/O Configurable CBUS I/O Pin. Function of this pin is configured in the device internal EEPROM. Factory Default function is SLEEP#. See CBUS Signal Options, Table 3. 10 CBUS2 I/O Configurable CBUS I/O Pin. Function of this pin is configured in the device internal EEPROM. Factory Default function is TXDEN. See CBUS Signal Options, Table 3. 11 CBUS3 I/O Configurable CBUS I/O Pin. Function of this pin is configured in the device internal EEPROM. Factory Default function is PWREN#. See CBUS Signal Options, Table 3. 21 CBUS1 I/O Configurable CBUS I/O Pin. Function of this pin is configured in the device internal EEPROM. Factory Default function is RXLED#. See CBUS Signal Options, Table 3. 22 CBUS0 I/O Configurable CBUS I/O Pin. Function of this pin is configured in the device internal EEPROM. Factory Default function is TXLED#. See CBUS Signal Options, Table 3. Rev. 01 HT8232R CBUS Signal Options CBUS Signal Option Available On CBUS Pin... Description TXDEN CBUS0, CBUS1, CBUS2, CBUS3, CBUS4 Enable transmit data for RS485 PWREN# CBUS0, CBUS1, CBUS2, CBUS3, CBUS4 Goes low after the device is configured by USB, then high during USB suspend. Can be used to control power to external logic PChannel logic level MOSFET switch. Enable the interface pull-down option when using the PWREN# pin in this way. TXLED# CBUS0, CBUS1, CBUS2, CBUS3, CBUS4 Transmit data LED drive - pulses low when transmitting data via USB. See Section 9 for more details. RXLED# CBUS0, CBUS1, CBUS2, CBUS3, CBUS4 Receive data LED drive - pulses low when receiving data via USB. See Section 9 for more details. TX&RXLED# CBUS0, CBUS1, CBUS2, CBUS3, CBUS4 LED drive - pulses low when transmitting or receiving data via USB. See Section 9 for more details. SLEEP# CBUS0, CBUS1, CBUS2, CBUS3, CBUS4 Goes low during USB suspend mode. Typically used to power down an external TTL to RS232 level converter I.C. in USB to RS232 converter designs. CLK48 CBUS0, CBUS1, CBUS2, CBUS3, CBUS4 48MHz Clock output. CLK24 CBUS0, CBUS1, CBUS2, CBUS3, CBUS4 24MHz Clock output. CLK12 CBUS0, CBUS1, CBUS2, CBUS3, CBUS4 12MHz Clock output. CLK6 CBUS0, CBUS1, CBUS2, CBUS3, CBUS4 6MHz Clock output. CBitBangI/O CBUS0, CBUS1, CBUS2, CBUS3 CBUS bit bang mode option. Allows up to 4 of the CBUS pins to be used as general purpose I/O. Configured individually for CBUS0, CBUS1, CBUS2 and CBUS3 in the internal EEPROM. A separate application note will describe in more detail how to use CBUS bit bang mode. BitBangWRn CBUS0, CBUS1, CBUS2, CBUS3 Synchronous and asynchronous bit bang mode WR# strobe Output BitBangRDn CBUS0, CBUS1, CBUS2, CBUS3 Synchronous and asynchronous bit bang mode RD# strobe Output Rev. 01 HT8232R QFN-32 Package Typical Pad Layout Top View 0.25 25 0.150 Max 1 0.500 3.200 +/-0.100 0.30 Optional GND Connection 3.200 +/-0.100 Optional GND Connection 0.20 0.25 17 0.200 Min 9 0.100 0.500 +/-0.050 QFN-32 Package Typical Solder Paste Diagram Top View 0.25 25 1 0.150 Max 0.60 0.500 0.60 0.20 0.70 0.40 0.30 0.20 0.30 0.25 17 0.200 Min 0.100 9 0.500 +/-0.050 Rev. 01 HT8232R Solder Reflow Profile The HT8232R is supplied in Pb free 28 LD SSOP and QFN-32 packages. The recommended solder reflow profile for both package options is shown in Figure 10. Temperature, T (Degrees C) tp Tp Critical Zone: when T is in the range TL to Tp Ramp Up TL t L TS Max Ramp Down TS Min tS Preheat 25 T = 25ºC to TP Time, t (seconds) The recommended values for the solder reflow profile are detailed in Table 4. Values are shown for both a completely Pb free solder process (i.e. the HT8232R is used with Pb free solder), and for a non-Pb free solder process (i.e. the HT8232R is used with non-Pb free solder). Table 4 - Reflow Profile Parameter Values Profile Feature Pb Free Solder Process Non-Pb Free Solder Process Average Ramp Up Rate (Ts to Tp) 3°C / second Max. 3°C / Second Max. Preheat - Temperature Min (TS Min.) - Temperature Max (TS Max.) - Time (tS Min to tS Max) 150°C 200°C 60 to 120 seconds 100°C 150°C 60 to 120 seconds Time Maintained Above Critical Temperature T L: - Temperature (TL) - Time (tL) 217°C 60 to 150 seconds 183°C 60 to 150 seconds 260°C 240°C Peak Temperature (T P) Time within 5°C of actual Peak Temperature (t P) 20 to 40 seconds 20 to 40 seconds Ramp Down Rate 6°C / second Max. 6°C / second Max. 8 minutes Max. 6 minutes Max. Time for T= 25°C to Peak Temperature, Tp Rev. 01 HT8232R The absolute maximum ratings for the HT8232R devices are as follows. These are in accordance with the Absolute Maximum Rating System (IEC 60134). Exceeding these may cause permanent damage to the device. Absolute Maximum Ratings Parameter Value Unit Storage Temperature Floor Life (Out of Bag) At Factory Ambient ( 30°C / 60% Relative Humidity) -65°C to 150°C 168 Hours (IPC/JEDEC J-STD-033A MSL Level 3 Compliant)* Degrees C Hours Ambient Temperature (Power Applied) -40°C to 85°C Degrees C. Vcc Supply Voltage -0.5 to +6.00 V D.C. Input Voltage - USBDP and USBDM -0.5 to +3.8 V D.C. Input Voltage - High Impedance Bidirectionals -0.5 to +(Vcc +0.5) V D.C. Input Voltage - All other Inputs -0.5 to +(Vcc +0.5) V D.C. Output Current - Outputs 24 mA DC Output Current - Low Impedance Bidirectionals 24 mA Power Dissipation (Vcc = 5.25V) 500 mW * If devices are stored out of the packaging beyond this time limit the devices should be baked before use. The devices should be ramped up to a temperature of 125 °C and baked for up to 17 hours. DC Characteristics DC Characteristics ( Ambient Temperature = -40oC to +85oC ) Operating Voltage and Current Parameter Description Min Typ Max Units Vcc1 VCC Operating Supply Voltage 3.3 - 5.25 V Conditions Vcc2 VCCIO Operating Supply Voltage 1.8 - 5.25 V Icc1 Operating Supply Current - 15 - mA Normal Operation Icc2 Operating Supply Current 50 70 100 μA USB Suspend UART and CBUS I/O Pin Characteristics (VCCIO = 5.0V, Standard Drive Level) Parameter Description Min Typ Max Units Conditions Voh Output Voltage High 3.2 4.1 4.9 V I source = 2mA Vol Output Voltage Low 0.3 0.4 0.6 V I sink = 2mA Vin Input Switching Threshold 1.3 1.6 1.9 V ** VHys Input Switching Hysteresis 50 55 60 mV ** UART and CBUS I/O Pin Characteristics (VCCIO = 3.3V, Standard Drive Level) Parameter Description Min Typ Max Units Conditions Voh Output Voltage High 2.2 2.7 3.2 V I source = 1mA Vol Output Voltage Low 0.3 0.4 0.5 V I sink = 2mA Vin Input Switching Threshold 1.0 1.2 1.5 V ** VHys Input Switching Hysteresis 20 25 30 mV ** Rev. 01 HT8232R UART and CBUS I/O Pin Characteristics (VCCIO = 2.8V, Standard Drive Level) Parameter Description Min Typ Max Units Conditions Voh Output Voltage High 2.1 2.6 3.1 V I source = 1mA Vol Output Voltage Low 0.3 0.4 0.5 V I sink = 2mA Vin Input Switching Threshold 1.0 1.2 1.5 V ** VHys Input Switching Hysteresis 20 25 30 mV ** UART and CBUS I/O Pin Characteristics (VCCIO = 5.0V, High Drive Level) Parameter Description Min Typ Max Units Conditions Voh Output Voltage High 3.2 4.1 4.9 V I source = 6mA Vol Output Voltage Low 0.3 0.4 0.6 V I sink = 6mA Vin Input Switching Threshold 1.3 1.6 1.9 V ** VHys Input Switching Hysteresis 50 55 60 mV ** UART and CBUS I/O Pin Characteristics (VCCIO = 3.3V, High Drive Level) Parameter Description Voh Min Typ Max Units Conditions Vol Output Voltage High 2.2 2.8 3.2 V I source = 3mA Output Voltage Low 0.3 0.4 0.6 V I sink = 8mA Vin Input Switching Threshold 1.0 1.2 1.5 V ** VHys Input Switching Hysteresis 20 25 30 mV ** UART and CBUS I/O Pin Characteristics (VCCIO = 2.8V, High Drive Level) Parameter Description Min Typ Max Units Conditions Voh Vol Output Voltage High 2.1 2.8 3.2 V I source = 3mA Output Voltage Low 0.3 0.4 0.6 V I sink = 8mA Vin Input Switching Threshold 1.0 1.2 1.5 V ** VHys Input Switching Hysteresis 20 25 30 mV ** Min Typ Max Units **Inputs have an internal 200kΩ pull-up resistor to VCCIO. RESET# and TEST Pin Characteristics Parameter Description Vin Input Switching Threshold 1.3 1.6 1.9 V VHys Input Switching Hysteresis 50 55 60 mV Min Typ Conditions USB I/O Pin (USBDP, USBDM) Characteristics Parameter Description Max Units UVoh I/O Pins Static Output ( High) 2.8 3.6 V Conditions RI = 1.5kΩ to 3V3Out ( D+ ) RI = 15kΩ to GND ( D- ) UVol I/O Pins Static Output ( Low ) 0 0.3 V RI = 1.5kΩ to 3V3Out ( D+ ) RI = 15kΩ to GND ( D- ) UVse Single Ended Rx Threshold 0.8 2.0 V UCom Differential Common Mode 0.8 2.5 V UVDif Differential Input Sensitivity 0.2 UDrvZ Driver Output Impedance 26 V 29 44 Ohms *** ***Driver Output Impedance includes the internal USB series resistors on USBDP and USBDM pins. Rev. 01 HT8232R EEPROM Reliability Characteristics The internal 1024 Bit EEPROM has the following reliability characteristicsEEPROM Characteristics Parameter Description Value Data Retention Read / Write Cycles Unit 15 Years 100,000 Cycles Internal Clock Characteristics The internal Clock Oscillator has the following characteristics. Internal Clock Characteristics Parameter Value Unit Min Typical Max Frequency of Operation 11.98 12.00 12.02 MHz**** Clock Period 83.19 83.33 83.47 ns 45 50 55 % Duty Cycle ****Equivalent to +/-1667ppm. OSCI, OSCO Pin Characteristics (Optional - Only applies if external Oscillator is used*****) Parameter Description Voh Output Voltage High Min Typ Max Units Conditions 2.8 - 3.6 V Fosc = 12MHz Fosc = 12MHz Vol Output Voltage Low 0.1 - 1.0 V Vin Input Switching Threshold 1.8 2.5 3.2 V Rev. 01 HT8232R Bus Powered Configuration Vcc Ferrite Bead 1 TXD VCC RXD 2 USBDM 3 USBDP RTS# CTS# 4 10nF VCCIO + DTR# NC 5 RESET# SHIELD DSR# HT8232R NC DCD# OSCI RI# OSCO GND CBUS0 Vcc CBUS1 100nF 4.7uF + 100nF GND 3V3OUT A G N D G N D G N D G N D T E S T CBUS2 CBUS3 CBUS4 GND GND Figure 11 illustrates the HT8232R in a typical USB bus powered design configuration. A USB Bus Powered device gets its power from the USB bus. Basic rules for USB Bus power devices are as follows – i) On plug-in to USB, the device must draw no more than 100mA. ii) On USB Suspend the device must draw no more than 500μA. iii) A Bus Powered High Power USB Device (one that draws more than 100mA) should use one of the CBUS pins configured as PWREN# and use it to keep the current below 100mA on plug-in and 500μA on USB suspend. iv) A device that consumes more than 100mA can not be plugged into a USB Bus Powered Hub. v) No device can draw more that 500mA from the USB Bus. Rev. 01 HT8232R Self Powered Configuration TXD 1 VCC = 3.3V - 5V VCC RXD 2 USBDM 3 USBDP RTS# CTS# 4 VCCIO 4k7 DTR# NC 5 RESET# SHIELD HT8232R DSR# NC GND 10k DCD# OSCI RI# OSCO GND CBUS0 VCC CBUS1 100nF 100nF 4.7uF + 100nF GND 3V3OUT A G N D G N D G N D G N D T CBUS2 E S CBUS3 T CBUS4 GND GND Figure 12 illustrates the HT8232R in a typical USB self powered configuration. A USB Self Powered device gets its power from its own power supply and does not draw current from the USB bus. The basic rules for USB Self powered devices are as follows – i) A Self Powered device should not force current down the USB bus when the USB Host or Hub Controller is powered down. ii) A Self Powered Device can use as much current as it likes during normal operation and USB suspend as it has its own power supply. iii) A Self Powered Device can be used with any USB Host and both Bus and Self Powered USB Hubs The power descriptor in the internal EEPROM should be programmed to a value of zero (self powered). In order to meet requirement (i) the USB Bus Power is used to control the RESET# Pin of the HT8232R device. When the USB Host or Hub is powered up the internal 1.5kΩ resistor on USBDP is pulled up to 3.3V, thus identifying the device as a full speed device to USB. When the USB Host or Hub power is off, RESET# will go low and the device will be held in reset. As RESET# is low, the internal 1.5kΩ resistor will not be pulled up to 3.3V, so no current will be forced down USBDP via the 1.5kΩ pull-up resistor when the host or hub is powered down. Failure to do this may cause some USB host or hub controllers to power up erratically. Figure 10 illustrates a self powered design which has a 3.3V - 5V supply. A design which is interfacing to 2.8V - 1.8V logic would have a 2.8V - 1.8V supply to VCCIO, and a 3.3V - 5V supply to VCC Note : When the HT8232R is in reset, the UART interface pins all go tri-state. These pins have internal 200kΩ pull-up resistors to VCCIO, so they will gently pull high unless driven by some external logic. Rev. 01 HT8232R USB Bus Powered with Power Switching Configuration P-Channel Powe r MOSFET s Switched 5V Power to External Logic d 0.1uF 0.1uF g Soft Start Circuit 1k Ferrite Bead 1 TXD 5V VCC VCC RXD 2 USBDM 3 USBDP RTS# CTS# 4 10nF + VCCIO DTR# NC 5 DSR# RESET# SHIELD HT8232R NC DCD# OSCI GND RI# OSCO CBUS0 5V VCC CBUS1 100nF 4.7uF + 100nF GND 3V3OUT A G N D G N D G N D G N D T E S T CBUS2 CBUS3 PWREN# CBUS4 GND GND USB Bus powered circuits need to be able to power down in USB suspend mode in order to meet the