X2000/E
IoT Application Processor
Data Sheet
Release Date: Jul 21, 2020
X2000/E IoT Application Processor
Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
Disclaimer
This documentation is provided for use with Ingenic products. No license to Ingenic property rights is
granted. Ingenic assumes no liability, provides no warranty either expressed or implied relating to the
usage, or intellectual property right infringement except as provided for by Ingenic Terms and
Conditions of Sale.
Ingenic products are not designed for and should not be used in any medical or life sustaining or
supporting equipment.
All information in this document should be treated as preliminary. Ingenic may make changes to this
document without notice. Anyone relying on this documentation should contact Ingenic for the current
documentation and errata.
Ingenic Semiconductor Co., Ltd.
Ingenic Headquarters, East Bldg. 14, Courtyard #10,
Xibeiwang East Road, Haidian District, Beijing 100193, China
Tel: 86-10-56345000
Fax: 86-10-56345001
Http: //www.ingenic.com
CONTENTS
CONTENTS
1 Overview ............................................................................................ 4
1.1
Block Diagram ......................................................................................................................... 4
1.2
Features .................................................................................................................................. 5
1.2.1
CPU Core......................................................................................................................... 5
1.2.2
Video Process Unit(VPU) ................................................................................................ 5
1.2.3
Image Signal Processor(ISPx2)....................................................................................... 5
1.2.4
Memory Interface ............................................................................................................. 6
1.2.5
Audio ................................................................................................................................ 6
1.2.6
MIPI-CSI .......................................................................................................................... 7
1.2.7
Camera ............................................................................................................................ 7
1.2.8
Display ............................................................................................................................. 7
1.2.9
System Functions ............................................................................................................ 7
1.2.10
Peripherals ....................................................................................................................... 9
1.2.11
Bootrom ......................................................................................................................... 11
2 PAD Information ............................................................................... 12
2.1
Pin Map ................................................................................................................................. 12
2.2
Pin Description ...................................................................................................................... 14
2.2.1
GPIO Group A ................................................................................................................ 14
2.2.2
GPIO Group B................................................................................................................ 15
2.2.3
GPIO Group C ............................................................................................................... 17
2.2.4
GPIO Group D ............................................................................................................... 19
2.2.5
GPIO Group E................................................................................................................ 20
2.3
X2000/E Analog PAD DESCRIPTION ................................................................................... 21
2.4
X2000/E Digital PAD DESCRIPTION .................................................................................... 26
3 Electrical Specifications.................................................................... 32
3.1
Absolute Maximum Ratings................................................................................................... 32
3.2
Recommended operating conditions ..................................................................................... 33
3.3
DC Specifications .................................................................................................................. 34
3.4
Audio codec ........................................................................................................................... 40
3.5
Power On, Reset and BOOT ................................................................................................. 41
3.5.1
Power-On Timing ........................................................................................................... 41
3.5.2
Reset procedure ............................................................................................................ 42
3.5.3
BOOT ............................................................................................................................. 43
4 Packaging Information...................................................................... 45
4.1
Overview................................................................................................................................ 45
4.2
Device Dimensions ................................................................................................................ 45
4.3
Solder Ball Materials ............................................................................................................. 46
4.4
Moisture Sensitivity Level ...................................................................................................... 46
3
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
Overview
1 Overview
X2000/E is a low power consumption, high performance and high integrated application processor,
the application is focus on IoT devices. And it can match the requirements of many other embedded
products.
NAME
X2000
X2000E
1.1
SIP LPDDR
128MB, LPDDR3
256MB, LPDDR2
RGMII
x1
x2
Block Diagram
Figure 1-1 X2000/E Diagram
4
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
Overview
1.2
Features
1.2.1
CPU Core
XBurst® 2, at 1.2GHz, Dual Core, Dual-issue, high performance and low power
implementation of MIPS32 ISA R5
MIPS32 ISA R5 plus MIPS SIMD instruction set architecture:128bit MSA
Ingenic SIMD instruction set architecture: 128bit MXA
Dual-issue, superscalar, super pipeline with Simultaneous Multi-Threading (SMT)
– 2 hardware threads per physical core
– Quad instruction fetch per cycle
– Dual issue instructions per cycle per thread
32KB L1 D cache +32K L1 I cache ，512 KB L2 cache，32KB SRAM
High-performance Floating-point Unit and SIMD Engine: FSE
– 32 x 128-bit register set, 128-bit loads/stores to/from SIMD unit
– IEEE-754 2008 compliant
Programmable Memory Management Unit (MMU)
– 1st level mini-TLBs (MTLBs) – 8 x 2 entry instruction TLB, 16 x 2 entry data TLB
– 2nd level TLBs: 32 × 2 entry VTLB, 256 × 2 entry 4-way set associative FTLB
1.2.2
The XBurst® processor system supports little endian only
Video Process Unit(VPU)
H.264 Encoder
– Input data format NV12/NV21
– Encoding resolution and frame rate up to 1920x1080@30fps
– Support hardware RBSP bytes insertion
– Support auto-read of slice header
– Support reference frame lossless compression
H.264 Decoder
– Output data format NV12/NV21
– Decoding resolution and frame rate up to 1920x1080@30fps
– Support hardware RBSP bytes eliminate
JPEG Codec
– JPEG compressing/decompressing up to 70Mega-pixels per second
– Baseline ISO/IEC 10918-1 JPEG compliant
– 8-bit pixel depth support
– Up to four programmable Quantization tables
– Fully programmable Huffman tables
1.2.3
Image Signal Processor(ISPx2)
Data stream feature
– DVP： raw8 / 10 / 12 / YUV422 input
– MIPI： up to 1080P@60fps
– Support dual-camera sync
5
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
Overview
– Frame data check, make up for lost data and drop redundant data
Advanced feature
– 2A(Auto Exposure/Auto White Balance) supported
– Advanced demosaic, color processing, lens shading, sharpen, static/dynamic defect
pixel and other modules provide high image quality
– 2-D noise reduction filter
1.2.4
Memory Interface
DDR Controller
– Support LPDDR2, LPDDR3, 16Bit bus width, clock up to 800MHz
– 128MB/256MB memory in package,
X2000: 128MB SIP LPDDR3
X2000E: 256MB SIP LPDDR2
SFC Controller
– 1 group clock and CE pad
– Two Quad SPI, one Octal SPI ( SFC0/1 )
– Support Standard, Dual, Quad SPI and Octal DDR protocol
– Clock frequency up to 80MHz in SDR mode
– Support multiple transfer modes, standard SPI, dual-output/dual-Input SPI, QuadOutput/Quad-Input SPI, Dual-I/O SPI, Quad-I/O SPI, Full Dual-I/O SPI, Full Quad-I/O
SPI, and Octal-I/O
1.2.5
Audio
Digital Microphone Array Controller
– Support 8 channels digital MIC
– 24/16bit precision internal controller, sample rate support 8K, 16K, 32K, 48K and 96K
– SNR: 90dB, THD: -90dB @ FS -20dB
– Linear high pass filter include. Attenuation: -2.9dB@100Hz, -22dB@27Hz. -36dB@10Hz
– Low power voice trigger when waiting to start talking.
– Support voice data pre-fetch when trigger enable and the data interface disable, but do
not increase the power dissipation.
– Support low power voice trigger enable
I2S(1~3) / I2S0
– DMA transfer mode supported
– Support share clock mode and split clock mode.
– I2S0: Internal I2S CODEC supported
– Support master mode and slave mode
– Support number of data pin from 1 to 4
– Support six modes of operation for TDM protocol
PCM interface
– Support master mode and slave mode
– Support four modes of operation for PCM
6
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
Overview
DSP NORMAL \ LEFT MODE
PCM NORMAL \ LEFT MOD
S/PDIF(IN and OUT)
– Support IEC 60958-3 compliant, up to 2 channels
– Sample bit support 20-bit and 24-bit two mode
– Sample rate support, all of IEC60958-3 sample rate(44.1k up to 192k)
Internal Audio Codec (DAC and ADC working together )
– 24 bits DAC / ADC
– Sample rate supported: 8k, 12k, 16k, 24k, 32k, 44.1k,48k,96k
– Mono Differential input/output
– DAC : SNR: 90dB A-Weighted, THD: -80dB @FS，-1dB ; ADC: SNR 90dB
1.2.6
MIPI-CSI
MIPI-CSI2(v1.0) interface, resolution up to 1080P@120fps
– Support dual 2-lane mode and single 4-lane mode
– Support 1-lane, 2-lane and 4-lane mode
1.2.7
Camera
Camera interface module(CIM)
– Support DVP 8bit / MIPI input ,resolution up to 1280x720@30fps
– Support snapshot control
– Supported data format: RGB888, RGB565, YCbCr 4:2:2
– Supports ITU656 (YCbCr 4:2:2) input
– Support histogram output and global binarization
1.2.8
Display
MIPI-DSI2(v1.0) interface
Display size up to 1920x1080@40Hz
SLCD controller
– Display size up to 640x480@60Hz, 24BPP
– Supports different size of display panel
RGB controller
– Display size up to 1280x720@60Hz, 24BPP
– Support input format, ARGB8888, ARGB1555, RGB888, RGB565, RGB555, YUV422,
YUV420
– Support 4 modes parallel interface, 24-bit, 18-bit, 16-bit and 8-bit(third times)
– Support frame buffer crop and dither
1.2.9
System Functions
Clock generation and power management
– On-chip oscillator circuit (support 24MHz)
– Two phase-locked loops (PLL) with programmable multiplier
– CCLK, HHCLK, H2CLK, PCLK, H0CLK, DDR_CLK frequency can be changed
7
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
Overview
separately for software by setting registers
– Functional-unit clock gating
– Supply block power shut down
TCU
– 8 channels each channel has two pins
– Support posedge / negedge / dualedge clock counting
– Support gate counting(only count for gating signal)
– Support quadrature counting
– Support direction counting(add / sub because of input signal)
– Support counting after posedge / negedge signal
– Support capture counting, output signal high-level time and total cycle time
– Support exclk / pclk two clock source
PWM
– 16 channels, output signal ~50MHz, signal precision ~500MHz
– Cpu / dma mode to update config
OS timer
– One event timer for one logic core
– One global timer for system time
Interrupt controller
– Total 64 interrupt sources
– Each interrupt source can be independently enabled
Watchdog timer
– A 16-bit Data register and a 16-bit counter
– Programmable interrupt generation prior to timeout
– Counter clock uses the input clock selected by software
EXTAL / RTCCLK can be used as the clock for counter
The division ratio of the clock can be set to 1, 4, 16, 64, 256 and 1024 by software
PDMA Controller
– Support up to 32 independent DMA channels
– Descriptor or No-Descriptor Transfer mode
– Transfer data units: 1-byte, 2-byte, 4-byte, 16-byte, 32-byte, 64-byte, 128-byte
– Transfer number of data unit: 1 ~ 224 - 1
– Independent source and destination port width: 8-bit, 16-bit, 32-bit
– Fixed three priorities of channel groups: 0~3, highest; 4~11: mid; 12~31: lowest
SAR A/D Controller
– 6 Channels
– Resolution: 10-bit
8
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
Overview
RTC (Real Time Clock)
– Need external 32768Hz oscillator for 32KHz clock generation.
– 32-bits second counter
– Programmable and adjustable counter to generate accurate 1 Hz clock
– Alarm interrupt, 1Hz interrupt
– Stand alone power supply, work in hibernating mode
– Power down controller
– Alarm wakeup
– External pin wakeup with up to 2s glitch filter
– Power Detect to Shut down PMU (find Core without voltage then shut PMU other
voltage)
1.2.10 Peripherals
General-Purpose I/O ports
– Input / output / function port configurable
– Low/high, rising/falling edge triggering. Every interrupt source can be masked
independent
Six I2C Controller (I2C0~5)
– Two-wire I2C serial interface – consists of a serial data line (SDA) and a serial clock
(SCL)
– Three speeds mode
Standard mode (100 Kb/s)
Fast mode (400 Kb/s)
High speed mode (3.4Mb/s)
– Programmable SCL generator
– Master or slave I2C operation
– 7-bit addressing/10-bit addressing
– The number of devices that you can connect to the same I2C-bus is limited only by the
maximum bus capacitance of 400pF
One Smart Card Controller (SCC)
– Supports normal card and UIM card.
– Supports asynchronous character (T=0) communication modes.
– Supports asynchronous block (T=1) communication modes.
– Supports setting of clock-rate conversion factor F (372, 512, 558, etc.), and bit-rate
adjustment factor D (1, 2, 4, 8, 16, 32, 12, 20, etc.).
– Supports extra guard time waiting.
– Auto-error detection in T=0 receive mode.
– Auto-character repeat in T=0 transmit mode.
– Transforms inverted format to regular format and vice versa.
– Support stop clock function in some power consuming sensitive applications.
9
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
Overview
Two Synchronous serial interfaces (SSI0~1)
– 3 protocols support: National’s Microwire, TI’s SSP, and Motorola’s SPI
– Full-duplex or transmit-only or receive-only operation
– Programmable transfer order: MSB first or LSB first
– Configurable normal transfer mode or Interval transfer mode
– Programmable clock phase and polarity for Motorola’s SSI format
– Two slave select signal (SSI0_CE0_ / SSI1_CE0_) supporting up to 2 slave devices
– Back-to-back character transmission/reception mode
– Loop back mode for testing
– Data transfer up to 30Mbits/s
Ten UARTs (UART0~9)
– Full-duplex operation
– Baud rate supports 4800, 9600, 19200, 38400, 43000, 56000, 57600, 115200, 230400,
460800, 576000, 921600, 1000000, 1152000, 1500000, 2000000, 2500000, 3000000,
3500000, 4000000, 6000000, 8000000, 12000000
– 5-, 6-, 7- or 8-bit characters with optional no parity or even or odd parity and with 1, 1½,
or 2 stop bits
– Internal diagnostic capability Loopback control and break, parity, overrun and framingerror is provided
– Separate DMA requests for transmit and receive data services in FIFO mode
– Supports modem flow control by software or hardware
Three MMC/SD/SDIO controllers (MSC0,MSC1,SDIO)
– All support eMMC 5.1 (command queueing)
– Support SD Specification 3.0
– Support SD I/O Specification 1.0 with 1 command channel and 4 data channels
– Maximum clock speed is 104MHz
– Both support MMC data width 1bit ,4bit, only MSC0 support 8bit
– Single or multi block access to the card including erase operation
– The maximum block length is 4096bytes
USB 2.0 OTG interface
– Complies with the USB 2.0 standard for high-speed (480 Mbps) functions and with the
On-The-Go supplement to the USB 2.0 specification
–
–
–
–
Support operating as USB peripheral, as USB host
Support split transmission
Support hub
Support remote-wakeup
GMAC controller
– 10/100 Mbps and 1000Mbps operation
10
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
Overview
– Supports RMII and RGMII PHY interfaces
– Support IEEE 1588-2002
Security System
– XBurst® , 240MHz
– Secret ROM and RAM
– Up to 32KB SRAM
– True Random Number Generator
– Encryption Engine
MD5, SHA, SHA2
AES, support 256-bit, 192-bit, 128-bit key size Algorithm
RSA, support 1024/2048-bit key size
– Support secure boot
OTP Slave Interface
– Total 2Kb.
1.2.11 Bootrom
16KB Boot ROM memory and 16KB Security Boot ROM
11
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
PAD Information
2 PAD Information
2.1
Pin Map
12
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
PAD Information
1
MSC0_D6_SFC1_
A DQ2_WP__UART
0_CTS__PD25
2
3
4
5
6
7
12
13
VSS
VDDMEM
VREF
DDR_VDD1
DDRPLL_VCCA
VSS
SD15_SSI0_CLK_ SD9_LCD_VSYN SD3_LCD_D19_R
UART3_RTS__I2
UART9_TXD_PB3 C_SLCD_DC_PB GMAC1_MDC_PB A
C5_SDA_PC28
1
25
19
VDDMEM
VDDMEM
VSS
DDR_VDD1
DDR_VSSA
VSS
SD10_LCD_HSY SD8_LCD_PCLK SD2_LCD_D18_R
UART3_RXD_I2C UART3_TXD_I2C
NC_SLCD_WR_P _SLCD_CE__PB2 GMAC1_RX_DV_ B
4_SCK_PC25
4_SDA_PC26
B26
4
PB18
VSS
VDDMEM
VDDMEM
ZQ
VSS
VDDMEM
VDDMEM
SD7_LCD_D23_I2
SD14_SSI0_DT_
SD4_LCD_D20_R
UART3_CTS__I2
SD0_LCD_D16_P C2_SDA_RGMAC
UART9_RXD_PB
GMAC1_MDIO_P C
C5_SCK_PC27
B16
1_PHY_CLK_PB2
30
B20
3
VSS
VSS
VSS
VSS
VSS
VDDMEM
VDDMEM
SD12_SSI0_CE0_ SD13_SSI0_DR_
WE__LCD_D14_ SA12_LCD_D12_
SD11_LCD_DE_
_UART8_RXD_P UART8_TXD_PB2
SLCD_D14_RGM SLCD_D12_RGM D
SLCD_TE_PB27
B28
9
AC1_RXD2_PB14 AC1_RXD0_PB12
UART3_TXD_PC
I2C5_SCK_PCM_
M_DO_TCK_PD0
DI_TMS_PD04
3
SDIO_CMD_SSI0 SDIO_D1_I2C1_S SDIO_D2_I2C1_S
_DT_PD09
CK_PD11
DA_PD12
MSC0_CMD_SFC
UART2_RXD_I2C
UART3_RXD_PC
SDIO_CLK_SSI0_ SDIO_D0_SSI0_D
UART3_CTS__I2
I2C5_SDA_PCM_
B 0_CE__SSI1_DT_
3_SCK_PWM0_T
M_CLK_TDI_PD0
CLK_PD08
R_PD10
C4_SCK_PD00
SYNC_PD05
PD18
CU0_IN0_PD30
2
MSC0_D1_SFC0_ MSC0_D0_SFC0_ MSC0_D7_SFC1_
C DQ1_I2C2_SCK_ DQ0_SSI1_DR_P DQ3_HOLD__UA
PD20
D19
RT0_RTS__PD26
UART2_TXD_I2C UART3_RTS__I2
SDIO_D3_SSI0_C
3_SDA_PWM1_T C4_SDA_TDO_P
E0__PD13
CU0_IN1_PD31
D01
X2000 Ball Assignment Ver1.0
BGA270, 12mm X 12mm X 1.2mm, 0.65pitch, TOP view
8
9
10
11
MSC0_CLK_SFC MSC0_D2_SFC0_ MSC0_D4_SFC1_ MSC0_D3_SFC0_
D 0_CLK_SSI1_CLK DQ2_WP__I2C2_ DQ0_UART0_RX DQ3_HOLD__SSI
_PD17
E
SDA_PD21
RTC32K_PE23
D_PD23
AVDEFUSE
TRST
1_CE0__PD22
14
15
16
17
18
WAIT__LCD_D15
SD6_LCD_D22_I2 RD__LCD_D13_S
_SLCD_D15_RG
C2_SCK_RGMAC LCD_D13_RGMA
MAC1_RXD3_PB
1_RX_CLK_PB22 C1_RXD1_PB13
15
MSC0_D5_SFC1_
EXCLK_CIM_VIC_
DQ1_UART0_TX
MCLK_PE24
D_PD24
E
F
VDDIO_RTC
WKUP__PE31
PWRON
DRV_VBUS_PE2
2
VSS
VSS
VDD
VDD
VSS
VDD
VDD
VSS
SD1_LCD_D17_R SA11_LCD_D11_ SA10_LCD_D10_ SA9_LCD_D9_SL
GMAC1_TX_EN_ SLCD_D11_RGM SLCD_D10_RGM CD_D9_RGMAC1 F
PB17
AC1_TXD3_PB11 AC1_TXD2_PB10
_TXD1_PB09
G
OSC32_XO
OSC32_XI
PPRST_
TEST_TE
VDDIO
VSS
VDD
VDD
VSS
VDD
VDD
VSS
SD5_LCD_D21_R SA8_LCD_D8_SL
SA6_LCD_D6_SL SA3_LCD_D3_SL
GMAC1_TX_CLK_ CD_D8_RGMAC1 G
CD_D6_PB06
CD_D3_PB03
PB21
_TXD0_PB08
PLL_AVDD
VDD_RTC
VSS_RTC
VDDIO
VSS
VSS
VSS
VSS
VDD
VDD
VDDIO33
SA5_LCD_D5_SL SA1_LCD_D1_SL SA2_LCD_D2_SL
CD_D5_PB05
CD_D1_PB01
CD_D2_PB02
EXCLK_XO
PLL_VDD
PLL_AVSS
VSS
VSS
VSS
VSS
VSS
VDDIO18
SA7_LCD_D7_SL SA4_LCD_D4_SL
CD_D7_PB07
CD_D4_PB04
PLL_VSS
BOOT_SEL1_PE
26
VSS
VDD
VDD
VDD
VDD
VSS
SA0_LCD_D0_SL
CD_D0_PB00
CIM_EXPOSURE I2C3_SDA_I2S2_ BOOT_SEL0_PE
_PA15
RX_BCLK_PA17
25
VSS
VDD
VDD
VSS
VSS
VDD
VDD
VSS
CIM_VIC_PCLK_P VIC_D10_I2S2_R
A14
X_DATA0_PA10
VDDIO33_CIM
VSS
VSS
VSS
VSS
VDD
VDD
N
VIC_D9_UART7_
CIM_VIC_D7_UAR
VIC_D11_I2S2_R
VIC_D8_UART7_
TXD_I2S2_RX_LR
T6_TXD_I2S2_RX
X_DATA1_PA11
RXD_PA08
CK_PA09
_MCLK_PA07
VDDIO18_CIM
VSS
VDDIO18_SD
VDDIO33_SD
VSS
VSS
VDDIO18
P
CIM_VIC_D4_UAR CIM_VIC_D5_UAR CIM_VIC_D6_UAR
T5_RXD_I2S3_TX T5_TXD_I2S3_TX T6_RXD_I2S3_TX
_DATA1_PA04
_DATA2_PA05
_DATA3_PA06
H
J
K
EXCLK_XI
I2C3_SCK_I2S3_ BOOT_SEL2_PE
TX_BCLK_PA16
27
L
CIM_VIC_VSYNC_ CIM_VIC_HSYNC
M I2S2_RX_DATA3_ _I2S2_RX_DATA2
PA13
_PA12
CIM_VIC_D3_UAR CIM_VIC_D2_UAR
R T4_TXD_I2S3_TX T4_RXD_I2S3_TX
_DATA0_PA03
T
AUX4
U SADC_VREFP
V
_LRCK_PA02
AUX2
CIM_VIC_D0_UAR
CIM_VIC_D1_UAR
T4_CTS__I2S3_T
T4_RTS__PA01
X_MCLK_PA00
AUX0
SADC_AVSS
AUX3
AUX5
USB_DM0
AUX1
SADC_AVDD
USB_DP0
USB_AVD09
1
2
3
4
USB_AVSS
USB_VBUS
USB_AVD18
5
USB_ID
USB_AVD33
USB_BIAS
CODEC_MICBIAS
CODEC_AVSS
PWM4_TCU2_IN0 PWM10_TCU5_IN
MSC1_CLK_PWM
MSC1_D3_PWM7
_RGMAC0_TXD2 0_RGMAC0_TX_E
2_TCU1_IN0_PE0
_TCU3_IN1_PE05
_I2S1_RX_DATA_ N_SSI1_DR_UAR
0
SCC_SDA_PC04 T4_RTS__PC10
CODEC_HPOUT MSC1_D2_PWM6 SFC0_CLK_SSI1
N
_TCU3_IN0_PE04
_CLK_PE16
CODEC_MICLN
CODEC_AVDD
CODEC_HPOUT MSC1_D1_PWM5 SFC0_CE__SSI1
P
_TCU2_IN1_PE03
_DT_PE17
CODEC_MICLP
CODEC_VCM
MSC1_CMD_PW
MSC1_D0_PWM4
M3_TCU1_IN1_P
_TCU2_IN0_PE02
E01
6
7
8
9
10
TX_DATAP1
TX_DATAN1
J
TX_DATAP0
TX_CLKP
TX_CLKN
K
DSI_AVSS
DSI_AVD09
TX_DATAN0
VSS
CSI_AVSS
DSI_AVD18
RX_DATAP0
RX_DATAN0
M
VDDIO33
CSI_AVD09
RX_CLKP0
RX_DATAP1
RX_DATAN1
N
PWM0_TCU0_IN0
_PC00
CSI_AVD18
RX_CLKN0
PWM11_TCU5_IN
1_RGMAC0_RX_
DV_SSI1_DT_UA
RT4_RXD_PC11
PWM9_TCU4_IN1 PWM12_TCU6_IN DMIC_IN3_UART1
_RGMAC0_RXD3 0_RGMAC0_MDC _TXD_I2C1_SDA_
_SSI1_CE0__UA _SSI1_CLK_UAR NEMC_CS2__PC
RT4_CTS__PC09 T4_TXD_PC12
24
PWM7_TCU3_IN1 PWM6_TCU3_IN0
PWM14_TCU7_IN
_RGMAC0_RXD1 _RGMAC0_RXD0
SFC0_DQ0_SSI1 0_RGMAC0_TX_
_I2S1_TX_DATA_ _I2S1_TX_LRCK_
_DR_PE18
CLK_SPDIF_OUT
UART6_RXD_PC UART5_TXD_PC0
_I2C0_SDA_PC14
07
6
PWM5_TCU2_IN1
PWM3_TCU1_IN1
SFC0_DQ3_HOL
_RGMAC0_TXD3
SFC0_DQ1_I2C2
_RGMAC0_TXD1
D__SSI1_CE0__P
_I2S1_TX_BCLK_
_SCK_PE19
_I2S1_RX_LRCK_
E21
UART5_RXD_PC
SCC_SCK_PC03
05
PWM2_TCU1_IN0
_RGMAC0_TXD0
SFC0_DQ2_WP_
_I2S1_RX_BCLK_
_I2C2_SDA_PE20
UART7_TXD_PC0
2
11
12
H
13
14
PWM13_TCU6_IN DMIC_IN2_UART1
1_RGMAC0_MDI _RXD_I2C1_SCK
O_SPDIF_IN_I2C _NEMC_CS1__P
0_SCK_PC13
C23
L
P
RX_DATAN2
RX_DATAP2
R
RX_DATAP3
RX_DATAN3
T
PWM8_TCU4_IN0
_RGMAC0_RXD2
DMIC_IN0_UART1
RX_CLKN1
RX_CLKP1
U
_I2S1_TX_MCLK_
_CTS__PC21
UART6_TXD_PC0
8
PWM1_TCU0_IN1
PWM15_TCU7_IN
_RGMAC0_PHY_
1_RGMAC0_RX_
DMIC_IN1_UART1
V
CLK_I2S1_RX_M DMIC_CLK_PC20
CLK_CIM_VIC_M
_RTS__PC22
CLK_UART7_RX
CLK_PC15
D_PC01
15
16
13
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
17
18
PAD Information
2.2
2.2.1
Ball
No.
R4
R3
R2
R1
P2
P3
P4
N4
N3
N2
M4
N1
M2
M1
M3
L2
K1
L3
Pin Description
GPIO Group A
Ball Name
CIM_VIC_D0_ UART4_CTS__
I2S3_TX_MCLK_PA00
CIM_VIC_D1_UART4_RTS__PA01
CIM_VIC_D2_UART4_RXD_I2S3_TX_LRCK_PA02
CIM_VIC_D3_UART4_TXD_I2S3_TX_DATA0_PA03
CIM_VIC_D4_UART5_RXD_I2S3_TX_DATA1_PA04
CIM_VIC_D5_UART5_TXD_I2S3_TX_DATA2_PA05
CIM_VIC_D6_UART6_RXD_I2S3_TX_DATA3_PA06
CIM_VIC_D7_UART6_TXD_I2S2_RX_MCLK_PA07
VIC_D8_UART7_RXD_PA08
VIC_D9_UART7_TXD_I2S2_RX_LRCK_PA09
VIC_D10_I2S2_RX_DATA0_PA10
VIC_D11_I2S2_RX_DATA1_PA11
CIM_VIC_HSYNC_I2S2_RX_DATA2_PA12
CIM_VIC_VSYNC_I2S2_RX_DATA3_PA13
CIM_VIC_PCLK_PA14
CIM_EXPOSURE_PA15
I2C3_SCK_I2S3_TX_BCLK_PA16
I2C3_SDA_I2S2_RX_BCLK_PA17
In/O
ut
Pull
Slew
Rate
Schmitt
GPIO
IO
PU
Yes
Yes
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PD
PD
PD
PD
PU
PU
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Func0
Func1
Func2
GPA[0]
CIM/VIC_D0
UART4_CTS_
I2S3_TX_MCLK
GPA[1]
GPA[2]
GPA[3]
GPA[4]
GPA[5]
GPA[6]
GPA[7]
GPA[8]
GPA[9]
GPA[10]
GPA[11]
GPA[12]
GPA[13]
GPA[14]
GPA[15]
GPA[16]
GPA[17]
CIM/VIC_D1
CIM/VIC_D2
CIM/VIC_D3
CIM/VIC_D4
CIM/VIC_D5
CIM/VIC_D6
CIM/VIC_D7
VIC_D8
VIC_D9
VIC_D10
VIC_D11
CIM_VIC_HSYNC
CIM_VIC_VSYNC
CIM/VIC_PCLK
CIM_EXPOSURE
I2C3_SCK
I2C3_SDA
UART4_RTS_
UART4_RXD
UART4_TXD
UART5_RXD
UART5_TXD
UART6_RXD
UART6_TXD
UART7_RXD
UART7_TXD
14
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
I2S3_TX_LRCK
I2S3_TX_DATA0
I2S3_TX_DATA1
I2S3_TX_DATA2
I2S3_TX_DATA3
I2S2_RX_MCLK
I2S2_RX_LRCK
I2S2_RX_DATA0
I2S2_RX_DATA1
I2S2_RX_DATA2
I2S2_RX_DATA3
I2S3_TX_BCLK
I2S2_RX_BCLK
Power
VDDIO33_CIM
VDDIO33_CIM
VDDIO33_CIM
VDDIO33_CIM
VDDIO33_CIM
VDDIO33_CIM
VDDIO33_CIM
VDDIO33_CIM
VDDIO33_CIM
VDDIO33_CIM
VDDIO33_CIM
VDDIO33_CIM
VDDIO33_CIM
VDDIO33_CIM
VDDIO33_CIM
VDDIO33_CIM
VDDIO33_CIM
VDDIO33_CIM
PAD Information
2.2.2
Ball
No.
K15
H16
H17
G16
J16
H15
G15
J15
G18
F18
F17
F16
D18
E17
D17
E15
C16
F15
B18
A18
GPIO Group B
Ball Name
SA0_LCD_D0_SLCD_D0_PB00
SA1_LCD_D1_SLCD_D1_PB01
SA2_LCD_D2_SLCD_D2_PB02
SA3_LCD_D3_SLCD_D3_PB03
SA4_LCD_D4_SLCD_D4_PB04
SA5_LCD_D5_SLCD_D5_PB05
SA6_LCD_D6_SLCD_D6_PB06
SA7_LCD_D7_SLCD_D7_PB07
SA8_LCD_D8_SLCD_D8_RGM
AC1_TXD0_PB08
SA9_LCD_D9_SLCD_D9_RGM
AC1_TXD1_PB09
SA10_LCD_D10_SLCD_D10_R
GMAC1_TXD2_PB10
SA11_LCD_D11_SLCD_D11_R
GMAC1_TXD3_PB11
SA12_LCD_D12_SLCD_D12_R
GMAC1_RXD0_PB12
RD__LCD_D13_SLCD_D13_RG
MAC1_RXD1_PB13
WE__LCD_D14_SLCD_D14_R
GMAC1_RXD2_PB14
WAIT__LCD_D15_SLCD_D15_
RGMAC1_RXD3_PB15
SD0_LCD_D16_PB16
SD1_LCD_D17_RGMAC1_TX_
EN_PB17
SD2_LCD_D18_RGMAC1_RX_
DV_PB18
SD3_LCD_D19_RGMAC1_MDC
In/
Out
IO
IO
IO
IO
IO
IO
IO
IO
PD
PD
PD
PD
PD
PD
PD
PD
Slew
Rate
No
No
No
No
No
No
No
No
Sch
mitt
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
IO
PD
No
IO
PD
IO
Pull
GPIO
Func0
Func1
Func2
GPB[0]
GPB[1]
GPB[2]
GPB[3]
GPB[4]
GPB[5]
GPB[6]
GPB[7]
SA0
SA1
SA2
SA3
SA4
SA5
SA6
SA7
LCD_D0
LCD_D1
LCD_D2
LCD_D3
LCD_D4
LCD_D5
LCD_D6
LCD_D7
SLCD_D0
SLCD_D1
SLCD_D2
SLCD_D3
SLCD_D4
SLCD_D5
SLCD_D6
SLCD_D7
Yes
GPB[8]
SA8
LCD_D8
SLCD_D8
RGMAC1_TXD0
VDDIO33
No
Yes
GPB[9]
SA9
LCD_D9
SLCD_D9
RGMAC1_TXD1
VDDIO33
PD
No
Yes
GPB[10]
SA10
LCD_D10
SLCD_D10
RGMAC1_TXD2
VDDIO33
IO
PD
No
Yes
GPB[11]
SA11
LCD_D11
SLCD_D11
RGMAC1_TXD3
VDDIO33
IO
PD
No
Yes
GPB[12]
SA12
LCD_D12
SLCD_D12
RGMAC1_RXD0
VDDIO33
IO
PU
No
Yes
GPB[13]
RD_
LCD_D13
SLCD_D13
RGMAC1_RXD1
VDDIO33
IO
PU
No
Yes
GPB[14]
WE_
LCD_D14
SLCD_D14
RGMAC1_RXD2
VDDIO33
IO
PU
No
Yes
GPB[15]
WAIT_
LCD_D15
SLCD_D15
RGMAC1_RXD3
VDDIO33
IO
PU
No
Yes
GPB[16]
SD0
LCD_D16
SLCDRD
IO
PU
No
Yes
GPB[17]
SD1
LCD_D17
IO
PU
No
Yes
GPB[18]
SD2
LCD_D18
IO
PU
No
Yes
GPB[19]
SD3
LCD_D19
15
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
Func3
Power
VDDIO33
VDDIO33
VDDIO33
VDDIO33
VDDIO33
VDDIO33
VDDIO33
VDDIO33
VDDIO33
RGMAC1_TX_EN
RGMAC1_RX_D
V
RGMAC1_MDC
VDDIO33
VDDIO33
VDDIO33
PAD Information
C18
G17
E16
C17
B17
A17
B16
D16
D14
D15
C15
A16
_PB19
SD4_LCD_D20_RGMAC1_MDI
O_PB20
SD5_LCD_D21_RGMAC1_TX_
CLK_PB21
SD6_LCD_D22_I2C2_SCK_RG
MAC1_RX_CLK_PB22
SD7_LCD_D23_I2C2_SDA_RG
MAC1_PHY_CLK_PB23
SD8_LCD_PCLK_SLCD_CE__P
B24
SD9_LCD_VSYNC_SLCD_DC_
PB25
SD10_LCD_HSYNC_SLCD_WR
_PB26
SD11_LCD_DE_SLCD_TE_PB2
7
SD12_SSI0_CE0__UART8_RX
D_PB28
SD13_SSI0_DR_UART8_TXD_
PB29
SD14_SSI0_DT_UART9_RXD_
PB30
SD15_SSI0_CLK_UART9_TXD_
PB31
IO
PU
No
Yes
GPB[20]
SD4
LCD_D20
RGMAC1_MDIO
IO
PU
No
Yes
GPB[21]
SD5
LCD_D21
IO
PU
No
Yes
GPB[22]
SD6
LCD_D22
I2C2_SCK
IO
PU
No
Yes
GPB[23]
SD7
LCD_D23
I2C2_SDA
IO
PU
No
Yes
GPB[24]
SD8
LCD_PCLK
SLCD_CE_
VDDIO33
IO
PU
No
Yes
GPB[25]
SD9
LCD_VSYNC
SLCD_DC
VDDIO33
IO
PU
No
Yes
GPB[26]
SD10
LCD_HSYNC
SLCD_WR
VDDIO33
IO
PU
No
Yes
GPB[27]
SD11
LCD_DE
SLCD_TE
VDDIO33
IO
PU
No
Yes
GPB[28]
SD12
SSI0_CE0_
IO
PU
No
Yes
GPB[29]
SD13
SSI0_DR
IO
PU
No
Yes
GPB[30]
SD14
SSI0_DT
IO
PU
No
Yes
GPB[31]
SD15
SSI0_CLK
UART8_RX
D
UART8_TX
D
UART9_RX
D
UART9_TX
D
16
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
RGMAC1_TX_CL
K_O
RGMAC1_RX_CL
K_I
RGMAC1_PHY_
CLK_O
VDDIO33
VDDIO33
VDDIO33
VDDIO33
VDDIO33
VDDIO33
VDDIO33
VDDIO33
PAD Information
2.2.3
Ball
No.
P15
V16
V13
U13
R11
U14
T14
T13
U15
R14
R12
GPIO Group C
Ball Name
PWM0_TCU0_IN0_PC00
PWM1_TCU0_IN1_RGMAC0_P
HY_CLK_I2S1_RX_MCLK_UAR
T7_RXD_PC01
PWM2_TCU1_IN0_RGMAC0_T
XD0_I2S1_RX_BCLK_UART7_
TXD_PC02
PWM3_TCU1_IN1_RGMAC0_T
XD1_I2S1_RX_LRCK_SCC_SC
K_PC03
PWM4_TCU2_IN0_RGMAC0_T
XD2_I2S1_RX_DATA_SCC_SD
A_PC04
PWM5_TCU2_IN1_RGMAC0_T
XD3_I2S1_TX_BCLK_UART5_
RXD_PC05
PWM6_TCU3_IN0_RGMAC0_R
XD0_I2S1_TX_LRCK_UART5_
TXD_PC06
PWM7_TCU3_IN1_RGMAC0_R
XD1_I2S1_TX_DATA_UART6_
RXD_PC07
PWM8_TCU4_IN0_RGMAC0_R
XD2_I2S1_TX_MCLK_UART6_
TXD_PC08
PWM9_TCU4_IN1_RGMAC0_R
XD3_SSI1_CE0__UART4_CTS
__PC09
PWM10_TCU5_IN0_RGMAC0_
TX_EN_SSI1_DR_UART4_RTS
In/
Out
Pull
Slew
Rate
Sch
mitt
GPIO
IO
PD
No
Yes
GPC[0]
PWM0_TCU0_IN0
IO
PU
No
Yes
GPC[1]
PWM1_TCU0_IN1
IO
PU
No
Yes
GPC[2]
PWM2_TCU1_IN0
IO
PU
No
Yes
GPC[3]
PWM3_TCU1_IN1
IO
PU
No
Yes
GPC[4]
PWM4_TCU2_IN0
IO
PU
No
Yes
GPC[5]
PWM5_TCU2_IN1
IO
PU
No
Yes
GPC[6]
IO
PU
No
Yes
IO
PU
No
IO
PU
IO
PU
Func0
Func1
Func2
Func3
Power
VDDIO33
RGMAC0_PHY_
CLK
I2S1_RX_
MCLK
UART7_RXD
VDDIO33
RGMAC0_TXD0
I2S1_RX_B
CLK
UART7_TXD
VDDIO33
RGMAC0_TXD1
I2S1_RX_L
RCK
SCC_SCK
VDDIO33
RGMAC0_TXD2
I2S1_RX_
DATA
SCC_SDA
VDDIO33
RGMAC0_TXD3
I2S1_TX_B
CLK
UART5_RXD
VDDIO33
PWM6_TCU3_IN0
RGMAC0_RXD
0
I2S1_TX_L
RCK
UART6_RXD
VDDIO33
GPC[7]
PWM7_TCU3_IN1
RGMAC0_RXD
1
I2S1_TX_D
ATA
UART6_RXD
VDDIO33
Yes
GPC[8]
PWM8_TCU4_IN0
RGMAC0_RXD
2
I2S1_TX_
MCLK
UART6_TXD
VDDIO33
No
Yes
GPC[9]
PWM9_TCU4_IN1
RGMAC0_RXD
3
SSI1_CE0_
UART4_CTS
_
VDDIO33
No
Yes
GPC[10]
PWM10_TCU5_IN0
RGMAC0_TX_E
N
SSI1_DR
UART4_RTS
_
VDDIO33
17
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
PAD Information
R13
R15
T15
T12
V15
V17
U16
V18
T16
R16
B14
B15
C14
A15
__PC10
PWM11_TCU5_IN1_RGMAC0_
RX_DV_SSI1_DT_UART4_RXD
_PC11
PWM12_TCU6_IN0_RGMAC0_
MDC_SSI1_CLK_UART4_TXD_
PC12
PWM13_TCU6_IN1_RGMAC0_
MDIO_SPDIF_IN_I2C0_SCK_P
C13
PWM14_TCU7_IN0_RGMAC0_
TX_CLK_SPDIF_OUT_I2C0_S
DA_PC14
PWM15_TCU7_IN1_RGMAC0_
RX_CLK_CIM_VIC_MCLK_PC1
5
DMIC_CLK_PC20
DMIC_IN0_UART1_CTS__PC2
1
DMIC_IN1_UART1_RTS__PC2
2
DMIC_IN2_UART1_RXD_I2C1_
SCK_NEMC_CS1__PC23
DMIC_IN3_UART1_TXD_I2C1_
SDA_NEMC_CS2__PC24
UART3_RXD_I2C4_SCK_PC25
UART3_TXD_I2C4_SDA_PC26
UART3_CTS__I2C5_SCK_PC2
7
UART3_RTS__I2C5_SDA_PC2
8
IO
PU
No
Yes
GPC[11]
PWM11_TCU5_IN1
RGMAC0_RX_
DV
SSI1_DT
UART4_RXD
VDDIO33
IO
PU
No
Yes
GPC[12]
PWM12_TCU6_IN0
RGMAC0_MDC
SSI1_CLK
UART4_TXD
VDDIO33
IO
PU
No
Yes
GPC[13]
PWM13_TCU6_IN1
RGMAC0_MDIO
SPDIF_IN
I2C0_SCK
VDDIO33
IO
PU
No
Yes
GPC[14]
PWM14_TCU7_IN0
RGMAC0_TX_C
LK
SPDIF_OU
T
I2C0_SDA
VDDIO33
IO
PU
No
Yes
GPC[15]
PWM15_TCU7_IN1
RGMAC0_RX_
CLK
CIM/VIC_M
CLK
IO
PD
No
Yes
GPC[20]
DMIC_CLK
IO
PU
No
Yes
GPC[21]
DMIC_IN0
UART1_CTS_
VDDIO33
IO
PU
No
Yes
GPC[22]
DMIC_IN1
UART1_RTS_
VDDIO33
IO
PU
No
Yes
GPC[23]
DMIC_IN2
UART1_RXD
I2C1_SCK
NEMC_CS1_
VDDIO33
IO
PU
No
Yes
GPC[24]
DMIC_IN3
UART1_TXD
I2C1_SDA
NEMC_CS2_
VDDIO33
IO
IO
PU
PU
No
No
Yes
Yes
GPC[25]
GPC[26]
UART3_RXD
UART3_TXD
I2C4_SCK
I2C4_SDA
VDDIO33
VDDIO33
IO
PU
No
Yes
GPC[27]
UART3_CTS_
I2C5_SCK
VDDIO33
IO
PU
No
Yes
GPC[28]
UART3_RTS_
I2C5_SDA
VDDIO33
VDDIO33
VDDIO33
18
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
PAD Information
2.2.4
Ball
No.
GPIO Group D
Ball Name
In/
Out
Pull
Slew
Rate
Sch
mitt
GPIO
B5
C6
B6
A6
A7
B7
B2
A2
B3
A3
A4
C4
UART3_CTS__I2C4_SCK_PD00
UART3_RTS__I2C4_SDA_TDO_PD01
UART3_RXD_PCM_CLK_TDI_PD02
UART3_TXD_PCM_DO_TCK_PD03
I2C5_SCK_PCM_DI_TMS_PD04
I2C5_SDA_PCM_SYNC_PD05
SDIO_CLK_SSI0_CLK_PD08
SDIO_CMD_SSI0_DT_PD09
SDIO_D0_SSI0_DR_PD10
SDIO_D1_I2C1_SCK_PD11
SDIO_D2_I2C1_SDA_PD12
SDIO_D3_SSI0_CE0__PD13
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
D1
B1
C2
C1
D2
D4
D3
E4
A1
C3
B4
C5
MSC0_CLK_SFC0_CLK_SSI1_CLK_PD17
MSC0_CMD_SFC0_CE__SSI1_DT_PD18
MSC0_D0_SFC0_DQ0_SSI1_DR_PD19
MSC0_D1_SFC0_DQ1_I2C2_SCK_PD20
MSC0_D2_SFC0_DQ2_WP__I2C2_SDA_PD21
MSC0_D3_SFC0_DQ3_HOLD__SSI1_CE0__PD22
MSC0_D4_SFC1_DQ0_UART0_RXD_PD23
MSC0_D5_SFC1_DQ1_UART0_TXD_PD24
MSC0_D6_SFC1_DQ2_WP__UART0_CTS__PD25
MSC0_D7_SFC1_DQ3_HOLD__UART0_RTS__PD26
UART2_RXD_I2C3_SCK_PWM0_TCU0_IN0_PD30
UART2_TXD_I2C3_SDA_PWM1_TCU0_IN1_PD31
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
No
Func0
Func1
Func2
GPD[0]
GPD[1]
GPD[2]
GPD[3]
GPD[4]
GPD[5]
GPD[8]
GPD[9]
GPD[10]
GPD[11]
GPD[12]
GPD[13]
GPIO0
GPIO1
GPIO2
GPIO3
GPIO4
GPIO5
SDIO_CLK
SDIO_CMD
SDIO_D0
SDIO_D1
SDIO_D2
SDIO_D3
UART3_CTS_
UART3_RTS_
UART3_RXD
UART3_TXD
I2C5_SCK
I2C5_SDA
SSI0_CLK
SSI0_DT
SSI0_DR
I2C1_SCK
I2C1_SDA
SSI0_CE0_
I2C4_SCK
I2C4_SDA
PCM_CLK
PCM_DO
PCM_DI
PCM_SYNC
GPD[17]
GPD[18]
GPD[19]
GPD[20]
GPD[21]
GPD[22]
GPD[23]
GPD[24]
GPD[25]
GPD[26]
GPD[30]
GPD[31]
MSC0_CLK
MSC0_CMD
MSC0_D0
MSC0_D1
MSC0_D2
MSC0_D3
MSC0_D4
MSC0_D5
MSC0_D6
MSC0_D7
UART2_RXD
UART2_TXD
SFC0_CLK
SFC0_CE_
SFC0_DQ0
SFC0_DQ1
SFC0_DQ2_WP_
SFC0_DQ3_HOLD_
SFC1_DQ0
SFC1_DQ1
SFC1_DQ2_WP_
SFC1_DQ3_HOLD_
I2C3_SCK
I2C3_SDA
SSI1_CLK
SSI1_DT
SSI1_DR
I2C2_SCK
I2C2_SDA
SSI1_CE0_
UART0_RXD
UART0_TXD
UART0_CTS_
UART0_RTS_
PWM0_TCU0_IN0
PWM1_TCU0_IN1
19
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
Func
3
TDO
TDI
TCK
TMS
Power
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
PAD Information
2.2.5
GPIO Group E
Ball
No.
Ball Name
In/
Out
Pull
Slew
Rate
Schmitt
GPIO
R10
V10
V9
U9
T9
R9
T10
U10
T11
U11
V12
U12
F4
E2
MSC1_CLK_PWM2_TCU1_IN0_PE00
MSC1_CMD_PWM3_TCU1_IN1_PE01
MSC1_D0_PWM4_TCU2_IN0_PE02
MSC1_D1_PWM5_TCU2_IN1_PE03
MSC1_D2_PWM6_TCU3_IN0_PE04
MSC1_D3_PWM7_TCU3_IN1_PE05
SFC0_CLK_SSI1_CLK_PE16
SFC0_CE__SSI1_DT_PE17
SFC0_DQ0_SSI1_DR_PE18
SFC0_DQ1_I2C2_SCK_PE19
SFC0_DQ2_WP__I2C2_SDA_PE20
SFC0_DQ3_HOLD__SSI1_CE0__PE21
DRV_VBUS_PE22
RTC32K_PE23
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
IO
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PU
PD
PD
Yes
Yes
Yes
Yes
Yes
Yes
No
No
No
No
No
No
No
No
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
Yes
No
No
EXCLK_CIM_VIC_MCLK_PE24
BOOT_SEL0_PE25
BOOT_SEL1_PE26
BOOT_SEL2_PE27
IO
IO
IO
IO
PD
PD
PD
PD
No
No
No
No
No
No
No
No
E3
L4
K4
K2
Func0
Func1
GPE[0]
GPE[1]
GPE[2]
GPE[3]
GPE[4]
GPE[5]
GPE[16]
GPE[17]
GPE[18]
GPE[19]
GPE[20]
GPE[21]
GPE[22]
GPE[23]
MSC1_CLK
MSC1_CMD
MSC1_D0
MSC1_D1
MSC1_D2
MSC1_D3
SFC0_CLK
SFC0_CE_
SFC0_DQ0
SFC0_DQ1
SFC0_DQ2_WP_
SFC0_DQ3_HOLD_
DRV_VBUS
RTC32K
PWM2/TCU1_IN0
PWM3/TCU1_IN1
PWM4/TCU2_IN0
PWM5/TCU2_IN1
PWM6/TCU3_IN0
PWM7/TCU3_IN1
SSI1_CLK
SSI1_DT
SSI1_DR
I2C2_SCK
I2C2_SDA
SSI1_CE0_
GPE[24]
GPE[25]
GPE[26]
GPE[27]
EXCLK
BOOT_SEL0
BOOT_SEL1
BOOT_SEL2
CIM/VIC_MCLK
20
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
Power
VDDIO33_SD
VDDIO33_SD
VDDIO33_SD
VDDIO33_SD
VDDIO33_SD
VDDIO33_SD
VDDIO33
VDDIO33
VDDIO33
VDDIO33
VDDIO33
VDDIO33
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
VDDIO
PAD Information
2.3
X2000/E Analog PAD DESCRIPTION
Table 2-1 X2000/E function pin description
Ball
No.
Pin Names
IO
Power
Pin Description
TRST
I
VDDIO
JTAG reset
DDR_VDD1
DDR_VDD1
DDRPLL_VCCA
DDR_VSSA
VREF
ZQ
P
P
P
P
P
I
DDR_VDD1
-
P
P
P
P
P
P
P
P
P
P
P
P
P
P
-
Debug
D6
Memory
A11
B11
A12
B12
A10
C10
For sdram supply
For sdram supply
DDR PHY PLL supply 1.8v
ground
for sdram, reference voltage
for sdram, external reference resistor for output calibrating
Power and Ground
A9
B8
B9
C8
C9
C12
C13
D12
D13
G6
H6
J13
N6
N8
VDDMEM
VDDMEM
VDDMEM
VDDMEM
VDDMEM
VDDMEM
VDDMEM
VDDMEM
VDDMEM
VDDIO
VDDIO
VDDIO18
VDDIO18_CIM
VDDIO18_SD
DDR PHY LPDDR2/3 IO 1.2v supply
DDR PHY LPDDR2/3 IO 1.2v supply
DDR PHY LPDDR2/3 IO 1.2v supply
DDR PHY LPDDR2/3 IO 1.2v supply
DDR PHY LPDDR2/3 IO 1.2v supply
DDR PHY LPDDR2/3 IO 1.2v supply
DDR PHY LPDDR2/3 IO 1.2v supply
DDR PHY LPDDR2/3 IO 1.2v supply
DDR PHY LPDDR2/3 IO 1.2v supply
GPIO 1.8v supply
GPIO 1.8v supply
GPIO 1.8V supply for 3.3v PAD
CIM Type PAD1.8V supply
Connect to 1uf capacity for SD type PAD
21
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
PAD Information
H13
N13
M6
N9
A8
A13
B10
B13
C7
C11
D7
D11
F6
F7
F10
F13
G7
G10
G13
H7
H8
H9
H10
J6
J7
J8
J11
J12
K6
K13
L6
VDDIO33
VDDIO33
VDDIO33_CIM
VDDIO33_SD
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
VSS
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
-
GPIO 3.3V supply for 3.3v PAD
GPIO 3.3V supply for 3.3v PAD
CIM GPIO 3.3V /1.8Vsupply
SD GPIO 3.3V/1.8V supply
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
22
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
PAD Information
L9
VSS
L10
VSS
L13
VSS
F8
VDD
F9
VDD
F11
VDD
F12
VDD
G8
VDD
G9
VDD
G11
VDD
G12
VDD
H11
VDD
H12
VDD
K7
VDD
K8
VDD
K11
VDD
K12
VDD
L7
VDD
L8
VDD
L11
VDD
L12
VDD
M11
VDD
M12
VDD
Audio Codec
U7
CODEC_AVDD
R8
CODEC_AVSS
T7
CODEC_MICBIAS
T8
CODEC_HPOUTN
U8
CODEC_HPOUTP
U6
CODEC_MICLN
V6
CODEC_MICLP
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
P
-
P
P
AO
AO
AO
AI
AI
CODEC_AVDD
CODEC_AVDD
CODEC_AVDD
CODEC_AVDD
CODEC_AVDD
CODEC_AVDD
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
Core digital gound for none DRAM and CORE digital ground, 0V
CORE digital power, 0.9V
CORE digital power, 0.9V
CORE digital power, 0.9V
CORE digital power, 0.9V
CORE digital power, 0.9V
CORE digital power, 0.9V
CORE digital power, 0.9V
CORE digital power, 0.9V
CORE digital power, 0.9V
CORE digital power, 0.9V
CORE digital power, 0.9V
CORE digital power, 0.9V
CORE digital power, 0.9V
CORE digital power, 0.9V
CORE digital power, 0.9V
CORE digital power, 0.9V
CORE digital power, 0.9V
CORE digital power, 0.9V
CORE digital power, 0.9V
CORE digital power, 0.9V
1.8v supply
Ground
Electric microphone biasing voltage
DAC Differential output N
DAC Differential output P
ADC Differential input N end
ADC Differential input P end
23
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
PAD Information
V7
SADC
T3
V1
T2
U2
T1
U3
U1
T4
V2
DSI
L17
K16
J18
J17
K18
K17
L15
L16
M16
CSI
M18
M17
N18
N17
R17
R18
T18
T17
P17
CODEC_VCM
AO
CODEC_AVDD
AUX0
AUX1
AUX2
AUX3
AUX4
AUX5
SADC_VREFP
SADC_AVSS
SADC_AVDD
AI
AI
AI
AI
AI
AI
AI
P
P
SADC_AVDD
SADC_AVDD
SADC_AVDD
SADC_AVDD
SADC_AVDD
SADC_AVDD
SADC_AVDD
TX_DATAN0
TX_DATAP0
TX_DATAN1
TX_DATAP1
TX_CLKN
TX_CLKP
DSI_AVSS
DSI_AVD09
DSI_AVD18
AO
AO
AO
AO
AO
AO
P
P
P
DSI_AVD18
DSI_AVD18
DSI_AVD18
DSI_AVD18
DSI_AVD18
DSI_AVD18
DSI_AVD09
DSI_AVD18
Lane0 negative end
Lane0 positive end
Lane1 negative end
Lane1 positive end
CLK negative end
CLK positive end
ground
0.9V Analog supply
1.8V Analog supply
RX_DATAN0
RX_DATAP0
RX_DATAN1
RX_DATAP1
RX_DATAN2
RX_DATAP2
RX_DATAN3
RX_DATAP3
RX_CLKN0
AI
AI
AI
AI
AI
AI
AI
AI
AI
CSI_AVD18
CSI_AVD18
CSI_AVD18
CSI_AVD18
CSI_AVD18
CSI_AVD18
CSI_AVD18
CSI_AVD18
CSI_AVD18
Lane0 negative end
Lane0 positive end
Lane1 negative end
Lane1 positive end
Lane2 negative end
Lane2 positive end
Lane3 negative end
Lane3 positive end
CLK lane0 negative end
SADC_AVDD
Referebce voltage output
Analog input 0
Analog input 1
Analog input 2
Analog input 3
Analog input 4
Analog input 5
Positive reference voltage input
ground
1.8v supply
24
X2000/E IoT Application Processor Data Sheet
Copyright © 2005-2020 Ingenic Semiconductor Co., Ltd. All rights reserved.
PAD Information
N16
RX_CLKP0
U17
RX_CLKN1
U18
RX_CLKP1
M15
CSI_AVSS
N15
CSI_AVD09
P16
CSI_AVD18
USB OTG
V3
USB_DP0(OTG_DP)
U4
USB_DM0(OTG_DM)
AI
AI
AI
P
P
P
CSI_AVD18
CSI_AVD18
CSI_AVD18
AIO
AIO
USB_AVD33
USB_AVD33
CSI_AVD09
CSI_AVD18
CLK lane0 positive end
CLK lane1 negative end
CLK lane0 positive end
ground
0.9V Analog supply
1.8V Analog supply
USB OTG data plus
USB OTG data minus
USB 5-V power supply pin for USB OTG. An external charge pump must
provide power to this pin
Used to identify the device attached to the PHY. The state of the pin is one of:
high impedance (>1M Ω), or low impedance (
工商网监
湘ICP备2023018690号
