MUN12AD03-SEC

uPOL MODULE 3A, High Efficiency uPOL Module MUN12AD03-SEC GENERAL DESCRIPTION: FEATURES: The uPOL module is non-isolated dc-dc converter that can deliver up to 3A of output current. The PWM switching regulator, high frequency power inductor are integrated in one hybrid package. It only needs input/output capacitors and one voltage dividing resistor to perform properly. High Density uPOL Module 3A Output Current 91% Peak Efficiency at 12VIN Input Voltage Range from 4.5V to 17V Output Voltage Range from 0.8V to 5.5V Enable / PGOOD Function Automatic Power Saving/PWM Mode Protections (OCP: Non-latching, OTP) Adjustable Soft Start Function Compact Size: 3.0mm*2.8mm*1.5mm Pb-free for RoHS compliant MSL 2, 260℃ Reflow             The module has automatic operation with PWM mode and power saving mode according to loading, through constant on-time control, the module offers a simpler control loop and faster transient response. Other features include remote enable function, internal soft-start, non-latching over current protection, power good, input under voltage locked-out capability. APPLICATIONS: Point of Load Conversion LDOs Replacement Set Top Box / DSL Modem / AP Router Industrial Personal Computer     The low profile and compact size package (3.0mm × 2.8mm x 1.5mm) is suitable for automated assembly by standard surface mount equipment. The uPOL module is Pb-free and RoHS compliance. TYPICAL APPLICATION CIRCUIT & PACKAGE: VBia s EN RPG EN VP G O O D P GOOD VIN VO UT VIN SS CSS 3.0mm 2.8mm Vout uP OL Module C IN 1.5mm(Max) R FB_T C OUT FB GND R FB_B FIG.2 High Density Low Profile FIG.1 Typical Application Circuit uPOL Module 1 Rev.00 MUN12AD03-SEC ORDER INFORMATION: Part Number Operating Temperature Package Range (°C) (Pb-Free) -40 ~ +125 DFN MUN12AD03-SEC MSL Note Level 2 - Order Code Packing Quantity MUN12AD03-SEC Tape and reel 2000 PIN CONFIGURATION: EN (1) (8) SS Vin (2) (7) PGOOD (9) GND GND (3) (6) FB Vout (4) (5) Vout Top View Fig.3 Pin configuration 2 Rev.00 MUN12AD03-SEC PIN DESCRIPTION: Symbol Pin No. Description EN 1 On/Off control pin for module. EN = LOW, the module is off. EN = HIGH, the module is on. Do not float. VIN 2 Power input pin. It needs to be connected to input rail. GND 3, 9 Power ground pin for signal, input, and output return path. This pin needs to be connected to one or more ground plane directly. VOUT 4, 5 Power output pin. Connect to output for the load. FB 6 Feedback input. Connect an external resistor divider to set the output voltage. PGOOD 7 Power Good indicator. The pin output is an open drain that can connect to Vout by resistor. SS 8 Soft startup pin. 3 Rev.00 MUN12AD03-SEC ELECTRICAL SPECIFICATIONS: CAUTION: Do not operate at or near absolute maximum rating listed for an extended period of time. This stress may adversely impact product reliability and result in failures outside of warranty. Parameter Min. Typ. Max. Unit VIN to GND - - +19.0 V VOUT to GND - - +6.5 V FB to GND - - +4.0 V EN to GND - - VIN+0.3 V PGOOD to GND - - +19.0 V Reflow Peak Temperature - - +260 °C  Absolute Maximum Ratings Tc Case Temperature of Inductor - - +110 °C Tj Junction Temperature - - +150 °C Tstg Storage Temperature -40 - +125 °C Human Body Model (HBM) - - 2k V Machine Model (MM) - - 200 V Charge Device Model (CDM) - - 500 V Input Supply Voltage +4.5 - +17.0 V Adjusted Output Voltage +0.8 - +5.5 V - - +17.0 V ESD Rating  Recommendation Operating Ratings VIN VOUT PGOOD  Description Power Good Voltage Tj Junction Temperature -40 - +125 °C Ta Operating Temperature Range (Note 2) -40 - +125 °C - 39 - °C/W Thermal Information Rth(jchoke-a) Thermal resistance from junction to ambient. (Note 1) NOTES: 1. Rth(jchoke-a) is measured with the component mounted on an effective thermal conductivity test board on 0 LFM condition. The test board size is 30mm× 30mm× 1.6mm with 4 layers, 1oz. The test condition is complied with JEDEC EIJ/JESD 51 Standards. 2. For maximum operating temperature, thermal derating to be taken into account. 4 Rev.00 MUN12AD03-SEC ELECTRICAL SPECIFICATIONS: (Cont.) Conditions: TA = 25 ºC, unless otherwise specified. Test Board Information: 30mm× 30mm× 1.6mm, 4 layers, 1oz. The output ripple and transient response are measured by short loop probing and limited to 20MHz bandwidth. Cin = 10uF/25V/1206*1, Cout = 22uF/10V/0805*2. Symbol Parameter Conditions Min. Typ. Max. Unit Input Characteristics  IQ ISD(IN) IS(IN) Quiescent current Iout =0, VFB=VREF*105% - 100 - uA Input shutdown current Vin =12V, EN = GND - 5.5 - uA Vin =12V, EN = VIN - - - - Iout = 0A, Vout = 1.8V - 0.13 - mA Iout = 3A, Vout = 1.8V - 0.58 - A Input supply current Output Characteristics  IOUT(DC) ΔVOUT /ΔVIN ΔVOUT /ΔIOUT VOUT(AC) Output continuous current range 0 - 3 A Line regulation accuracy Vin = 4.5V to 17V Vout = 1.8V, Iout = 1.5A - 0.1 0.5 % VO(SET) Load regulation accuracy Iout = 0.5A to 3A Vin = 12V, Vout = 1.8V - 0.2 1 % VO(SET) Vin = 12V, Vout = 3.3V - - - - Iout = 0A - 28 - mVp-p Iout = 3A - 15 - mVp-p - 25 - mVp-p - 25 - mVp-p Output ripple voltage Dynamic Characteristics  ΔVOUT-DP Voltage change for positive load step ΔVOUT-DN Voltage change for negative load step  Iout = 1.5 A to 3A Current slew rate = 0.15A/uS Vin = 12V, Vout = 1.8V Iout = 3A to 1.5A Current slew rate = 0.15A/uS Vin = 12V, Vout = 1.8V Control Characteristics PWM Mode VFB Feedback regulation voltage PWM Mode, Ta=-40~85°C PFM Mode, Ta=-40~85°C DMAX Maximum duty cycle Vout(MAX) = Vin * DMAX FOSC Oscillator frequency PWM Operation VUVLO Input UVLO threshold VPG Power good threshold VPG,HYS Power good hysteresis VPGL VEN_TH VFB rising 0.788 0.800 0.812 0.78 0.800 0.82 V 0.788 0.800 0.824 V 70 - - % - 1.0 - MHz - - 4.5 V 88 90 92 %VREF 2 %VREF 0.04 0.15 0.3 V Enable rising threshold voltage 1.5 - - V Enable falling threshold voltage - - 0.4 V - 150 - °C 3.8 - 5.2 A PGOOD output low TOTP Over temp protection OCP Protection Output Current IPGOOD=4mA V 5 Rev.00 MUN12AD03-SEC TYPICAL PERFORMANCE CHARACTERISTICS: (1.0VOUT) Conditions: TA = 25 ºC, unless otherwise specified. Test Board Information: 30mm× 30mm× 1.6mm, 4 layers, 1oz. The output ripple and transient response are measured by short loop probing and limited to 20MHz bandwidth. Vin = 12 V, Vout = 1.0 V, unless otherwise noted. Cin = 10uF/25V/1206*1, Cout = 22uF/10V/0805*2. FIG.4 Efficiency V.S. Load Current FIG.5 De-rating Curve VOUT VOUT FIG.6 Output Ripple (Iout=0A) FIG.7 Output Ripple (Iout=3A) VOUT VOUT PGOOD IOUT EN FIG.8 Transient Response (50% to 100% Load Step) FIG.9 Turn-on (Iout=3A) 6 Rev.00 MUN12AD03-SEC TYPICAL PERFORMANCE CHARACTERISTICS: (1.8VOUT) Conditions: TA = 25 ºC, unless otherwise specified. Test Board Information: 30mm× 30mm× 1.6mm, 4 layers, 1oz. The output ripple and transient response are measured by short loop probing and limited to 20MHz bandwidth. Vin = 12 V, Vout = 1.8 V, unless otherwise noted. Cin = 10uF/25V/1206*1, Cout = 22uF/10V/0805*2. FIG.10 Efficiency V.S. Load Current FIG.11 De-rating Curve at 12Vin VOUT VOUT IG.12 Output Ripple (12Vin, Iout=0A) FIG.13 Output Ripple (12Vin, Iout=3A) VOUT VOUT PGOOD IOUT EN FIG.14 Transient Response (12Vin, 50% to 100% Load Step) FIG.15 Turn-on (12Vin, Iout=3A) 7 Rev.00 MUN12AD03-SEC TYPICAL PERFORMANCE CHARACTERISTICS: (2.5VOUT) Conditions: TA = 25 ºC, unless otherwise specified. Test Board Information: 30mm× 30mm× 1.6mm, 4 layers, 1oz. The output ripple and transient response are measured by short loop probing and limited to 20MHz bandwidth. Vin = 12 V, Vout = 3.3 V, unless otherwise noted. Cin = 10uF/25V/1206*1, Cout = 22uF/10V/0805*2. FIG.16 Efficiency V.S. Load Current FIG.17 De-rating Curve at 12Vin VOUT VOUT FIG.18 Output Ripple (12Vin, Iout=0A) FIG.19 Output Ripple (12Vin, Iout=3A) VOUT VOUT PGOOD IOUT EN FIG.20 Transient Response (12Vin, 50% to 100% Load Step) FIG.21 Turn-on (12Vin, Iout=3A) 8 Rev.00 MUN12AD03-SEC TYPICAL PERFORMANCE CHARACTERISTICS: (3.3VOUT) Conditions: TA = 25 ºC, unless otherwise specified. Test Board Information: 30mm× 30mm× 1.6mm, 4 layers, 1oz. The output ripple and transient response are measured by short loop probing and limited to 20MHz bandwidth. Vin = 12 V, Vout = 3.3 V, unless otherwise noted. Cin = 10uF/25V/1206*1, Cout = 22uF/10V/0805*2. FIG.22 Efficiency V.S. Load Current FIG.23 De-rating Curve at 12Vin VOUT VOUT FIG.24 Output Ripple (12Vin, Iout=0A) FIG.25 Output Ripple (12Vin, Iout=3A) VOUT VOUT PGOOD IOUT EN FIG.26 Transient Response (12Vin, 50% to 100% Load Step) FIG.27 Turn-on (12Vin, Iout=3A) 9 Rev.00 MUN12AD03-SEC TYPICAL PERFORMANCE CHARACTERISTICS: (5.0VOUT) Conditions: TA = 25 ºC, unless otherwise specified. Test Board Information: 30mm× 30mm× 1.6mm, 4 layers, 1oz. The output ripple and transient response are measured by short loop probing and limited to 20MHz bandwidth. Vin = 12 V, Vout = 5.0 V, unless otherwise noted. Cin = 10uF/25V/1206*1, Cout = 22uF/10V/0805*2. FIG.28 Efficiency V.S. Load Current FIG.29 De-rating Curve at 12Vin VOUT VOUT FIG.30 Output Ripple (12Vin, Iout=0A) FIG.31 Output Ripple (12Vin, Iout=3A) VOUT VOUT PGOOD IOUT EN FIG.32 Transient Response (12Vin, 50% to 100% Load Step) FIG.33 Turn-on (12Vin, Iout=3A) 10 Rev.00 MUN12AD03-SEC APPLICATIONS INFORMATION: REFERENCE CIRCUIT FOR GENERAL APPLICATION: Figure 34 show the module application schematics for input voltage +12V. The output capacitor is selected to handle the output ripple noise requirements and system stability. The out capacitance have to be followed COUT_Min shown in the TABLE 1 TABLE 1 Output capacitor setting VIN (V) VOUT (V) COUT_Min (uF) 4.5~17 1 22 4.5~17 1.2 22 4.5~7 1.5 22*2 8~17 1.5 22 4.5~7 1.8 22*2 8~17 1.8 22 5~17 3.3 22*2 7~17 5 22*2 FIG.34 Reference Circuit for General Application 11 Rev.01 MUN12AD03-SEC APPLICATIONS INFORMATION: (Cont.) SAFETY CONSIDERATIONS: Certain applications and/or safety agencies may require fuses at the inputs of power conversion components. Fuses should also be used when there is the possibility of sustained input voltage reversal which is not current limited. For greatest safety, we recommend a fast blow fuse installed in the ungrounded input supply line. The installer must observe all relevant safety standards and regulations. For safety agency approvals, install the converter in compliance with the end-user safety standard. INPUT FILTERING: The module should be connected to a source supply of low AC impedance and high inductance in which line inductance can affect the module stability. An input capacitor must be placed as near as possible to the input pin of the module so to minimize input ripple voltage and ensure module stability. OUTPUT FILTERING: To reduce output ripple and improve the dynamic response as the step load changes, an additional capacitor at the output must be connected. Low ESR polymer and ceramic capacitors are recommended to improve the output ripple and dynamic response of the module. PROGRAMMING OUTPUT VOLTAGE: The module has an internal 0.8V±1.5% reference voltage. The output voltage can be programmed by the dividing resistor (RFB_T and RFB_B). The output voltage can be calculated by Equation 1, resistor choice may be referred to TABLE 2. (EQ.1) TABLE 2 Resistor values for common output voltages VOUT (V) RFB_T(k) RFB_B(k) 1.0 124 499 1.2 124 243 1.5 124 140 1.8 124 100 3.3 124 39.2 5.0 124 23.7 12 Rev.01 MUN12AD03-SEC APPLICATIONS INFORMATION: (Cont.) Soft Startup Capacitor Selection Leave SS pin floating for default 1ms soft-start time. For longer than 1ms soft-start time, connect a capacitance between the SS pin and the GND allows programming the startup slope of the output voltage. A constant current of 4μA charges the external capacitor. The capacitance required for a given soft startup time for the output voltage is given by Equation 2: (EQ.2) Thermal Considerations: All of thermal testing condition is complied with JEDEC EIJ/JESD 51 Standards. Therefore, the test board size is 30mm× 30mm× 1.6mm with 2 layers. The case temperature of module sensing point is shown as Figure 35. Then Rth(jchoke-a) is measured with the component mounted on an effective thermal conductivity test board on 0 LFM condition. The MUN12AD03-SEC modules are designed for using when the case temperature is below 125°C regardless the change of output current, input/output voltage or ambient temperature. Sensing point (Defined case temperature) FIG. 35 Case Temperature Sensing Point 13 Rev.01 MUN12AD03-SEC REFLOW PARAMETERS: Lead-free soldering process is a standard of electronic products production. Solder alloys like Sn/Ag, Sn/Ag/Cu and Sn/Ag/Bi are used extensively to replace the traditional Sn/Pb alloy. Sn/Ag/Cu alloy (SAC) is recommended for this power module process. In the SAC alloy series, SAC305 is a very popular solder alloy containing 3% Ag and 0.5% Cu and easy to obtain. Figure 36 shows an example of the reflow profile diagram. Typically, the profile has three stages. During the initial stage from room temperature to 150°C, the ramp rate of temperature should not be more than 3°C/sec. The soak zone then occurs from 150°C to 200°C and should last for 60 to 120 seconds. Finally, keep at over 217°C for 60 seconds limit to melt the solder and make the peak temperature at the range from 240°C to 250°C. It is noted that the time of peak temperature should depend on the mass of the PCB board. The reflow profile is usually supported by the solder vendor and one should adopt it for optimization according to various solder type and various manufacturers’ formulae. ℃ FIG.36 Recommendation Reflow Profile 14 Rev.01 MUN12AD03-SEC PACKAGE OUTLINE DRAWING: Unit: mm FIG.37 Package Outline Drawing 15 Rev.01 MUN12AD03-SEC LAND PATTERN REFERENCE: Unit: mm RECOMMENDED LAND PATTERN RECOMMENDED STENCIL PATTERN BASED ON 0.1mm THICKNESS STENCIL (Reference only) FIG.44 Land Pattern Reference 16 Rev.01 MUN12AD03-SEC PACKING REFERENCE: Unit: mm Package In Tape Loading Orientation Tape Dimension A0 B0 F W D0 D1 3.20  0.10 3.30  0.10 5.50  0.05 12.00 0.30 φ1.55 0.05 φ1.5 +0.1/-0 E1 K0 P0 P1 P2 T 1.75  0.10 1.65  0.10 4.00  0.10 4.00  0.10 2.00  0.05 0.25  0.10 FIG.38 Packing Reference 17 Rev.01 MUN12AD03-SEC PACKING REFERENCE: (Cont.) Unit: mm Reel Dimension See Detail A Detail A Peel Strength of Top Cover Tape The peel speed shall be about 300mm/min. The peel force of top cover tape shall be between 0.1N to 1.3N 18 Rev.01 MUN12AD03-SEC REVISION HISTORY: Date Revision Changes 2020.07.22 00 Release the preliminary specification. 2022.02.21 01 Update module outline drawing. 19 Rev.01