LP3985-18B3F

Preliminary Datasheet LP3985 300mA,Ultra-low noise, Small Package Ultra-Fast CMOS LDO Regulator General Description Features The LP3985 is designed for portable RF and wireless  Ultra-Low-Noise for RF Application applications with demanding performance and space  2.5V- 5.5V Input Voltage Range requirements. The LP3985 performance is optimized  Low Dropout : 300mV @ 300mA for battery-powered systems to deliver ultra low noise  300mA Output Current and low quiescent current. The LP3985 also works  High PSSR:-68dB at 1KHz with low-ESR ceramic capacitors, reducing the amount  1uA Standby Current When Shutdown of board space necessary for power applications,  Available in SOT23-3/SOT89-3 Package critical in hand-held wireless devices. The other  TTL-Logic-Controlled Shutdown Input features include ultra low dropout voltage, high output  Ultra-Fast Response in Line/Load transient accuracy, current limiting protection, and high ripple  Current Limiting and Thermal Shutdown rejection ratio. It is available in the 5-lead of SOT23-3 Protection and SOT89-3 packages. Order Information Applications LP3985 F: Pb-Free Package Type B3: SOT23-3 X3: SOT89-3 Output Type 12 ： 1.2V 15 ： 1.5V 18 25 28 30 33 36 LP3985-00 ： ： ： ： ： ： 1.8V 2.5V 2.8V 3.0V 3.3V 3.6V May.-2018  Portable Media Players/MP3 players  Cellular and Smart mobile phone  LCD  DSC Sensor  Wireless Card Typical Application Circuit VIN VOUT VIN CIN VOUT LP3985 COUT GND Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 1 of 7 Preliminary Datasheet LP3985 Marking Information Device Marking Package Shipping Device Marking Package Shipping LP3985-12B3F LPS SOT23-3 3K/REEL LP3985-30B3F LPS SOT23-3 3K/REEL LP3985-12X3F 5bYWX SOT89-3 1K/REEL LP3985-30X3F 6gYWX SOT89-3 1K/REEL LP3985-15B3F LPS SOT23-3 3K/REEL LP3985-33B3F LPS SOT23-3 3K/REEL LP3985-15X3F 6nYWX SOT89-3 1K/REEL LP3985-33X3F 6eYWX SOT89-3 1K/REEL LP3985-18B3F LPS SOT23-3 3K/REEL LP3985-36B3F LPS SOT23-3 3K/REEL LP3985-18X3F 6cYWX SOT89-3 1K/REEL LP3985-36X3F 6mYWX SOT89-3 1K/REEL LP3985-25B3F LPS SOT23-3 3K/REEL Marking indication: LP3985-25X3F 6dYWX SOT89-3 1K/REEL Y: Y is year code. W: W is week code. X: X is series number. LP3985-28B3F LPS SOT23-3 3K/REEL LP3985-28X3F 6hYWX SOT89-3 1K/REEL Functional Pin Description Package Type Pin Configurations GND Top View Top View SOT23-3 SOT89-3 1 GND 1 VIN 2 VOUT 3 SOT23-3 / SOT89-3 3 VOUT VIN 2 4 VIN Pin Description Pin Name Description SOT23-3 SOT89-3 3 2,4 VIN 2 3 VOUT Output Voltage. 1 1 GND Ground. LP3985-00 May.-2018 Power Input Voltage. Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 2 of 7 Preliminary Datasheet LP3985 Function Diagram Absolute Maximum Ratings  Supply Input Voltage --------------------------------------------------------------------------------------------------- 6.5V  Other Pin Voltage -------------------------------------------------------------------------------------- -0.3V to VIN+0.3V Power Dissipation, PD @ TA = 25℃  SOT23-3 --------------------------------------------------------------------------------------------------------------- 350mW  SOT89-3----------------------------------------------------------------------------------------------------------------- 700mW Package Thermal Resistance  Thermal Resistance (SOT23-3) (JA) -------------------------------------------------------------------------- 350℃/W  Thermal Resistance (SOT89-3) (JA) -------------------------------------------------------------------------- 165℃/W  Maximum Junction Temperature ---------------------------------------------------------------------------------- 150℃  Maximum Soldering Temperature (at leads, 10 sec) --------------------------------------------------------- 260℃  Storage Temperature Range -------------------------------------------------------------------------- −65℃ to 150℃ ESD Susceptibility  HBM (Human Body Mode) --------------------------------------------------------------------------------------------- 2kV  MM (Machine-Mode) -------------------------------------------------------------------------------------------------- 200V Recommended Operating Conditions  Supply Input Voltage ---------------------------------------------------------------------------------------- 2.5V to 5.5V  EN Input Voltage ------------------------------------------------------------------------------------------- 0V toVIN+0.3V  Operation Junction Temperature Range ----------------------------------------------------------- −40℃ to 125℃  Operation Ambient Temperature Range ------------------------------------------------------------- −40℃ to 85℃ LP3985-00 May.-2018 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 3 of 7 Preliminary Datasheet LP3985 Electrical Characteristics (VIN = VOUT + 1V, CIN = COUT = 1µF, TA = 25° C, unless otherwise specified) Parameter Symbol Test Conditions Min Typ. Max Units Output Voltage Accuracy ΔVOUT IOUT=1mA −2 -- +2 % Output Loading Current ILOAD VIN >2.8V 300 mA Current Limit ILIM RLOAD=1Ω 500 mA Quiescent Current IQ IOUT=0mA Dropout Voltage VDROP Line Regulation ΔVLINE Load Regulation ΔLOAD 200 240 IOUT=300mA, VOUT>2.5V 300 360 VIN=(VOUT+1V) to 5.5V, IOUT=50mA 1mA 1µF on the LP3985 input and the amount of capacitance can be increased without limit. The input capacitor must be located a distance of not more than 0.5 inch from the input pin of the IC and returned to a clean analog ground. Any good quality ceramic or tantalum can be used for this capacitor. The capacitor with larger value and lower ESR When the operation junction temperature exceeds 150℃, the OTP circuit starts the thermal shutdown function turn the pass element off. The pass element turns on again after the junction temperature cools by 20℃. For continue operation, do not exceed absolute maximum operation junction temperature 125℃. The power dissipation definition in device is: (equivalent series resistance) provides better PSRR and line-transient response. The output capacitor must meet both requirements for minimum amount of capacitance and ESR in all LDOs application. The LP3985 is designed specifically to work with low ESR ceramic output capacitor in space-saving and performance consideration. Using a ceramic capacitor whose value is at least 1µF with ESR is > 25mΩ on the PD = (VIN−VOUT) x IOUT + VIN x IQ The maximum power dissipation depends on the thermal resistance of IC package, PCB layout, the rate of surroundings airflow and temperature difference between junction to ambient. The maximum power dissipation can be calculated by following formula: LP3985 output ensures stability. The LP3985 still works well with output capacitor of other types due to the wide stable ESR range. Output capacitor of larger capacitance can reduce noise and improve load transient response, stability, and PSRR. The output PD(MAX) = ( TJ(MAX) − TA ) / θJA Where TJ(MAX) is the maximum operation junction temperature 125℃, TA is the ambient temperature and the θJA is the junction to ambient thermal resistance. capacitor should be located not more than 0.5 inch from the VOUT pin of the LP3985 and returned to a clean analog ground. LP3985-00 May.-2018 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 5 of 7 Preliminary Datasheet LP3985 Packaging Information SOT23-3 Dimensions in Millimeters Min Max 0.889 1.295 0.000 0.152 1.200 1.450 0.340 0.510 2.200 2.600 2.692 3.099 1.803 2.007 0.070 0.254 0.160 0.500 Symbol A A1 B b C D e H L LP3985-00 May.-2018 Dimensions in Inches Min Max 0.035 0.051 0.000 0.006 0.047 0.057 0.013 0.020 0.087 0.102 0.106 0.122 0.071 0.079 0.003 0.010 0.006 0.020 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 6 of 7 Preliminary Datasheet LP3985 SOT89-3 Dimensions in Millimeters Min Max 1.397 1.600 0.356 0.483 2.388 2.591 0.406 0.533 3.937 4.242 0.787 1.194 4.394 4.597 1.397 1.753 1.448 1.549 0.356 0.432 Symbol A b B B1 C C1 D D1 e H LP3985-00 May.-2018 Dimensions in Inches Min Max 0.055 0.063 0.014 0.019 0.094 0.102 0.016 0.021 0.155 0.167 0.031 0.047 0.173 0.181 0.055 0.069 0.057 0.061 0.014 0.017 Email: marketing@lowpowersemi.com www.lowpowersemi.com Page 7 of 7