FP6145B
fitipower integrated technology lnc.
2A Ultra Low Dropout
Linear Regulator
Description
Features
The FP6145B is a 2A ultra low dropout linear
regulator. This product is specifically designed to
provide well supply voltage for front-side-bus
termination on motherboards and NB applications.
The IC needs two supply voltages, control voltage for
the circuitry and main supply voltage for power
conversion, to reduce power dissipation and provide
extremely low dropout. The FP6145B integrates
many functions. Power-On-Reset (POR) circuit
monitors both supply voltages to prevent wrong
operations. Thermal shutdown and current limit
functions protect the device against thermal and
current over-loads. POK indicates the output status
with time delay which is set internally. It can control
other converter for power sequence. The FP6145B
can be enabled by other power system. Pulling and
holding the EN pin below 0.4V shuts off the output.
The FP6145B is available in SOP-8 (EP) package
which features small size as an exposed pad to
reduce the junction-to-case resistance.
Ultra Low Dropout - 0.24V(typ.) at 2A Output
Current
Low ESR Output Capacitor (Multi-layer Chip
Capacitors (MLCC)) Applicable
0.8V Reference Voltage
Fast Transient Response
Adjustable Output Voltage by External Resistors
Power-On-Reset Monitoring on Both VCNTL
and VIN Pins
Internal Soft-Start
Under-Voltage Protection
Current-Limit and Thermal Shutdown Protection
Power-OK Output with a Delay Time
SOP-8 Exposed Pad Green Package
Applications
LCD Monitor/TV
PC Motherboard/NB
Graphic Card
DVD-Video Player
ADSL Modem
Printer and other Peripheral Equipment
Pin Assignment
Ordering Information
SP Package (SOP-8 Exposed Pad)
FP6145B□□□
FP6368□□□
Top View
POK
1
8
GND
EN
VIN
2
9
3 GND
7
FB
6
VOUT
VCNTL
4
5
NC
TR: Tape/Reel
C: Green
Package Type
SP: SOP-8 (Exposed Pad)
Figure1. Pin Assignment of FP6145B
FP6145B-1.0-MAR-2014
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FP6145B
fitipower integrated technology lnc.
Typical Application Circuit
R3
10K
U1
VCNTL=5V
4 VCNTL
C1
1μF
1
ON
OFF
2
POK
VIN 3
FP6145B
EN
NC
VOUT
8 GND
FB
VIN=1.5V
5
C2
100μF
6
C3
0.1μF
7
VOUT=1.2V/2A
R1
1K
C6
12~48nF
C4
220μF
C5
0.1μF
R2
2K
Figure 2. an EC as a Main Output Capacitor
R3
10K
U2
VCNTL=5V
C1
1μF
ON
OFF
4 VCNTL
VIN 3
1
NC
2
POK
EN
FP6145B
VOUT
8 GND
VOUT=VFB*(1+R1/R2)
VFB=0.8V
FB
VIN=1.5V
5
C2
10μF
6
7
VOUT=1.2V/2A
R1
39K
C4
56pF
C3
10μF
R2
78K
Figure 3. Using a MLCC as the Output Capacitor
FP6145B-1.0-MAR-2014
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FP6145B
fitipower integrated technology lnc.
Functional Pin Description
Pin Name
Pin No.
Pin Function
POK
1
Power OK output pin.
EN
2
Internal pull high.
EN=High or Floating Enable.
EN=Low Shutdown mode.
VIN
3
MOSFET power supply input pin.
VCNTL
4
Input pin for internal control circuitry.
NC
5
No connection.
VOUT
6
Output pin of the regulator.
FB
7
Output voltage feedback pin.
GND
8
GND pin.
Exposed Pad
9
Thermal dissipation pad. Connect exposed pad to GND.
Block Diagram
N-MOSFET
VIN
Power-ON
Reset
VCNTL
1MΩ
EN
Current Limit
and Foldback
Enable
Soft-Start
And
Control Logic
VOUT
Error
Amp
-
+
Vref = 0.8V
UVP
GND
+
FB
Delay
+
0.35V
POK
-
Thermal
Shutdown
92%
Vref
POK
Figure 4. Block Diagram of FP6145B
FP6145B-1.0-MAR-2014
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fitipower integrated technology lnc.
FP6145B
Absolute Maximum Ratings
● VCNTL Supply Voltage ---------------------------------------------------------------------------------- -0.3V to +6V
● VIN Supply Voltage --------------------------------------------------------------------------------------- -0.3V to +6V
● VCNTL and VIN Pulse Voltage (15ns) ---------------------------------------------------------------- -0.3V to +10V
● EN and FB Pin Voltage ----------------------------------------------------------------------------------- -0.3V to VCNTL+0.3V
● Power OK Voltage ----------------------------------------------------------------------------------------- -0.3V to +6V
● Power Dissipation @TA=25°C, (PD) (Note 1)
SOP-8 (Exposed Pad) ------------------------------------------------------------------------ 2.08W
● Package Thermal Resistance, (θJA)
SOP-8 (Exposed Pad) ------------------------------------------------------------------------ 60°C/W
● Package Thermal Resistance, (θJC)
SOP-8 (Exposed Pad) ------------------------------------------------------------------------ 15°C/W
● Lead Temperature (Soldering, 10sec.) --------------------------------------------------------------- 260°C
●Junction Temperature (TJ) ------------------------------------------------------------------------------- -40°C to 150°C
● Storage Temperature (TSTG) ---------------------------------------------------------------------------- -65°C to 150°C
Note 1:θJA is measured with the PCB copper area (need connecting to Expose-Pad) of approximately 1.5 in2 (Multi-layer)
Recommended Operating Conditions
● VCNTL Supply Voltage ----------------------------------------------------------------------------------- +3V to +5.5V
● VIN Supply Voltage ---------------------------------------------------------------------------------------- +1.2V to +5.5V
● Output Voltage (Conditions: VCNTL-VOUT>1.9V) ----------------------------------------------------- 0.8V to VIN-VDROP
● Output Current ---------------------------------------------------------------------------------------------- 0A to 2A
● Operating Temperature Range ------------------------------------------------------------------------- -40°C to +85°C
FP6145B-1.0-MAR-2014
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FP6145B
fitipower integrated technology lnc.
Electrical Characteristics
(VCNTL=5V, VIN=1.5V, VOUT=1.2V, TA=25°C unless otherwise specified)
Parameter
Symbol
Test Conditions
Min
Typ
Max
Units
VCNTL POR Threshold
VCNTL
2.5
2.7
2.9
V
VCNTL POR Hysteresis
VCNTL(hys)
-
0.4
-
V
VIN POR Threshold
VIN
0.95
1.05
1.15
V
VIN POR Hysteresis
VIN(hys)
VCNTL Nominal Supply Current
ICNTL
0.3
V
EN=VCNTL
-
1
1.8
mA
-
10
15
μA
VCNTL Shutdown Current
ISD
EN=0V
Feedback Voltage Regulation
VFB
VCNTL3.0~5.5V
IOUT=10mA
0.79
0.8
0.81
V
IOUT=10mA~2A
-
0.06
0.25
%
1.2V<VOUT<1.8V
-
0.23
0.28
1.8V≦VOUT<2.5V
-
0.24
0.29
2.5V≦VOUT<2.8V
-
0.28
0.38
2.8V≦VOUT<3.1V
-
0.3
0.4
-
85
-
Ω
-
0.7
-
mS
Load Regulation
Dropout Voltage
VDROP
VOUT Pull Low Resistance
Soft Start Time
IOUT=2A
VCNTL=5V
V
EN=0V
TSS
VENH
Enable
1.2
-
-
VENL
Disable
-
-
0.4
EN Pin Logic High threshold voltage
V
EN Pin Pull High Resistor
IEN
EN=VCNTL
-
1
-
MΩ
Current Limit
ILIM
VCNTL=3~5.5V
TJ= -40~125°C
3
4
-
A
-
65
-
-
65
-
-
0.35
-
V
-
120
-
mA
VIN
Ripple Rejection
PSRR
F=120Hz, IOUT=100mA
VCNTL
Under-Voltage Protect Threshold
VFB Falling
Under-Voltage Protect Current Foldback
dB
POK Threshold Voltage for Power OK
VPOK
VFB Rising
89%
92%
95%
VFB
POK Threshold Voltage for Power Not OK
VPNOK
VFB Falling
-
89%
-
VFB
POK sinks 1mA
-
0.25
0.4
V
TDELAY
1
2
3
mS
TSD
-
170
-
°C
TSD(HYS)
-
50
-
°C
POK Low Voltage
POK Delay Time
Thermal shutdown Temp
Thermal Shutdown Hysteresis
FP6145B-1.0-MAR-2014
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FP6145B
fitipower integrated technology lnc.
Typical Performance Curves
VCNTL=5V, VIN=1.5V, VOUT=1.2, IOUT=2A
VEN
VCNTL= VEN=5V, VOUT=1.2, IOUT=2A
5V/div.
VIN
500mV/div.
VOUT 500mV/div.
VOUT 500mV/div.
VPOK 500mV/div.
VPOK 500mV/div.
IOUT
IOUT
1A/div.
2ms/div.
1A/div.
2ms/div.
Figure 5. Start-up Response
Figure 6. Power On Response
60
VCNTL= VEN=5V
VIN=1.5V
VOUT =1.2V
50
IOUT
Dropout Voltage (mV)
VOUT 50mV/div.
1A/div.
40
30
20
10
0
0
200μs/div.
0.5
1
1.5
2
Load Current (A)
Figure 7. Load Transient Response
Figure 8. Dropout Voltage vs. Load Current
0.81
VCNTL= VEN=VIN
VOUT =1.2V
No Load
Feedback Voltage (V)
Feedback Voltage (V)
0.81
0.805
0.8
0.795
VCNTL= VEN=5V
VIN=1.5V
VOUT =1.2V
0.805
0.8
0.795
0.79
0.79
2.7
3.1
3.5
3.9
4.3
Input Voltage (V)
Figure 9. Line Regulation
FP6145B-1.0-MAR-2014
4.7
5.1
5.5
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
Load Current (A)
Figure 10. Load Regulation
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FP6145B
fitipower integrated technology lnc.
Typical Performance Curves (Continued)
1.4
15
VCNTL =VIN
VEN=0V
VCNTL= VEN=VIN
VOUT =1.2V
Shutdown Current (µA)
Quiescent Current (mA)
1.6
1.2
1
0.8
0.6
0.4
13
11
9
7
5
2.7
3.1
3.5
3.9
4.3
4.7
5.1
5.5
2.7
3.1
3.5
Input Voltage (V)
Figure 11. Quiescent Current vs. Input Voltage
1.2
1
0.8
0.6
0.4
0
10 20 30 40 50 60 70 80 90
Temperature (°C)
Figure 13. Quiescent Current vs. Temperature
FP6145B-1.0-MAR-2014
4.7
5.1
5.5
0.81
VIN=VCNTL= VEN=5V
VOUT =1.2V
-40 -30 -20 -10
4.3
Figure 12. Shutdown Current vs. Input Voltage
Feedback Voltage (V)
Quiescent Current (mA)
1.4
3.9
Input Voltage (A)
VCNTL= VEN=5V
VIN=1.5V
VOUT =1.2V
0.805
0.8
0.795
0.79
-40 -30 -20 -10
0
10
20
30
40
50
60
70
80
90
Temperature (°C)
Figure 14. Feedback Voltage vs. Temperature
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FP6145B
Function Description
FB
Internal Soft-Start
Connecting this pin to an external resistor divider
receives the feedback voltage of the regulator. The
output voltage set by the resistor divider is
determined by:
An internal soft-start function controls rise rate of
the output voltage to limit the current surge at
start-up. The typical soft-start interval is about
0.7ms.
T
R
R
Where R1 is connected from VOUT to FB with Kelvin
sensing, and R2 is connected from FB to GND. A
bypass capacitor may be connected with R1 in
parallel to improve load transient response. The
recommended R1 and R2 are in the range of
K~
KΩ
VIN
MOSFET power supply input pin for power
conversions. The voltage at this pin is monitored for
Power-On Reset purpose.
VCNTL
Power input pin of the control circuitry. Connecting
this pin to a +5V supply voltage provides the bias for
the control circuitry. The voltage at this pin is
monitored for Power-On Reset purpose.
EN
Enable control pin. Pulling and holding this pin
below 0.4V shuts down the output. When the IC is
re-enabled, it will undergo a new soft-start cycle.
When this internal pulled high to VCNTL pin is
floating, it’ll enable the regulator.
VOUT
Output pin of the regulator. It is necessary to
connect an output capacitor with this pin for
closed-loop compensation and improving transient
responses.
Power-On-Reset
A Power-On-Reset (POR) circuit monitors both
voltages at VCNTL and VIN pins to prevent wrong
logic controls.
The POR function initiates a
soft-start process after both supply voltages exceed
their rising POR threshold voltages during powering
on. The POR function will also pull low the POK pin
regardless the output voltage when the VCNTL
voltage falls below its falling POR threshold.
FP6145B-1.0-MAR-2014
POK
Power-OK signal output pin.
This pin is an
open-drain output used to indicate status of output
voltage by sensing FB voltage. This pin will stop
sinking current to GND when the rising FB voltage
is above the VPOK over 2ms, and sink current again
when the falling FB voltage is below the VPNOK,
which indicates the output is OK or not.
Output Voltage Regulation
A temperature compensated 0.8V reference error
amplifier and an output NMOS regulates output to
the preset voltage. The error amplifier designed
with high bandwidth and DC gain provides very fast
transient response and less load regulation. It
compares Vref with the feedback voltage and
amplifies the difference to drive the output NMOS
which provides load current from VIN to VOUT.
Current-Limit
The FP6145B monitors the current via the output
NMOS and limits the maximum current to prevent
FP6145B from damages during overload or short
circuit conditions.
Under-Voltage Protection (UVP)
UVP prevents itself and load from short circuit
damages by monitoring the voltage on FB pin after
soft-start process finished. When the voltage on
FB pin falls below 0.35V threshold, the circuit will
initiate current foldback to reduce current limit to
120mA. When the FB voltage rises over 0.35V
again, the current foldback will dismiss.
Thermal Shutdown
A thermal shutdown circuit limits the junction
temperature of FP6145B.
When the junction
temperature exceeds +170°C, a thermal sensor will
turn off the output NMOS for cooling down the
device. The regulator will regulate the output
again through initiation of a new soft-start cycle
after the junction temperature decreases 50°C and
this will result in a pulsed output during continuous
thermal overload conditions to prevent the system
from damages.
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FP6145B
Application Information
Input Capacitor
PCB Layout Consideration
A minimum 1μF input ceramic capacitor is required.
X5R or X7R is recommended.
The capacitor
should be placed as close to the device as possible
for optimal performance.
1. Place the input capacitors of VIN and VCNTL
as close to the device as possible.
Output Capacitor
3. The exposed pad of the package should be
soldered to an equivalent area of metal on the
PCB.
The area should be maximized to
improve thermal performance.
4. Place R1, R2 and C4 close to the device to
avoid noise coupling.
5. Use wide tracks for large current paths.
The FP6145B requires a minimum of output
capacitor to maintain stability. The FP6145B is
designed to be stable with low ESR ceramic
capacitor. A 10μF ceramic capacitor is sufficient for
most applications. X5R or X7R is recommended.
The output capacitor must be placed within 1cm from
the output pin of the device.
2. Place output capacitor as close to the device as
possible.
Thermal Considerations
The power dissipation of the device can be
determined with the formula:
P
T
T
Additional copper area for heat sink is required in
applications where the minimum input voltage is
known and is large compared with the dropout
voltage. The below figure shows the maximum
allowable power dissipation of SOP-8 exposed pad
package for different ambient temperatures,
assuming θJA is 60°C/W and the maximum junction
temperature is 125°C.
3.5
MAX PD (W)
3
2.5
2
1.5
1
-40
-20
0
20
40
60
80
100
TA (°C)
FP6145B-1.0-MAR-2014
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FP6145B
fitipower integrated technology lnc.
Outline Information
SOP-8 (Exposed Pad) Package (Unit: mm)
SYMBOLS
UNIT
DIMENSION IN MILLIMETER
MIN
MAX
A
1.25
1.70
A1
0.00
0.15
A2
1.25
1.55
B
0.31
0.51
D
4.80
5.00
D1
3.04
3.50
E
3.80
4.00
E1
2.15
2.41
e
1.20
1.34
H
5.80
6.20
L
0.40
1.27
Note:Followed From JEDEC MO-012-E.
Carrier Dimensions
Life Support Policy
Fitipower’s products are not authorized for use as critical components in life support devices or other medical systems
FP6145B-1.0-MAR-2014
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