SCT12A2
SILICONCONTENT
TECHNOLOGY
2.7V-20V VIN, 15A Switch Current, Fully Integrated Synchronous Boost
Converter with Load Disconnection Control
FEATURES
DESCRIPTION
Wide Input Voltage Range: 2.7V-20V
Wide Output Voltage Range:4.5V-21V
Fully Integrated 13mΩ High Side FET and
11mΩ Low Side FET
Up to 96% Efficiency at Vin=7.2V, Vout=15V,
and Iout=2A
Up to 15A Switch Current and Programmable
Peak Current Limit
Load Disconnection Control with an External PChannel MOSFET
Typical Shut-down Current: 1uA
Programmable Switching Frequency: 200kHz1.0MHz
PFM Mode
Programmable Soft Start
Output and Feedback Overvoltage Protection
Thermal Shutdown Protection: 150°C
Available in DFN-20L 3.5mmx4.5mm Package
The SCT12A2 is a high efficiency synchronous boost
converter with fully integrated a 13mΩ high-side
MOSFET and an 11mΩ low-side MOSFET,
supporting 2.7V to 20V input voltage range and up to
15-A switch current. The switch current limit can be
adjustable with an external resistor.
The SCT12A2 adapts constant off-time peak current
control to provide fast transient. An external
compensation network allows flexibility setting loop
dynamics to achieve optimal transient performance at
different load conditions. Connection MODE pin to
ground selects the Pulse Frequency Modulation
(PFM) operation.
The SCT12A2 offers the gate control for an external
P-channel MOSFET to disconnect load from boost
converter output. This safety feature prevents the
damage on load from input shooting through to output
in shutdown condition.
The SCT12A2 monitors both output voltage and
feedback voltage to protect over voltage condition. It
features cycle-by-cycle peak current limit and thermal
shutdown protection when the device over loads.
APPLICATIONS
Bluetooth Audio
Power Banks
Type-C Power Delivery
The device is available in a low-profile package DFN20L 3.5mmx4.5mmx0.9mm with enhanced thermal
power pad.
TYPICAL APPLICATION
100%
L1
VOUT
VIN
C4
R2
SW
FSW
C6
C7
70%
VOUT
PGATE
VIN
ON
C1
OFF
EN
FB
SCT12A2
VCC
COMP
R5
ILIM
C3
80%
BOOT
Efficiency
C2
90%
R3
R4
60%
50%
40%
30%
3.6VIN_15VOUT
20%
PGND
SS
AGND
MODE
R1
C5
C8
C9
7.2VIN_15VOUT
10%
0%
0.01
12VIN_15VOUT
0.10
1.00
10.00
Output Current (A)
Power Efficiency, Vout=15V
For more information www.silicontent.com©2018 Silicon Content Technology Co., Ltd. All Rights Reserved
Product folder link: SCT12A2
1
SCT12A2
REVISION HISTORY
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Revision 1.0 released to market
DEVICE ORDER INFORMATION
PART NUMBER
PACKAGE MARKING
PACKAGE DISCRIPTION
SCT12A2DHK
12A2
20-Lead 3.5mm×4.5mm Plastic DFN
1）For Tape & Reel, Add Suffix R (e.g. SCT12A2DHKR)
ABSOLUTE MAXIMUM RATINGS
PIN CONFIGURATION
-0.3
UNIT
28
V
VIN, SW, VOUT, FSW,
19
ILIM
FSW
3
18
COMP
4
17
FB
16
VOUT
15
VOUT
-0.3
22
V
VCC, LIM，FB， EN,SS,
COMP, MODE
-0.3
5.5
V
SW
5
SW
6
Operating junction
C
temperature TJ(2)
Storage temperature TSTG
(1)
(2)
-65
150
20
2
PGATE
125
1
EN
SW
-40
AGND
MAX
SCT12A2
PGND
SW
7
14
VOUT
BOOT
8
13
PGATE
VIN
9
12
MODE
C
10
11
NC
BOOT
MIN
VCC
DESCRIPTION
Top View: 20-Lead Plastic DFN 3.5mmx4.5mm
SS
Over operating free-air temperature unless otherwise noted(1)
Stresses beyond those listed under Absolute Maximum Rating may cause device permanent damage. The device is not guaranteed to
function outside of its Recommended Operation Conditions.
The IC includes over temperature protection to protect the device during overload conditions. Junction temperature will exceed 150°C
when over temperature protection is active. Continuous operation above the specified maximum operating junction temperature will
reduce lifetime
PIN FUNCTIONS
NAME
NO.
VCC
1
EN
2
FSW
3
SW
4,5,6,7
BOOT
8
VIN
9
SS
10
NC
11
PIN FUNCTION
Internal linear regulator output. Connect a 1uF or larger ceramic capacitor to
ground. VCC cannot to be externally driven. No additional components or loading
is recommended on this pin.
Enable logic input. A 800KΩ resistor connects this pin to ground inside. Floating
disables the device.
Place a resistor from this pin to SW to set the switching frequency.
Switching node of the boost converter.
Power supply for the high-side FET gate driver. Must connect a 0.1uF or greater
ceramic capacitor between BOOT pin and SW node.
Power supply input. Must be locally bypassed with a capacitor as close as possible
to the pin.
Place a ceramic cap from this pinto ground to program soft-start time. An internal
5uA current source pulls SS pin to VCC.
Not Connected.
2For more information www.silicontent.com© 2018 Silicon Content Technology Co., Ltd.
Product folder link: SCT12A2
All Rights Reserved
SCT12A2
MODE
12
Ground connected enables PSM mode.
PGATE
13
Gate driver output for an external P-channel MOSFET to disconnect load.
Boost converter output. Connect a 1uF decoupling capacitor as close to VOUT pins
and power ground pad as possible to reduce the ringing voltage of SW.
Feedback Input. Connect a resistor divider from VOUT to FB to set up output
voltage. The device regulates FB to the internal reference value of 1.2V typical.
Output of the error amplifier and switching converter loop compensation point.
Inductor peak current limit set point input. A resistor connecting this pinto ground
sets current limit through low-side power FET.
VOUT
14,15,16
FB
17
COMP
18
ILIM
19
AGND
20
Analog ground. Analog ground should be used as the common ground for all small
signal analog inputs and compensation components. No electrical connection to
PGND inside.
PGND
21
Power ground. Must be soldered directly to ground planes using multiple vias
directly under the IC for improved thermal performance and electrical contact.
RECOMMENDED OPERATING CONDITIONS
Over operating free-air temperature range unless otherwise noted
PARAMETER
VIN
VOUT
TJ
DEFINITION
Input voltage range
Output voltage range
Operating junction temperature
MIN
MAX
UNIT
2.7
4.5
-40
20
21
125
V
V
°C
MIN
MAX
UNIT
-2
+2
kV
-0.5
+0.5
kV
ESD RATINGS
PARAMETER
VESD
DEFINITION
Human Body Model(HBM), per ANSI-JEDEC-JS-001-2014
specification, all pins(1)
Charged Device Model(CDM), per ANSI-JEDEC-JS-0022014specification, all pins(2)
(1) HBM and CDM stressing are done in accordance with the ANSI/ESDA/JEDEC JS-001-2014 specification
THERMAL INFORMATION
PARAMETER
RθJA
RθJC
THERMAL METRIC
Junction to ambient thermal resistance(1)
Junction to case thermal
resistance(1)
DFN-20L
38
39
UNIT
°C/W
(1) SCT provides RθJA and RθJC numbers only as reference to estimate junction temperatures of the devices. RθJA and RθJC are not a
characteristic of package itself, but of many other system level characteristics such as the design and layout of the printed circuit
board (PCB) on which the SCT12A2 is mounted, thermal pad size, and external environmental factors. The PCB board is a heat sink
that is soldered to the leads and thermal pad of the SCT12A2. Changing the design or configuration of the PCB board changes the
efficiency of the heat sink and therefore the actual RθJA and RθJC.
For more information www.silicontent.com© 2018 Silicon Content Technology Co., Ltd. All Rights Reserved 3
Product folder link: SCT12A2
SCT12A2
ELECTRICAL CHARACTERISTICS
VIN=3.6V, TJ=-40°C~125°C, typical values are tested under 25°C.
SYMBOL
PARAMETER
TEST CONDITION
MIN
TYP
MAX
UNIT
Power Supply and Output
VIN
Operating input voltage
2.7
20
V
VOUT
Output voltage range
4.5
21
V
VIN_UVLO
Input UVLO
Hysteresis
2.6
200
2.7
V
mV
ISD
Shutdown current
1
3
uA
IQ
VCC
Quiescent current from VIN
Quiescent current from VOUT
Internal linear regulator
VIN rising
EN=0, no load and measured
on VIN pin
1
420
4.8
EN=2V, no load, no switching
IVCC=5mA, VIN=6V
uA
uA
V
Reference and Control Loop
FPWM mode
PSM mode
VFB=1.2V
1.180
1.196
1.206
1.220
1.230
1.244
100
V
V
nA
VREF
Reference voltage of FB
IFB
FB pin leakage current
GEA
VCOMP=1.5V
200
uS
VFB=VREF-200mV, VCOMP=1.5V
20
uA
VFB=VREF+200mV, VCOMP=1.5V
20
uA
VCOMP_H
Error amplifier trans-conductance
Error amplifier maximum source
current
Error amplifier maximum sink
current
COMP high clamp
VFB=1V， RILIM=100KΩ
1.5
V
VCOMP_L
COMP low clamp
VFB=1.5V, RILIM=100KΩ,PFM
0.6
V
Power MOSFETs
RDSON_H
High side FET on-resistance
13
mΩ
RDSON_L
11
mΩ
15
A
ICOMP_SRC
ICOMP_SNK
Low side FET on-resistance
Current Limit
ILIM
Peak current limit
Enable and Mode
Enable high threshold
VEN
Enable low threshold
REN
Enable pull down resistance
VMODE
ISS
MODE high threshold
MODE low threshold
Soft-start charging current
RILIM=100kΩ
VCC=5V
1.2
V
V
kΩ
4
V
V
uA
0.4
800
VCC=5V
1.5
5
Switching Frequency
FSW
Switching frequency
RFSW=301k, VOUT=12V
520
tON_MIN
Minimum on-time
RFSW=301k, VOUT=12V
160
200
ns
tOFF_MIN
Minimum off-time
RFSW=301k, VFB=0V
480
150
ns
kHz
Load Disconnection Control
IPGATE
VPGATE_C
PGATE pull down current
Clamp voltage between PGATE and
VOUT
250
6.1
uA
7
V
Protection
VOVP_VOUT
Output overvoltage threshold
VOUT rising
4For more information www.silicontent.com© 2018 Silicon Content Technology Co., Ltd.
Product folder link: SCT12A2
22
All Rights Reserved
V
SCT12A2
SYMBOL
VOVP_VFB
TSD
PARAMETER
TEST CONDITION
Hysteresis
Feedback overvoltage with respect
to reference voltage
Thermal shutdown threshold
Hysteresis
VFB rising
VFB falling
TJ rising
MIN
TYP
400
110
105
150
20
MAX
UNIT
mV
%
%
°C
°C
For more information www.silicontent.com© 2018 Silicon Content Technology Co., Ltd. All Rights Reserved 5
Product folder link: SCT12A2
SCT12A2
100%
100%
90%
90%
80%
80%
70%
70%
Efficiency
Efficiency
TYPICAL CHARACTERISTICS
60%
50%
40%
60%
50%
40%
30%
3.6VIN_12VOUT
30%
3.6VIN_15VOUT
20%
7.2VIN_12VOUT
20%
7.2VIN_15VOUT
10%
12VIN_15VOUT
10%
0%
0.01
0.10
1.00
0%
0.01
10.00
0.10
Output Current (A)
100%
100%
90%
90%
80%
80%
70%
70%
60%
50%
40%
3.6VIN_12VOUT
60%
50%
40%
7.2VIN_12VOUT
30%
3.6VIN_15VOUT
20%
7.2VIN_15VOUT
20%
3.6VIN_18VOUT
10%
7.2VIN_18VOUT
10%
0%
0.01
0.10
1.00
0%
0.01
10.00
0.10
Output Current (A)
1.00
10.00
Output Current (A)
Figure 3. Efficiency, fsw=400 kHz, 1-cell Battery, PFM
Figure 4. Efficiency, fsw=400KHz, 2-cells Battery, PFM
1600
16
1400
14
1200
12
1000
10
ILIM (A)
FSW (kHz)
10.00
Figure 2. Efficiency, Vout=15V, fsw=400KHz, PFM
Efficiency
Efficiency
Figure 1. Efficiency, Vout=12V, fsw=400KHz, PFM
30%
1.00
Output Current (A)
800
600
8
6
4
400
Fsw
200
Current Limit
2
0
0
0
200
400
600
800
0
100
150
200
250
300
350
RILIM (kOhm)
RFSW (kOhm)
Figure 5. Switching Frequency vs FSW Resistance
50
Figure 6. Inductor Peak Current Limit vs RLIM Resistance
6For more information www.silicontent.com© 2018 Silicon Content Technology Co., Ltd.
Product folder link: SCT12A2
All Rights Reserved
SCT12A2
16.0
15.0
15.0
15.5
VOUT (V)
VOUT (V)
14.9
14.9
15.0
14.8
7.2VIN_15VOUT
14.5
Vout=15V
14.8
14.7
14.0
0.0
0.5
1.0
1.5
2.0
0.0
2.5
2.0
4.0
8.0
10.0
12.0
14.0
Figure 8. Line Regulation (Vout=15V)
530
600
520
500
510
400
Iq (uA)
FSW (kHz)
Figure 7. Load Regulation (Vin=7.2V, Vout=15V)
500
490
300
200
FSW
480
470
-50
6.0
VIN (V)
IOUT (A)
0
50
100
Iq
100
0
-50
150
0
Temperature(ºC)
50
100
150
Temperature(ºC)
Figure 9. Frequency vs Temperature
Figure 10. Quiescent Current vs Temperature
3.0
1.25
2.5
1.23
2.0
VFB (V)
ISD (uA)
1.21
1.5
1.19
1.0
ISD
0.5
VFB
1.17
0.0
1.15
-50
0
50
100
Temperature(ºC)
Figure 11. Shutdown Current vs Temperature
150
-50
0
50
100
150
Temperature(ºC)
Figure 12. Feedback Reference vs Temperature
For more information www.silicontent.com© 2018 Silicon Content Technology Co., Ltd. All Rights Reserved 7
Product folder link: SCT12A2
SCT12A2
FUNCTIONAL BLOCK DIAGRAM
UVLO
VIN
9
VCC
BOOT
SW
SW
SW
SW
1
8
4
5
6
7
OTP
UVLO
Q2
BOOT
Regulator
LDO
Thermal
Sensor
15 VOUT
FB
VOUT
Q1
OVP
Load
Disconnect
Control
Dead Time and
PWM Control
Logic
11 NC
Q
Q
R
5uA
+
+
17 FB
GM
1.2V
+
Mode
Selection
+
+
S
UVLO EN
12
10 SS
ON/OFF and
Protection
UVLO
VIN
34pF
UVLO OVP OTP
V/I
1/N
3
18 COMP
+
FSW
16 VOUT
OVP
PGATE 13
MODE
14 VOUT
800k
1.2V
2
21
19
20
EN
PGND
ILIM
AGND
8For more information www.silicontent.com© 2018 Silicon Content Technology Co., Ltd.
Product folder link: SCT12A2
All Rights Reserved
SCT12A2
OPERATION
Overview
The SCT12A2 device is a fully integrated synchronous boost converter, which regulates output voltage higher than
input voltage. The constant off-time peak current mode control provides fast transient with pseudo fixed switching
frequency. When low-side MOSFET Q1 turns on, input voltage forces the inductor current rise. Sensed voltage on
low-side MOSFET peak current rises above the voltage of COMP. After the inductor current reaches the peak
current, the device turns off low-side MOSFET and inductor goes through body diode of high-side MOSFET Q2
during dead time. After dead time duration, the device turns on high-side MOSFET Q2 and the inductor current
decreases. Based on Vin and Vout voltage, the device predicts required off-time and turns off high-side MOSFET
Q2.This repeats on cycle-by-cycle based.
The voltage feedback loop regulates the FB voltage to a 1.2V reference with an internal trans-conductance error
amplifier. The feedback loop stability and transient response are optimized through an external loop compensation
network connected to the COMP pin.
When MODE pin is connected to ground, the SCT12A2 works at PFM mode to further increase the efficiency in
light load condition. The quiescent current of SCT12A2 is 420uA typical under no-load condition and not switching.
Disabling the device, the typical supply shutdown current is 1μA.
A resistor connected between SW pin and the FSW pin sets the switching frequency. The wide switching frequency
range of 200 kHz to 1.0 MHz offers optimization on efficiency or size of filter components.
The SCT12A2 provides PGATE pin to control the gate of an external load disconnection P-channel MOSFET, which
completely disconnects the load from the input during output shutdown condition. During start-up, the SCT12A2
gradually turns on the load disconnection switch to limit the inrush current.
The SCT12A2 device features adjustable soft-start time, cycle-by-cycle low-side FET current limit, over-voltage
protection, and over-temperature protection.
The SCT12A2 uses two separate ground pins to avoid ground bouncing due to the high switching current through
the N-channel power MOSFET. AGND pin sets the reference for all control functions. The source of the power
MOSFET connects to PGND pin. Both grounds must be connected to the thermal pad on the PCB at the closest
point.
VIN Power
The SCT12A2 is designed to operate from an input voltage supply range between 2.7 V to 20V. If the input supply
is located more than a few inches from the converter, additional bulk capacitance may be required in addition to the
ceramic bypass capacitors. A typical choice is ceramic capacitor with a value of 47μF or 2 x 22uF.
VCC Power
The internal VCC LDO provides the bias power supply for internal circuitries. A ceramic capacitor of no less than
1uF is required to bypass from VCC pin to ground. During starting up, input of VCC LDO is from VIN pin. Once the
output voltage at VOUT pin exceeds VIN voltage, VCC LDO switches its input to VOUT pin. This allows higher
voltage headroom of VCC at lower input voltage. The maximum current capability of VCC LDO is 130mA typical.
No additional components or loading are recommended on this pin.
Under Voltage Lockout UVLO
The SCT12A2 features UVLO protection for voltage rails of VIN, VCC and BOOT-SW from the converter
malfunctioning and the battery over discharging. The default VIN rising threshold is 2.6V typical at startup and falling
threshold is 2.4V typical at shutdown. The internal VCC LDO dropout voltage is about 100mV and the device is
disabled when VCC falling trips 2.1V typical threshold. The internal charge pump from BOOT to SW powers the
gate driver to high-side MOSFET Q2. The BOOT UVLO circuit monitors the capacitor voltage between BOOT pin
and SW pin. When the voltage of BOOT to SW falls below a preset threshold 3V typical, high-side MOSFET Q2
turns off. As a result, the device works as a non-synchronous boost converter.
For more information www.silicontent.com© 2018 Silicon Content Technology Co., Ltd. All Rights Reserved 9
Product folder link: SCT12A2
SCT12A2
Enable and Start-up
When applying a voltage higher than the EN high threshold (maximum 1.2V), the SCT12A2 enables all functions
and starts converter operation. To disable converter operation, EN voltage needs fall below its lower threshold
(minimum 0.4V). An internal 800KΩ resistor connects EN pin to the ground. Floating EN pin automatically disables
the device.
The SCT12A2 features programmable soft start to prevent inrush current during power-up. SS pin sources an
internal 5μA current charging an external soft-start capacitor CSS when EN pin exceeds turn-on threshold. The
device uses the lower voltage between the internal voltage reference 1.2V and the SS pin voltage as the reference
input voltage of error amplifier and regulates the output. The soft-start completes when SS pin voltage exceeds the
internal 1.2V reference. Use equation 1 to calculate the soft-start time (10% to 90%). When EN pin is pulled low to
disable the device, the SS pin will be discharged to ground.
t SS =
where
CSS ∗ VREF
ISS
(1)
tSS is the soft start time
VREF is the internal reference voltage of 1.2V
CSS is the capacitance connecting to SS pin
ISS is the source current of 5uA to SS pin
Adjustable Switching Frequency
The SCT12A2 features adjustable switching frequency from 200kHz to 1.0MHz.To set the switching frequency, an
external resistor between SW pin and FSW pin is a must to guarantee the proper operation. Use Equation 2 or the
curves in Figure 5 to determine the resistance for a given switching frequency. To reduce the solution size, one can
typically set the switching frequency as higher as possible, but need to consider the tradeoff of the thermal
dissipation and minimum on time of low-side power MOSFET.
6∗(
𝑅𝐹𝑅𝐸𝑄 =
where:
1
𝑓𝑆𝑊
− 𝑇𝐷𝐸𝐿𝐴𝑌 ∗
𝑉𝑂𝑈𝑇
𝑉𝐼𝑁
)
(2)
𝐶𝐹𝑅𝐸𝑄
fSW is the desired switching frequency
TDELAY = 90 ns
CFREQ = 34 pF
VIN is the input voltage
VOUT is the output voltage
Adjustable Peak Current Limit
The SCT12A2 boost converter implements cycle-by-cycle peak current limit function with sensing the internal lowside power MOSFET Q1 during overcurrent condition. While the Q1 is turned on, its conduction current is monitored
by the internal sensing circuitry. Once the low-side MOSFET Q1 current exceeds the limit, it turns off immediately.
An external resistor connecting ILIM pin to ground sets the low-side MOSFET Q1 peak current limit threshold. Use
Equation 3 or Figure 6 to calculate the peak current limit.
𝐼𝐿𝐼𝑀 =
1500
𝑅𝐿𝐼𝑀
(3)
where:
10For more information www.silicontent.com© 2018 Silicon Content Technology Co., Ltd.
Product folder link: SCT12A2
All Rights Reserved
SCT12A2
ILIM is the peak current limit
RLIM is the resistance between ILIM pin to ground.
This current limit function is realized by detecting the current flowing through the low-side MOSFET. The current
limit feature loses function in the output hard short circuit conditions. At normal operation, when the output hard
shorts to ground, there is a direct path to short the input voltage through high-side MOSFET Q2 or its body diode
even the Q2 is turned off. This could damage the circuit components and cause catastrophic failure at load circuit.
Load Disconnection Control
For both non-synchronous and synchronous boost converter, there is a non-fully controlled current path from
converter input to output load through the diode or the high-side MOSFET body diode. During start up, once VIN is
present, VOUT is moved to VIN level due to the direct path from input to output even when the device is shut down
or the load is not ready. The presence of unwanted output voltage before system start up sequence could cause
system to latch off or malfunction.
To address the above issues, the SCT12A2 provides a solution to insert an external P-channel MOSFET to
disconnect the load from the converter output in application as shown in Figure 13. Choosing a lower Rdson of the
disconnection P-channel MOSFET Q3 reduces impact on the efficiency. The source of Q3 needs connect to VOUT
pin. Output capacitor is required at both VOUT pin and the source of P-channel MOSFET to maintain the loop
stability.
In Figure 13, PGATE pin connecting to gate of Q3 has a constant sink current pulling down capability and a
resistance pulling up capability. During SCT12A2 starting up, internal circuitry softly starts up of P-channel MOSFET.
When gate-source voltage of external P-channel MOSFET is lower than the threshold voltage, the Q3 is turned on
and the load is connected to VOUT pin. The source-gate voltage of external P-channel MOSFET is clamped up to
8V when the P-channel MOSFET is fully turned on.
When the Enable is disabled or the input voltage lower than the VIN UVLO threshold, the SCT12A2 shuts off the
external P-channel MOSFET and disconnect the load
L1
VIN
C7
SW
Q2
VOUT
Q1
Q3
VOUT_LOAD
C5A
C5B
8V
PGATE
UVLO
EN
250uA
Figure 13. Load Disconnection Control
For more information www.silicontent.com© 2018 Silicon Content Technology Co., Ltd. All Rights Reserved 11
Product folder link: SCT12A2
SCT12A2
Over Voltage Protection and Minimum On-time
The SCT12A2 features both VOUT pin over voltage protection and the FB pin over voltage protection. If the VOUT
pin is above 22V typical or FB pin voltage exceeds 1.32V typical, the device stops switching immediately until the
VOUT pin drops below 21 V or FB pin voltage drops below 1.26V. The OVP function prevents the connected output
circuitry from un-predictive overvoltage.
The low-side MOSFET has minimum on-time 160ns typical limitation. While the device is operating at minimum on
time and further increasing Vin push output voltage beyond regulation point. With output and feedback over voltage
protection, the converter skips pulse with turning off high-side MOSFET and prevents output running higher to
damage the load.
Pulse Frequency Modulation (PFM) Modes
Connecting MODE pin to ground, the SCT12A2 works at Pulse Frequency Modulation (PFM) mode to improve the
power efficiency in light load. As the load current decreasing, the COMP pin voltage decreases as resulting the
inductor current down. With the load current further decreasing, the COMP pin voltage decreases and be clamped
to a voltage corresponding to the ILIM/12. The converter extends the off time of high-side MOSFET Q2 to reduce
the average delivered current to output. The switching frequency is lower and varied depending on loading condition.
In PFM mode, the peak inductor current is fixed at around 1A and the output voltage is regulated 0.7% higher than
the setting out put voltage. When the inductor current decreased to zero, zero-cross detection circuitry on high-side
MOSFET Q2 forces the Q2 off until the beginning of the next switching cycle. The boost converter does not sink
current from the load at light load.
Thermal Shutdown
Once the junction temperature in the SCT12A2 exceeds 150C, the thermal sensing circuit stops switching until the
junction temperature falling below 125C, and the device restarts. Thermal shutdown prevents the damage on device
during excessive heat and power dissipation condition.
12For more information www.silicontent.com© 2018 Silicon Content Technology Co., Ltd.
Product folder link: SCT12A2
All Rights Reserved
SCT12A2
APPLICATION INFORMATION
Typical Application
L1 1.5uH
Q3
VIN
R2
390k
C2
47uF
SW
R3
680k
C6
1uF
C4 0.1uF
VOUT_LOAD
C7A
47uF
C7B
47uF
BOOT
FSW
VOUT
VIN
PGATE
EN
FB
ON
C1
0.1uF
OFF
VCC
SCT12A2
COMP
ILIM
C3
1uF
PGND
SS
AGND
MODE
R1
100k
C5
47nF
R5
16.9k
C9
4.7nF
R4
59k
C8
47pF
Figure 14. One Cell Battery Input, 15V Output with Load Disconnection Protection
Design Parameters
Design Parameters
Example Value
Input Voltage
3.0V to 14V
Output Voltage
15V
Output Current
2A
Output voltage ripple (peak to peak)
100mV
Switching Frequency
400 kHz
Operation Mode
PFM
*For description in the typical application section, the converter output before PMOS is specified as VOUT and the converter output after
PMOS is specified as VOUT_LOAD in below.
For more information www.silicontent.com© 2018 Silicon Content Technology Co., Ltd. All Rights Reserved 13
Product folder link: SCT12A2
SCT12A2
Switching Frequency
The resistor connected from FSW to SW sets switching frequency of the converter. The resistor value required for
a desired frequency can be calculated using equation 3. High frequency can reduce the inductor and output
capacitor size with the tradeoff of more thermal dissipation and lower efficiency.
𝑅𝐹𝑅𝐸𝑄 =
𝑉
1
−𝑇𝐷𝐸𝐿𝐴𝑌 ∗ 𝑂𝑈𝑇 )
𝑓𝑆𝑊
𝑉𝐼𝑁
6∗(
𝐶𝐹𝑅𝐸𝑄
(3)
Table 1. RFSW Value for Common Switching Frequencies
(Vin=3.6V, Vout=15V, Room Temperature)
where:
fSW is the desired switching frequency
TDELAY = 90 ns
CFREQ = 34 pF
VIN is the input voltage
VOUT is the output voltage
Fsw
RFSW
230 KHz
680 KΩ
400 KHz
390 KΩ
575 KHz
270 KΩ
715 KHz
200 KΩ
Peak Current Limit
Using equation 4 the correct external resistor at ILIM pin sets the peak input current. For a typical current limit of
12A, the resistor value is 100KΩ. The minimum current limit must be higher than the required peak switch current at lowest
input voltage and the highest output power not to hit the current limit and still regulate the output voltage.
𝐼𝐿𝐼𝑀 =
1500
𝑅𝐿𝐼𝑀
(4)
Table 2. RLIM Value for Inductor Peak Current
(Vin=3.6V, Vout=15V, L=1.5uH, Room Temperature)
where:
ILIM
RLIM
ILIM is the peak current limit
15 A
100 KΩ
RLIM is the resistance of ILIM pin to ground
10 A
150 KΩ
7.5A
200 KΩ
Output Voltage
The output voltage is set by an external resistor divider R3 and R4 in typical application schematic. A minimum
current of typical 20uA flowing through feedback resistor divider gives good accuracy and noise covering. The
value of R3 can be calculated by equation 5.
𝑅3 =
(𝑉𝑂𝑈𝑇 − 𝑉𝑅𝐸𝐹 ) × 𝑅4
𝑉𝑅𝐸𝐹
(5)
where:
VREF is the feedback reference voltage,
typical 1.2V
Table 3. Feedback Resistor R3R4Value for Output Voltage
(Room Temperature)
VOUT
R3
R4
9V
390 KΩ
59 KΩ
15 V
698 KΩ
59 KΩ
14For more information www.silicontent.com© 2018 Silicon Content Technology Co., Ltd.
Product folder link: SCT12A2
All Rights Reserved
SCT12A2
Inductor Selection
The performance of inductor affects the power supply’s steady state operation, transient behavior, loop stability,
and boost converter efficiency. The inductor value, DC resistance, and saturation current influences both efficiency
and the magnitude of the output voltage ripple. Larger inductance values reduces inductor current ripple and
therefore leads to lower output voltage ripple. For a fixed DC resistance, a larger value inductor yields higher
efficiency via reduced RMS and core losses. However, a larger inductor within a given inductor family will generally
have a greater series resistance, thereby counteracting this efficiency advantage.
Inductor values can have ±20% or even ±30% tolerance with no current bias. When the inductor current approaches
saturation level, its inductance can decrease 20% to 35% from the value at 0-A current depending on how the
inductor vendor defines saturation. When selecting an inductor, choose its rated current especially the saturation
current larger than its peak current during the operation.
To calculate the current in the worst case, use the minimum input voltage, maximum output voltage, maxim load
current and minimum switching frequency of the application, while considering the inductance with -30% tolerance
and low-power conversion efficiency.
For a boot converter, calculate the inductor DC current as in equation 6
𝐼𝐿𝐷𝐶 =
Where
𝑉𝑂𝑈𝑇 × 𝐼𝑂𝑈𝑇
𝑉𝐼𝑁 × 𝜂
(6)
VOUT is the output voltage of the boost converter
IOUT is the output current of the boost converter
VIN is the input voltage of the boost converter
η is the power conversion efficiency
Calculate the inductor current peak-to-peak ripple, ILPP, as in equation 7
𝐼𝐿𝑃𝑃 =
Where
1
𝐿×(
1
𝑉𝑂𝑈𝑇 −𝑉𝐼𝑁
+
1
𝑉𝐼𝑁
) × 𝑓𝑆𝑊
(7)
ILPP is the inductor peak-to-peak current
L is the inductance of inductor
fSW is the switching frequency
VOUT is the output voltage
VIN is the input voltage
Therefore, the peak switching current of inductor, ILPEAK, is calculated as in equation 8.
𝐼𝐿𝑃𝐸𝐴𝐾 = 𝐼𝐿𝐷𝐶 +
𝐼𝐿𝑃𝑃
2
(8)
Set the current limit of the SCT12A2 higher than the peak current ILPEAK and select the inductor with the saturation
current higher than the current limit.
The inductor’s DC resistance (DCR), equivalent series resistance (ESR) at switching frequency and the core loss
significantly affect the efficiency of power conversion. Core loss is related to the core material and different inductors
have different core loss. For a certain inductor, larger current ripple generates higher DCR and ESR conduction
losses and higher core loss. Usually, a data sheet of an inductor does not provide the ESR and core loss information.
If needed, consult the inductor vendor for detailed information. There is a tradeoff among the inductor’s inductance,
DCR and ESR resistance, and its footprint. Shielded inductors typically have higher DCR than unshielded inductors.
Table 4 lists recommended inductors for the SCT12A2. Verify whether the recommended inductor can support the
For more information www.silicontent.com© 2018 Silicon Content Technology Co., Ltd. All Rights Reserved 15
Product folder link: SCT12A2
SCT12A2
user's target application with the previous calculations and bench evaluation. In this application, the WE's inductor
SMD7443552150 is used on SCT12A2 evaluation board.
Table 4. Recommended Inductors
Part Number
L
(uH)
DCR Max
(mΩ)
Saturation Current/Heat
Rating Current (A)
Size Max
(LxWxH mm)
Vendor
WE-HCI SMD 7443552150
1.5
5.3
17 / 14
10.5 x 10.2 x 4.0
WurthElektronix
Input Capacitor Selection
For good input voltage filtering, choose low-ESR ceramic capacitors. A 0.1μF ceramic bypass capacitor is
recommended to be placed as close as possible to the VIN pin of the SCT12A2. A ceramic capacitor of more than
1.0μF is required at the VCC pin to get a stable operation of the internal LDO.
For the power stage, because of the inductor current ripple, the input voltage changes if there is parasitic inductance
and resistance between the power supply and the inductor. It is recommended to have enough input capacitance
to make the input voltage ripple less than 100mV. Generally, 2x 22μF or 47uF input capacitance is recommended
for most applications. Choose the right capacitor value carefully by considering high-capacitance ceramic capacitors
DC bias effect, which has a strong influence on the final effective capacitance.
Output Capacitor Selection
For small output voltage ripple, choose a low-ESR output capacitor like a ceramic capacitor. Typically, three 22μF
ceramic output capacitors work for most applications. Higher capacitor values can be used to improve the load
transient response. Due to a capacitor’s derating under DC bias, the bias can significantly reduce capacitance.
Ceramic capacitors can lose most of their capacitance at rated voltage. Therefore, leave margin on the voltage
rating to ensure adequate effective capacitance. From the required output voltage ripple, use the equation 9 and
10 to calculate the minimum required effective capacitance, COUT.
𝑉𝑟𝑖𝑝𝑝𝑙𝑒_𝐶 =
(𝑉𝑂𝑈𝑇 − 𝑉𝐼𝑁_𝑀𝐼𝑁 ) × 𝐼𝑂𝑈𝑇
𝑉𝑂𝑈𝑇 × 𝑓𝑆𝑊 × 𝐶𝑂𝑈𝑇
(9)
𝑉𝑟𝑖𝑝𝑝𝑙𝑒_𝐸𝑆𝑅 = 𝐼𝐿𝑝𝑒𝑎𝑘 × 𝐸𝑆𝑅
where
(10)
Vripple_C is output voltage ripple caused by charging and discharging of the output capacitor.
Vripple_ESR is output voltage ripple caused by ESR of the output capacitor.
VIN_MIN is the minimum input voltage of boost converter.
VOUT is the output voltage.
IOUT is the output current.
ILpeak is the peak current of the inductor.
ƒSW is the converter switching frequency.
ESR is the ESR resistance of the output capacitors.
External P-channel MOSFET Selection
To minimize the power efficiency impact on the boost system, the external P-channel MOSFET with smaller Rdson
is inserted between the converter output and load circuit to implement the load disconnection protection. The
SCT12A2 provides the gate drive capability for the external P-channel MOSFET, the maximum VGS of the P-channel
MOSFET is clamped up to -7.1V typically if the VOUT is higher than 7.1V. Otherwise, the maximum VGS follows the
VOUT pin voltage in the application. As a result, the low Rdson and low threshold P-channel MOSFET is preferred.
Table 5 shows the recommended P-channel MOSFET details.
16For more information www.silicontent.com© 2018 Silicon Content Technology Co., Ltd.
Product folder link: SCT12A2
All Rights Reserved
SCT12A2
Table 5. Recommended External P-channel MOSFET
Part Number
Rdson
(mΩ)
ID
(A)
Max VDS
(V)
Max VGS
(V)
Vendor
FDMC612PZ
8.4
14
-20
±12
Fairchild
CSD25404Q3
5.5
18
-20
±12
Texas
Instruments
Loop Stability
An external loop compensation network comprises resister R5, ceramic capacitors C8 and C9 connected to the
COMP pin to optimize the loop response of the converter. The power stage small signal loop response of
constant off time with peak current control can be modeled by equation 11.
𝑆
𝑆
𝑅𝑙𝑜𝑎𝑑 × (1 − 𝐷) (1 + 2𝜋×𝑓𝐸𝑆𝑅𝑍)(1 + 2𝜋×𝑓𝑅𝐻𝑃𝑍)
𝐺𝑃𝑆 (𝑆) =
×
𝑆
2 × 𝑅𝑆𝐸𝑁𝑆𝐸
1+
(11)
2𝜋×𝑓𝑃
where
D is the switching duty cycle.
Rload is the output load resistance.
RSENSE is the equivalent internal current sense resistor, which is 0.08 Ω.
𝑓𝑃 =
1
(12)
2𝜋 × 𝑅𝑙𝑜𝑎𝑑 × 𝐶𝑂
where
CO is the output capacitance
𝑓𝑃𝐸𝑆𝑅𝑍 =
1
2𝜋 × 𝐸𝑆𝑅 × 𝐶𝑂
(13)
where
ESR is the equivalent series resistance of the output capacitor.
𝑓𝑅𝐻𝑃𝑍 =
𝑅𝑙𝑜𝑎𝑑 × (1 − 𝐷)2
2𝜋 × 𝐿
(14)
The COMP pin is the output of the internal trans-conductance amplifier. Equation 15 shows the small signal
transfer function of compensation network.
𝐺𝐸𝐴 × 𝑅𝐸𝐴 × 𝑉𝑅𝐸𝐹
𝐺𝐶 (𝑆) =
×
𝑉𝑂𝑈𝑇
(1 +
where
(1 +
𝑆
2𝜋×𝑓𝐶𝑂𝑀𝑍
𝑆
2𝜋×𝑓𝐶𝑂𝑀𝑃1
)(1 +
)
𝑆
2𝜋×𝑓𝐶𝑂𝑀𝑃2
)
(15)
GEA is the amplifier’s trans-conductance
REA is the amplifier’s output resistance
VREF is the reference voltage at the FB pin
VOUT is the output voltage
ƒCOMP1, ƒCOMP2 are the poles' frequency of the compensation network.
ƒCOMZ is the zero's frequency of the compensation network.
The next step is to choose the loop crossover frequency, ƒC . The higher frequency that the loop gain stays above
zero before crossing over, the faster the loop response is. It is generally accepted that the loop gain cross over no
higher than the lower of either 1/10 of the switching frequency, ƒSW , or 1/5 of the RHPZ frequency, ƒRHPZ.
Then set the value of R5, C8, and C9 in typical application circuit by following these equations.
For more information www.silicontent.com© 2018 Silicon Content Technology Co., Ltd. All Rights Reserved 17
Product folder link: SCT12A2
SCT12A2
𝑅5 =
2𝜋 × 𝑉𝑂𝑈𝑇 × 𝑅𝑆𝐸𝑁𝑆𝐸 × 𝑓𝐶 × 𝐶𝑂
(1 − 𝐷) × 𝑉𝑅𝐸𝐹 × 𝐺𝐸𝐴
(16)
where
ƒC is the selected crossover frequency.
𝐶8 =
𝑅𝑙𝑜𝑎𝑑 × 𝐶𝑂
2 × 𝑅5
𝐶9 =
𝐸𝑆𝑅 × 𝐶𝑂
𝑅5
(17)
(18)
If the calculated value of C9 is less than 10pF, it can be left open. Designing the loop for greater than 45°of phase
margin and greater than 10-dB gain margin eliminates output voltage ringing during the line and load transient.
18For more information www.silicontent.com© 2018 Silicon Content Technology Co., Ltd.
Product folder link: SCT12A2
All Rights Reserved
SCT12A2
Application Waveforms
Test Condition: VIN=7.2V, VOUT=15V, Ta=27ºC.
Figure 15. Switching Waveforms and Output Ripple
Figure 16. Switching Waveforms and Output Ripple
(Vout=15V, Iout=100mA)
(Vout=15V, Iout=2A)
Figure 17. Power up (Vout=15V, Iout=2A)
Figure 18. Power Down (Vout=15V, Iout=2A)
Figure 19. Load Transient
(Vout=15V, Iout=0.2A to 1.8A, SR=250mA/us)
Figure 20. Load Transient
(Vout=15V, Iout=0.5A to 1.5A, SR=250mA/us)
For more information www.silicontent.com© 2018 Silicon Content Technology Co., Ltd. All Rights Reserved 19
Product folder link: SCT12A2
SCT12A2
Layout Guideline
The regulator could suffer from instability and noise problems without careful layout of PCB. Radiation of highfrequency noise induces EMI, so proper layout of the high-frequency switching path is essential. Minimize the length
and area of all traces connected to the SW pin, and always use a ground plane under the switching regulator to
minimize coupling. The input capacitor needs to be close to the VIN pin and ground pad to reduce the input supply
ripple. The placement and ground trace for C6 is critical for the performance of SW ringing voltage. Place capacitor
C6 as close to VOUT pins and power ground pad as possible to reduce high frequency ringing voltage on SW pin.
The layout should also be done with well consideration of the thermal. The center thermal pad should always be
soldered to the board for mechanical strength and reliability, using multiple thermal vias (≤8mil) underneath the
thermal pad. The bottom layer is a large ground plane connected to the PGND plane and AGND plane on top layer
by vias. Since thermal pad is electrical power ground of the device, improper soldering thermal pad to ground plate
on PCB will cause SW higher ringing and overshoot besides downgrading thermal performance. It is recommended
8mil diameter drill holes of thermal vias, but a smaller via offers less risk of solder volume loss. On applications
where solder volume loss thru the vias is of concern, plugging or tenting can be used to achieve a repeatable
process.
AGND
L1
VCC
AGND
EN
ILIM
MODE
VIN
SW
COMP
SW
FB
SW
VOUT
SW
VOUT
SW
VOUT
BOOT
PGATE
VIN
MODE
VOUT_P
S
VOUT
D
PMOS
G
SS
PGATE
PGND
Figure 21. PCB Layout Example Top Layer
Thermal Considerations
The maximum IC junction temperature should be restricted to 125°C under normal operating conditions. Calculate
the maximum allowable dissipation, PD(max) , and keep the actual power dissipation less than or equal to PD(max) .
The maximum-power-dissipation limit is determined using Equation 19.
𝑃𝐷(𝑀𝐴𝑋) =
125 − 𝑇𝐶𝐴
𝑅θJA
(19)
where
TA is the maximum ambient temperature for the application.
RθJA is the junction-to-ambient thermal resistance given in the Thermal Information table.
SCT12A2 DFN package includes a thermal pad that improves the thermal capabilities of the package. The real
junction-to-ambient thermal resistance RθJA of the package greatly depends on the PCB type, layout, thermal pad
connection and environmental factor. Using thick PCB copper and soldering the thermal pad to a large ground plate
enhance the thermal performance. Using more vias connects the ground plate on the top layer and bottom layer
around the IC without solder mask also improves the thermal capability.
20For more information www.silicontent.com© 2018 Silicon Content Technology Co., Ltd.
Product folder link: SCT12A2
All Rights Reserved
SCT12A2
PACKAGE INFORMATION
TOP VIEW
BOTTOM VIEW
SYMBOL
SIDE VIEW
NOTE:
1.
2.
3.
4.
5.
6.
Drawing proposed to be made a JEDEC package outline MO220 variation.
Drawing not to scale.
All linear dimensions are in millimeters.
Thermal pad shall be soldered on the board.
Dimensions of exposed pad on bottom of package do not
include mold flash.
Contact PCB board fabrication for minimum solder mask web
tolerances between the pins.
A
A1
b
c
D
D2
D3
e
e1
e2
Nd
E
E2
E3
E4
L
h
Unit: Millimeter
MIN
TYP
MAX
0.85
0.9
0.95
——
0.01
0.05
0.18
0.25
0.30
0.18
0.20
0.25
4.40
4.50
4.60
3.10
3.20
3.30
3.85REF
0.50BSC
0.75BSC
0.25BSC
3.50BSC
3.40
3.50
3.60
2.10
2.20
2.30
0.35REF
0.75REF
0.35
0.40
0.45
0.20
0.25
0.30
For more information www.silicontent.com© 2018 Silicon Content Technology Co., Ltd. All Rights Reserved 21
Product folder link: SCT12A2
SCT12A2
TAPE AND REEL INFORMATION
Device
SCT12A2DHKR
Reel Width
12
Package Type
DFN
A
Ø329±1
Pins
20
REEL DIMENSIONS
B
C
12.8±1
Ø100±1
SPQ
3000
D
Ø13.3±0.3
t
2.0±0.3
TYPE DIMENSIONS
W
(mm)
A0
(mm)
B0
(mm)
K0
(mm)
t
(mm)
P
(mm)
12±0.30
3.80±0.10
4.80±0.10
1.18±0.10
0.30±0.05
8±0.10
E
(mm)
F
(mm)
P2
(mm)
D
(mm)
D1
(mm)
P0
(mm)
10P0
(mm)
1.75±0.10
5.50±0.10
2.00±0.10
1.55±0.10
1.50MIN
4.00±0.10
40.0±0.20
22For more information www.silicontent.com© 2018 Silicon Content Technology Co., Ltd.
Product folder link: SCT12A2
All Rights Reserved
SCT12A2
RELATED PARTS
PART NUMBERS
DESCRIPTION
COMMENTS
SCT12A3
15-A Fully-integrated
Synchronous Boost
Converter
Vin=2.7V-20V, 15A switch peak current
with load disconnection control and AAO
SCT12A0
12-A Fully-integrated
Synchronous Boost
Converter
Vin=2.7V-14V, 12A switch peak current
without load disconnection control
SCT12A1
12-A Fully-integrated
Synchronous Boost
Converter with load
disconnection
Vin=2.7V-14V, 12A switch peak current
with load disconnection control
L1 1.5uH
Q3
VIN
C4 0.1uF
R2
390k
C2
47uF
0.1uF
C1
SW
FSW
C6
1uF
R3
390k
VOUT_LOAD
C7A
47uF
C7B
47uF
BOOT
VOUT
VIN
PGATE
EN
FB
ON
OFF
VCC
C3
1uF
1nF
C0
R0
300k
SCT12A3 COMP
RAAO
ILIM
R1
100k
MODE
R6
220k
CAAO
PGND
C5
1uF
R5
16.9k
C9
4.7nF
R4
59k
C8
47pF
Figure 22. SCT12A3 Typical Application
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee the third
party Intellectual Property rights are not infringed upon when integrating Silicon Content Technology (SCT) products into any
application. SCT will not assume any legal responsibility for any said applications.
23
Silicon Content Technology Co., Ltd.
#1 Floor 2 Building 15, Yard 33 Dijin Road, Haidian District, Beijing 100095
(86 10) 64779806
FAX: (86 10) 64779806
www.silicontent.com© Silicon Content 2018
工商网监
湘ICP备2023018690号
