AW8737S Data Sheet
Nov 2017 V1.1
High efficiency, Low noise, Ultralow distortion, Constant large
volume, Upgrade Seventh generation Class K Audio Amplifier
FEATURES
DESCRIPTION
AW8737S is designed to enhance smart mobile phone
sound quality, which is a new high efficiency, low noise,
ultra-low distortion, constant large volume, upgrading
seventh generation class K audio amplifier. Using a new
generation K-Chargepump technology, efficiency
reaches 93%, power amplifier’s overall efficiency is up to
80%, greatly prolong the mobile phone usage time. The
AW8737S noise floor is as low as to 53μV, with 97dB
high signal-to-noise-ratio(SNR). The ultra-low distortion
0.008% and unique no-crack-noise (NCN) technology
brings high quality music enjoyment.
AW8737S has 0.6W, 0.8W, 1W and 1.2W four selectable
speaker-guard output power levels, recommended using
rated power of 0.5W and above speakers. AW8737S
integrated unique NCN technology, the output power
cannot drop along with lithium battery voltage lower
down. Within lithium battery voltage range (3.3V--4.35V),
output power is constant, preventing the voice becomes
smaller and smaller during usage of cell phone.
The AW8737S uses Awinic proprietary TDD-Noise
suppression technology and EMI suppression
technology, effectively restrain TDD-Noise and EMI
interference.
AW8737S has built-in over current protection,
over-temperature protection and short circuit protection
function, effectively protect the chip. The AW8737S uses
small 0.4mm pitch 1.6mmx1.68mm CSP-14 package.
Low noise：53μV
Power amplifier overall efficiency 80%
Ultra-low distortion：0.008%
Within Lithium battery voltage range, output
power is maintained constant
Selectable speaker-guard power level：0.6w，0.8W，
1W，1.2W
No-crack-noise (NCN) technology
Super TDD-Noise suppression
Excellent pop-click suppression
One wire pulse control
High PSRR：-68dB（217Hz）
ESD protection：±6kV (HBM)
Small 0.4mm pitch 1.6mm×1.68mm CSP-14package
APPLICATIONS
Smart phone
APPLICATION DIAGRAM
VBAT
CS1
4.7uF
CF1
2.2uF
CS2
0.1uF
A3,B3
A4
Pulse Input
1
Single-End
Input
2
3
4
15nF
3KΩ
Cin
Rin
A2
VDD
D1
B1
C1
C1P C1N C2P C2N
SHDN
PVDD
Cin
Rin
3KΩ
D2
AW8737S
A1
D3
COUT
4.7uF
10V
INN
Cd
220pF
15nF
CF2
2.2uF
VOP
B4
SPK
B1
C2
1nF
B2
C3
1nF
INP
VON
D4
GND
C2,C4
Figure 1
AW8737S single-ended input application diagram
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1
AW8737S Data Sheet
Nov 2017 V1.1
PIN CONFIGURATION AND TOP MARK
AW8737SCSR TOP VIEW
VON
D
GND
C
VDD
VOP
B
INN
VDD
SHDN
A
2
3
D
C2P
C1P
C
C1N
GND
B
C2N
A
INP
1
AW8737SCSR MARKING
PVDD
2
1
4
3
4
K37S–AW8737SCSR
XXXX–Production tracking code
Please notice the pin number
Figure 2
K37S
XXXX
AW8737S pin diagram top view and device marking
PIN DESCRIPTION
Number
Symbol
Description
A1
A2
A3
A4
B1
B3
B4
C1
C2，C4
D1
D2
D3
D4
INP
INN
VDD
SHDN
C2N
VDD
VOP
C1N
GND
C2P
C1P
PVDD
VON
Positive audio input terminal
Negative audio input terminal
Power supply
Chip power down pin，active low；one wire pulse control；
Negative side of the external charge pump flying capacitor C2
Power supply
Positive audio output terminal
Negative side of the external charge pump flying capacitor C1
Ground
Positive side of the external charge pump flying capacitor C2
Positive side of the external charge pump flying capacitor C1
Boost charge pump output voltage
Negative audio output terminal
AWINIC CLASS K FAMILY
ITEM
TEST CONDITION
AW8736
AW8737
AW8737S
AW8738
PVDD(V)
VDD=4.2V
5.8
6.05
6.05
6.05
Ouput
noise(μV)
VDD=4.2V，f=20Hz to 20kHz，input ac
grounded，8V/V,A-weighting
125
52
53
40
VDD=3.6V，Po=1.0W，RL=8Ω+33μH
75
80
80
83
Efficiency(%)
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2
AW8737S Data Sheet
Nov 2017 V1.1
FUNCTIONAL DIAGRAM
Figure 3
AW8737S functional diagram
APPLICATION DIAGRAM
VBAT
CS1
4.7uF
CF1
2.2uF
CS2
0.1uF
A3,B3
A4
Pulse Input
1
Single-End
Input
3
2
4
15nF
3KΩ
Cin
Rin
A2
VDD
D1
B1
C1
C1P C1N C2P C2N
SHDN
PVDD
Rin
15nF
3KΩ
D2
AW8737S
A1
D3
COUT
4.7uF
10V
INN
Cd
220pF
Cin
CF2
2.2uF
VOP
B4
SPK
B1
C2
1nF
B2
C3
1nF
INP
VON
D4
GND
C2,C4
Figure 4
AW8737S single-ended input application diagram (Note 1)
Note1：when single-ended input，input audio signal can arbitrarily connect to one of INN，INP input terminal，the other
terminal connects to ground through input capacitor and resistance.
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3
AW8737S Data Sheet
Nov 2017 V1.1
VBAT
CS1
4.7uF
A3,B3
A4
Pulse Input
1
Differential
Input
3
2
CF2
2.2uF
CF1
2.2uF
CS2
0.1uF
VDD
D2
D1
B1
C1
C1P C1N C2P C2N
SHDN
PVDD
D3
COUT
4.7uF
10V
4
15nF
3KΩ
Cin
Rin
A2
INN
AW8737S
Cd
220pF
Cin
Rin
15nF
3KΩ
A1
VOP
B4
SPK
B1
C2
1nF
B2
C3
1nF
INP
VON
D4
GND
C2,C4
Figure 5
AW8737S differential input application diagram
ORDERING INFORMATION
Product Type
Operation
temperature range
Package
Device
Marking
Moisture
Sensitivity
Level
Environmental
Information
Delivery
Form
AW8737SCSR
-40℃～85℃
CSP-14
K37S
MSL1
ROHS+HF
Tape and
Reel
3000 pcs
AW8737S
Shipment
R: Tape & Reel
Package type
CS: CSP14
ABSOLUTE MAXIMUM RATING(Note2)
Parameter
Range
Supply Voltage VDD
-0.3V to 6V
Chargepump output voltage PVDD
-0.3V to 7V
VOP,VON
-0.3V to PVDD+0.3V
C1P ,C2P
-0.3V to PVDD+0.3V
C1N,C2N
-0.3V to VDD+0.3V
INP，INN Input Pin Voltage
-0.3V to VDD+0.3V
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4
AW8737S Data Sheet
Nov 2017 V1.1
84.9℃/W
Package Thermal Resistance θJA
-40℃ to 85℃
Ambient Temperature Range
165℃
Maximum Junction Temperature TJMAX
-65℃ to 150℃
Storage Temperature Range TSTG
260℃
Lead Temperature（Soldering 10 Seconds）
（Note
ESD Rating
3）
±6KV
HBM（human body model）
CDM
±1.5KV
MM
±250V
Latch-up
+IT：450mA
Test Condition：JEDEC STANDARD NO.78D NOVEMBER
2011
-IT：-450mA
Note 2：Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device.
These are stress ratings only and functional operation of the device at these or any other conditions beyond those indicated
under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended
periods may affect device reliability.
Note 3：The human body model is a 100pF capacitor discharged through a 1.5kΩ resistor into each pin. Test method:
MIL-STD-883H Method 3015.8
MODE DESCRIPTION(TA=25℃,VDD=4.2V)
AW8737S audio amplifier outer input capacitor is Cin，outer input resist is Rin，inner input resist is 16.6KΩ，
gain Av is 319.5K/(Rin+16.6K). Recommended typical application is：
1、 Cin=15nF，Rin=3KΩ，Av=16.3V/V；
2、 Cin=15nF，Rin=10KΩ，Av=12V/V；
Gain（V/V）
Mode
Enable
Signal
NCN Power（W）
Rin=3KΩ
Rin=10KΩ
RL=8Ω+
33μH
Mode1
16.3
12
1.2
1.6
Mode2
16.3
12
1
1.3
Mode3
16.3
12
0.8
1.0
Mode4
16.3
12
0.6
0.8
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RL=6Ω+
33μH
NCN
Function
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AW8737S Data Sheet
Nov 2017 V1.1
ELECTRICAL CHARACTERISTICS
Test condition：TA=25℃, VDD=3.6V，RL=8Ω+33μH，f=1kHz（unless otherwise noted）
Parameter
Test conditions
Min
Typ
Max
Units
VDD
Power supply voltage
3.0
5.5
V
VIH
SHDN high input voltage
1.3
VDD
V
VIL
SHDN low input voltage
0
0.35
V
30
mV
1
μA
|VOS|
Output offset voltage
Vin=0V, VDD=3.0V to 5.5V
-30
ISD
Shutdown current
VDD=3.6V, SHDN =0V
TTG
Thermal AGC start temperature
threshold
150
℃
TTGR
Thermal AGC exit temperature
threshold
130
℃
TSD
Over temperature protection
threshold
160
℃
TSDR
Over temperature
recovery threshold
120
℃
TON
Start-up time
40
ms
protection
0
K-Chargepump
1.5*
VDD =3.0V to 4V
PVDD
VDD >4V
Vhys
6.05
OVP hysteresis
VDD >4V
FCP
Charge Pump frequency
VDD=3.0V to 5.5V
ηCP
Charge pump efficiency
VDD=3.6V, Iload=200mA
TST
Soft-start time
No load，COUT=4.7μF
IL
V
VDD
Output voltage
V
50
0.8
Current limit when PVDD short
to ground
1.06
mV
1.33
93
MHz
%
1
1.2
1.4
ms
200
300
400
mA
15
mA
Class K power amplifier（Mode1-Mode4）
Iq
Quiescent current
VDD=4.2V，Vin=0，no load
10
η
Efficiency
VDD=3.6V, Po=1.0W, RL=8Ω+33μH
80
Modulation frequency
VDD=3.0V to 5.5V
Av
gain
external input resistance=3kΩ
Vin
Recommend input voltage
VDD=3.0V to 5.5V
Rini
Inner input resistance
Mode1~Mode4
16.6
kΩ
Fhin
Input high pass filter corner
frequency
Cin=15nF，external input resistance=3kΩ
542
Hz
Fosc
Mode1 NCN output power
Pncn
Mode2 NCN output power
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600
800
%
1000
16.3
kHz
V/V
1
Vp
VDD=4.2V, RL=8Ω+33μH
1.08
1.2
1.32
W
VDD=4.2V, RL=6Ω+33μH
1.44
1.6
1.76
W
VDD=4.2V, RL=4Ω+15μH
2.16
2.4
2.64
W
VDD=4.2V, RL=3Ω+15μH
2.16
2.4
2.64
W
VDD=4.2V, RL=8Ω+33μH
0.9
1
1.1
W
VDD=4.2V, RL=6Ω+33μH
1.17
1.3
1.43
W
VDD=4.2V, RL=4Ω+15μH
1.8
2
2.2
W
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AW8737S Data Sheet
Nov 2017 V1.1
Parameter
Mode3 NCN output power
Pncn
Mode4 NCN output power
PSRR
SNR
Test conditions
Min
Typ
Max
Units
VDD=4.2V, RL=3Ω+15μH
2.16
2.4
2.64
W
VDD=4.2V, RL=8Ω+33μH
0.72
0.8
0.88
W
VDD=4.2V, RL=6Ω+33μH
0.9
1.0
1.1
W
VDD=4.2V, RL=4Ω+15μH
1.44
1.6
1.76
W
VDD=4.2V, RL=3Ω+15μH
1.8
2.0
2.2
W
VDD=4.2V, RL=8Ω+33μH
0.54
0.6
0.66
W
VDD=4.2V, RL=6Ω+33μH
0.72
0.8
0.88
W
VDD=4.2V, RL=4Ω+15μH
1.08
1.2
1.32
W
VDD=4.2V, RL=3Ω+15μH
1.44
1.6
1.76
W
VDD=4.2V, Vp-p_sin=200mV
217Hz
-68
dB
VDD=4.2V, Vp-p_sin=200mV
1kHz
-68
dB
97
dB
53
μVrms
58
μVrms
68
μVrms
VDD=3.6V,Po=1W,RL=8Ω+33μH,f=1kHz, Mode1
0.008
%
VDD=3.6V,Po=1W,RL=6Ω+33μH,f=1kHz,Mode1
0.008
%
Power supply rejection ratio
Signal-to-noise ratio
VDD=4.2V, Po=1.75W, THD+N=1%，
RL=8Ω+33μH，Av=8V/V
VDD=4.2V, f=20Hz to 20kHz,
input ac grounded，AV=8V/V
Vn
Output noise voltage
VDD=4.2V, f=20Hz to 20kHz,
input ac grounded, 12V/V
A-weighting
VDD=4.2V, f=20Hz to 20kHz,
input ac grounded, 16V/V
THD+N
Total harmonic distortion+noise
One wire pulse control
TH
SHDN high level duration time
VDD=3.0V to 5.5V
0.75
2
10
μs
TL
SHDN low level duration time
VDD=3.0V to 5.5V
0.75
2
10
μs
TLATCH
SHDN turn on delay time
VDD=3.0V to 5.5V
150
500
μs
TOFF
SHDN turn off delay time
VDD=3.0V to 5.5V
150
500
μs
TAT
Attack time
-13.5dB gain attenuation completed
TRL
Release time
13.5dB gain release completed
AMAX
Maximum attenuation
NCN（Note 4）
40
ms
1.2
s
-13.5
dB
Note 4：Attack time points to 13.5dB gain attenuation time；Release time points to 13.5dB gain recovery time.
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AW8737S Data Sheet
Nov 2017 V1.1
MEASUREMENT SETUP
AW8737S features switching digital output, as shown in Figure 6. Need to connect a low pass filter to
VOP/VON output respectively to filter out switch modulation frequency, then measure the differential
output of filter to obtain analog output signal.
10nF
500Ω
VOP
INP
Rin
Cin
30kHz
Low-Pass Fliter
AW8737S
VON
INN
500Ω
Rin
Cin
10nF
Figure 6
AW8737S test setup
Low pass filter uses resistance and capacitor values listed in Table 1.
Rfilter
Cfilter
Low-pass cutoff frequency
500Ω
10nF
32kHz
1kΩ
4.7nF
34kHz
Table 1
AW8737S recommended values for low pass filter
Output Power Calculation
According to the above test methods, the differential analog output signal is obtained at the output of the
low pass filter. The valid values Vo_rms of the differential signal as shown below:
Vo_rms
The power calculation of Speaker is as follows：
PL
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(Vo _ rms) 2
RL
（RL：load impedance of the speaker）
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8
AW8737S Data Sheet
Nov 2017 V1.1
TYPICAL CHARACTERISTICS
Efficiency vs Po
K-chargepump Efficiency
100
100
90
90
VDD=3.6V
80
VDD=4.2V
80
VDD=4.2V
Efficiency( % )
70
Efficiency( % )
VDD=3.6V
60
50
40
30
70
60
50
40
30
20
20
RL=8Ω+33μH
10
CF1,CF2=2.2μF
COUT =4.7μF
10
0
0
0
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
0
0.2
0.4
0.6
Po ( W )
0.8
1
1.2
1.4
1.6
1.8
2
10K
20K
Po ( W )
GAIN vs FREQUENCY
OUTPUT POWER vs VDD
1.4
24
AW8737S Po keep constant
Mode1
1.2
22
20
Mode2
18
Mode3
0.8
Mode4
0.6
16
Gain( V/V )
NCN Output Power( W )
1.0
Mode1~Mode4
Rine=3kΩ
Cin=1μF
RL=8Ω+33μH
14
12
10
8
0.4
6
4
0.2
2
RL=8Ω+33μH
0
3.3
3.5
3.7
3.9
20
4.3
4.1
50
100
VDD ( V )
1K
FREQUENCY ( Hz )
THD+N vs Po
THD+N vs FREQUENCY
10
1
THD+N (%)
THD+N (%)
1
10
Mode1 0.8W
VDD=4.2V
Rine=3kΩ
Cin=1μF
RL=8Ω+33μH
0.1
0.01
0.001
20
Mode1 0.8W
VDD=4.2V
Rine=3kΩ
Cin=1μF
RL=6Ω+33μH
0.1
0.01
50
100
1K
10K
0.001
20
20K
Frequency ( Hz )
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50
100
1K
10K
20K
Po( W )
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AW8737S Data Sheet
Nov 2017 V1.1
Po vs VIN
2
Po vs VIN
2
Mode1
VDD=4.2V
f=1kHz
RL=8Ω+33μH
1
NCN
Po (W)
Po (W)
1
Mode2
VDD=4.2V
f=1kHz
RL=8Ω+33μH
0.5
NCN
0.5
1.30
0.28
0.1
0.1
0.5
0.1
1
2
Po vs VIN
2
Mode3
VDD=4.2V
f=1kHz
RL=8Ω+33μH
1
Mode4
VDD=4.2V
f=1kHz
RL=8Ω+33μH
Po (W)
1
NCN
0.5
0.23
NCN
0.5
1.07
0.2
0.1
0.93
0.1
0.5
0.1
1
2
0.5
0.1
VIN ( Vp )
1
2
VIN ( Vp )
PSRR vs FREQUENCY
PSRR vs FREQUENCY
0
0
Mode1
Rine=3kΩ
Cin=1μF
RL=8Ω+33μH
-10
-20
Mode4
Rine=3kΩ
Cin=1μF
RL=8Ω+33μH
-10
-20
-30
PSRR (dB)
-30
PSRR (dB)
2
VIN ( Vp )
Po vs VIN
2
1
0.5
0.1
VIN ( Vp )
Po (W)
1.20
0.25
-40
-50
VDD=4.2V
VDD=3.6V
-40
-50
-60
-60
-70
-70
-80
-80
-90
VDD=4.2V
VDD=3.6V
-90
20
100
1K
10K 20K
20
Frequency ( Hz )
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100
1K
10K 20K
Frequency ( Hz )
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AW8737S Data Sheet
Nov 2017 V1.1
SHUTDOWN SEQUENCE
STARTUP SEQUENCE
SHDN
SHDN
VOP&VON
10ms/div
VOP&VON
NCN ATTACK SEQUENCE
100μs/div
NCN RELEASE SEQUENCE
Vin
Vin
VOP-VON
VOP-VON
200ms/div
10ms/div
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AW8737S Data Sheet
Nov 2017 V1.1
DETAILED FUNCTIONAL DESCRIPTION
AW8737S is designed to enhance smart mobile phone sound quality, which is a new high efficiency, low
noise, ultra-low distortion, constant large volume, upgrading seventh generation class K audio amplifier,
referred to as K7S. Using a new generation K-Chargepump technology, efficiency reaches 93%, power
amplifier’s overall efficiency is up to 80%, greatly prolong the mobile phone usage time. The AW8737S
noise floor is as low as to 53μV, with 97dB high signal-to-noise-ratio(SNR). The ultra-low distortion
0.008% and unique no-crack-noise (NCN) technology brings high quality music enjoyment.
AW8737S has 0.6W, 0.8W, 1W and 1.2W four selectable speaker-guard output power levels,
recommended using rated power of 0.5W and above speakers. AW8737S integrated unique NCN
technology, the output power cannot drop along with lithium battery voltage lower down. Within lithium
battery voltage range (3.3V--4.35V), output power is constant, preventing the voice becomes smaller and
smaller during usage of cell phone.
The AW8737S built in excellent pop-click noise suppression circuit, effectively avoids pop-click noise
during shutdown, wakeup, and power-up/down operation of AW8737S.
The AW8737S uses awinic proprietary TDD-Noise suppression technology and EMI suppression
technology, effectively restrain TDD-Noise and EMI interference.
AW8737S has built-in over current protection, over-temperature protection and short circuit protection
function, effectively protect the chip. The AW8737S uses small 0.4mm pitch 1.6mmx1.68mm CSP-14
package. The AW8737S is specified over the industrial temperature range of -40℃ to 85℃.
CONSTANT OUTPUT POWER
In the mobile phone audio applications, the NCN function to promote music volume and quality is very
attractive, but as the lithium battery voltage drops, general power amplifier output power will reduce
gradually, leads to smaller and smaller music volume. So, it is hard to provide high quality music within
the battery voltage range. The AW8737S uses unique second generation NCN technology, within lithium
battery voltage range(3.3V--4.35V), output power is constant, the output power cannot drop along with
lithium battery voltage lower down. Even if the battery voltage drops, AW8737S can still provide high
quality large volume music enjoyment. AW8737S has four operation modes, the four modes have NCN
function, the output power level is 1.2W,1W,0.8W,0.6W, respectively.
Second Generation NCN technology
In audio application, output signal will be undesirable distortion caused by too large input and power
supply voltage down with battery, and clipped output signal may cause permanent damage to the speaker.
The traditional NCN function adjusts system gain automatically to generate desired output by detecting
the “Crack” distortion of output signal, makes the output audio signal maintain smooth, not only can
effectively avoid overloading output power to the damage of speaker, at the same time bring the constant
shock of high quality music enjoyment. The traditional NCN function is shown below in figure 7.
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AW8737S Data Sheet
Nov 2017 V1.1
Crack Noise
Battery
Voltage
NCNOFF
NCNON
Crack Noise
Battery
Voltage
NCNOFF
Figure 7
NCNON
Traditional NCN Operation Principle
AW8737S adopts Awinic unique second generation NCN technology, the output signal is free from
limitation of power rail. When battery voltage drops, NCN output signal will not distort, output amplitude
remains unchanged, keeping constant output power, as shown in figure 8. Even if the battery voltage
drops, AW8737S can still provide high quality large volume music enjoyment.
Supply
Rail
Battery
Voltage
Traditional NCN function
Figure 8
Constant
output power
Second Generation NCN funciton
Second generation NCN Operation Principle
Attack time
Attack time is the time it takes for the gain to be attenuated -13.5dB once the audio signal exceeds the
NCN threshold. Fast attack times allow the NCN to react quickly and prevent transients such as symbol
crashes from being distorted. However, fast attack times can lead to volume pumping, where the gain
reduction and release becomes noticeable, as the NCN cycles quickly. Slower attack times cause the
NCN to ignore the fast transients, and instead act upon longer, louder passages. Selecting an attack time
that is too slow can lead to increased distortion in the case of the No Clip function. According to mobile
phone and portable equipment audio features, attack time of AW8737S is set to be 40ms, effectively
keeping the music rhythm, and at the same time eliminating the crack distortion, protecting the speaker.
Release time
Release time is the time it takes for the gain to return to its normal level once the audio signal returns
below the NCN threshold. A fast release time allows the NCN to react quickly to transients, preserving the
original dynamics of the audio source. However, similar to a fast attack time, a fast release time
contributes to volume pumping. A slow release time makes the music smooth and soft, it is better to
suppress the crack distortion, but longer release time will make music sounds “boring” ,lack of impact.
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AW8737S Data Sheet
Nov 2017 V1.1
According to mobile phone and portable equipment audio features, release time of AW8737S is set to be
1.2s.
K-Chargepump
AW8737S adopts a new generation of charge pump technology：K -Chargepump structure, it has high
efficiency and large driving ability, working frequency is 1.1MHz，built in soft start circuit, current limiting
control loop and over-voltage-protection(OVP) loop, guaranteeing system stable and reliable operation.
High Efficiency
AW8737S uses K-chargepump structure，booster output voltage PVDD is 1.5 times of supply voltage
VDD, the ideal efficiency can reach 100%. K-chargepump efficiency is the ratio of output power to input
power, that is
POUT
*100%
PIN
For example, in an ideal M times chargepump, the input current IIN is M times of output current IOUT，the
efficiency formula can be written as：
POUT
V *I
V
*100% OUT OUT *100% OUT *100%
PIN
VIN * M * I OUT
M *VIN
M is charge pump work mode variable (1.5 times), VOUT is charge pump output voltage, VIN is power
supply voltage, IOUT is load current. For K-chargepump, the output voltage is 1.5 times of the input
voltage, due to the charge pump internal switch loss and IC static current loss, the actual efficiency will be
up to 93%. Therefore, K-chargepump booster technology can greatly improve the power efficiency.
Charge Pump Structure
Figure 9 is charge pump basic principle diagram, the charge pump used in AW8737S has seven switches,
the output voltage PVDD is 1.5 times as input voltage VDD through seven switches timing control.
S1
C1P
+
VDD
CIN
4.7uF
S6
CF1
2.2uF
S4
PVDD
COUT
4.7uF
C1N
S2
+
S7
C2P
CF2
2.2uF
S5
S3
C2N
Figure 9 Charge Pump Principle Diagram
The operation of the charge pump has two phases. In Φ 1, as shown in figure 10, switches S1, S2 and S3
are closed, VDD charges to the flying capacitor CF1 CF2.
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AW8737S Data Sheet
Nov 2017 V1.1
S1
C1P
+
VDD
CIN
4.7uF
S6
CF1
2.2uF
S4
PVDD
COUT
4.7uF
C1N
S2
+
S7
C2P
CF2
2.2uF
S3
S5
C2N
Charging Phase
Φ1: Flying Capacitor Charging
Figure 10
In Φ 2, as shown in figure 11: switches S1, S2 and S3 are disconnected, switches S4, S5, S6 and S7 are
closed. Because the voltage across the capacitor can't mutation, so the voltage on flying capacitor CF1
CF2, is added to the VDD, which make PVDD risen to a higher voltage.
S1
C1P
+
VDD
CIN
4.7uF
S6
CF1
2.2uF
S4
PVDD
COUT
4.7uF
C1N
S2
+
S7
C2P
CF2
2.2uF
S3
S5
C2N
Discharging Phase
Figure 11
Φ2： Flying capacitor charge transfer to the output capacitance COUT
Soft start
K-chargepump has integrated soft start function in order to limit supply power inrush current during
start-up. The supply current is limited to be 350 mA, and the soft start time is 1.2 ms.
Current Limitation Control
K-chargepump has integrated the current limitation control loop. In normal operation, when the heavy
load or a situation that make charge pump flow through very large current, the current limitation control
loop will control charge pump maximum output current capacity, that is 2A.
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AW8737S Data Sheet
Nov 2017 V1.1
Over Voltage Protection(OVP)Control
K-chargepump’s output voltage PVDD is a multiple of the input voltage VDD, which provide a high voltage
rail for internal power amplifier circuits, allowing the amplifiers provide greater output dynamic range in
the lithium battery voltage range, so as to realize the large volume, high quality class K audio enjoyment.
K-chargepump has integrated the over voltage protection control loop, when the input voltage VDD is
greater than 4V, the output voltage PVDD is no longer a multiple of VDD, but is controlled by over voltage
protection(OVP) loop and is stable in 6.05V, and the hysteresis voltage is about 50mV.
One-wire pulse control
One wire pulse control technology only needs a single GPIO port to operate the chip, complete a variety
of functions, it is very popular in the area of the GPIO port shortage and portable systems.
When the control signal line is longer, because of the signal integrity or radio frequency interference
problem, it will produce the narrow glitch signal. Awinic one wire pulse control technology integrated the
Deglitch circuit in internal control pin, which can effectively eliminate the influence of the glitch signal, as
shown in figure 12.
AW8737S
SHDN
Deglitch
Control signal with glitch
Glitch is eleminated
Figure 12 Awinic Deglitch function diagram
The traditional one wire pulse control technology still receives pulse signal from control port when chip
is startup, so when the master control chip (such as mobile phone BB) sends wrong pulse during normal
operation, the system will enter into error states. AW8737S uses one wire pulse latch technology, after the
master control chip has sent pulses, the state will be latched, no longer receive the latter mis-sending
pulse signals, as shown in figure 13.
TLATCH
STATE 4
STATE 3
Traditional One Wire
Pulse Control
Shielding abnormal
pulse signal
STATE 4
STATE 3
Anti-interference One
Wire Pulse Control
Figure 13 Anti-interference One Wire Pulse Control Function Diagram
One Wire Pulse Control
AW8737S select each mode through the detection of number of the pulse signal rising edge of SHDN pin,
as shown in figure 14: When SHDN pin pull high from shutdown mode, there is only a rising edge,
AW8737S enter into mode 1,NCN output power is 1.2W; When high-low-high signal set to SHDN pin,
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AW8737S Data Sheet
Nov 2017 V1.1
there are two rising edges, AW8737S enter into mode 2, NCN output power is 1W; When there are three
rising edges, AW8737S enter into mode 3,NCN output power is 0.8W; When there are four rising edges,
AW8737S enter into mode 4,NCN function is turned off; AW8737S has four operation modes, the number
of the rising edges does not allow more than four.
MODE1
MODE2
MODE3
MODE4
TH TL
0.75μs
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