SLM2104SCA-13GTR

SLM2104S 600V Half-Bridge Driver PRODUCT SUMMARY      VOFFSET IO+/VOUT ton/off (typ.) Deadtime (typ.) FEATURES  600 V max. 130 mA/270 mA 10 V - 20 V 680 ns/150 ns 520 ns            GENERAL DESCRIPTION The SLM2104S is a high voltage, high speed power MOSFET and IGBT drivers with dependent highand low-side referenced output channels. Proprietary HVIC and latch immune CMOS technologies enable ruggedized monolithic construction. The logic input is compatible with standard CMOS or LSTTL output, down to 3.3 V logic. The output drivers feature a high pulse current buffer stage designed for minimum driver cross conduction. The floating channel can be used to drive an N-channel power MOSFET or IGBT in the high-side configuration which operates up to 600 V. Floating channel designed for bootstrap operation Fully operational to +600 V Tolerant to negative transient voltage, dV/dt immune Gate drive supply range from 10 V to 20 V Undervoltage lockout 3.3 V, 5 V, and 15 V logic compatible Cross-conduction prevention logic Matched propagation delay for both channels Internal set deadtime Shutdown input turns off both channels RoHS compliant SOIC-8 and PDIP-8 package TYPICAL APPLICATION CIRCUIT up to 600V VCC VCC VB IN IN HO SD SD VS COM LO to load SLM2104S (Refer to Lead Assignments for correct configuration). This diagram shows electrical connections only. Please refer to our Application Notes and DesignTips for proper circuit board layout. Typical Application Circuit Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev 1.0, August 2019 1 SLM2104S PIN CONFIGURATION Package Pin Configuration (Top View) SOIC-8 1 VCC VB 8 2 IN HO 7 3 SD VS 6 4 COM LO 5 and PDIP-8 PIN DESCRIPTION No. Pin Description 1 VCC Low-side and logic fixed supply 2 IN Logic input for high-side and low-side gate driver outputs (HO and LO), in phase with HO 3 4 SD COM Low-side return 5 LO Low-side gate drive output 6 VS High-side floating supply return 7 HO High-side gate drive output 8 VB High-side floating supply Logic input for shutdown ORDERING INFORMATION Industrial Range: -40°C to +125°C Order Part No. Package QTY SLM2104SCA-13GTR SLM2104SCA-GT SLM2104SDA-GT SOIC8, Pb-Free SOIC8, Pb-Free PDIP8, Pb-Free 2500/Reel 100/Tube 100/Tube Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev 1.0, August 2019 2 SLM2104S FUNCTIONAL BLOCK DIAGRAM VB VBS UVLO Pulse Filter IN Pulse Gen VCC UVLO R R S Q HO VS VCC Dead time & Shoot-Through Prevention LO SD COM Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev 1.0, August 2019 3 SLM2104S ABSOLUTE MAXIMUM RATINGS Symbol Definition VB High-side floating absolute voltage Min. -0.3 Max. 625 VS High-side floating supply offset voltage VB - 25 VB + 0.3 VHO High-side floating output voltage VS - 0.3 VB + 0.3 VCC Low-side and logic fixed supply voltage -0.3 25 VLO Low-side output voltage -0.3 VCC + 0.3 VIN Logic input voltage (IN & SD ) -0.3 VCC + 0.3 dVS/dt Allowable offset supply voltage transient --- 50 PDIP-8 --- 1.0 SOIC-8 --- 0.625 PDIP-8 --- 125 SOIC-8 --- 200 PD Package power dissipation @ TA ≤ +25°C RthJA Thermal resistance, junction to ambient TJ Junction temperature --- 150 TS Storage temperature -55 150 TL Lead temperature (soldering, 10 seconds) --- 300 Units V V/ns W °C/W °C Note: Absolute maximum ratings indicate sustained limits beyond which damage to the device may occur. All voltage parameters are absolute voltages referenced to COM. The thermal resistance and power dissipation ratings are measured under board mounted and still air conditions. RECOMMENDED OPERATIONG CONDITIONS Symbol Definition VB High-side floating absolute voltage Min. VS + 10 Max. VS + 20 VS High-side floating supply offset voltage Note 1 600 VHO High-side floating output voltage VS VB VCC Low-side and logic fixed supply voltage 10 20 VLO Low-side output voltage 0 VCC VIN Logic input voltage (IN & SD ) 0 VCC TA Ambient temperature - 40 125 Units V °C Note: The input/output logic timing diagram is shown in Fig. 1. For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supplies biased at a 15 V differential. Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev 1.0, August 2019 4 SLM2104S DYNAMIC ELECTRICAL CHARACTERISTICS VBIAS (VCC, VBS) = 15 V, CL = 1000 pF and TA = 25°C unless otherwise specified. Symbol Parameter Condition Min. Typ. Max. ton Turn-on propagation delay VS = 0 V --- 680 820 toff Turn-off propagation delay VS = 600 V --- 150 220 tsd Shutdown propagation delay --- 160 220 tr Turn-on rise time --- 70 170 tf Turn-off fall time --- 35 90 DT Deadtime, LS turn-off to HS turn-on & HS turn-on to LS turn-off 400 520 650 MT Delay matching, HS & LS turn-on/off --- --- 60 Unit ns STATIC ELECTRICAL CHARACTERISTICS VBIAS (VCC, VBS) = 15 V and TA = 25°C unless otherwise specified. The VIN, VTH, and IIN parameters are referenced to COM. The VO and IO parameters are referenced to COM and are applicable to the respective output leads: HO or LO. Symbol Parameter VIH Logic “1” input voltage VIL Logic “0” input voltage Condition Min. Typ. Max. 2.5 --- --- --- --- 0.8 Unit VCC = 10 V to 20V VSD, TH+ SD input positive going threshold 2.5 --- --- VSD, TH- SD input negative going threshold --- --- 0.8 VOH High level output voltage, VBIAS - VO --- 0.05 0.2 VOL Low level output voltage, VO --- 0.02 0.1 ILK Offset supply leakage current --- --- 50 IQBS Quiescent VBS supply current --- 60 75 --- 170 270 V IO = 2 mA VB = VS = 600 V VIN = 0 V or 5 V IQCC Quiescent VCC supply current IIN+ Logic “1” input bias current VIN = 5 V --- 3 10 IIN- Logic “0” input bias current VIN = 0 V --- --- 5 VCCUV+ VCC & VBS supply undervoltage positive going threshold 8 8.9 9.8 VCCUV- VCC & VBS supply undervoltage negative going threshold 7.4 8.2 9 290 VBSUV+ VBSUVIO+ IO- V Output high short circuit pulsed current VO = 0 V, VIN = VIH PW ≤ 10 µs 130 Output low short circuit pulsed current VO = 15 V, VIN = VIL PW ≤ 10 µs 270 Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev 1.0, August 2019 µA mA 600 5 SLM2104S Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev 1.0, August 2019 6 SLM2104S Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev 1.0, August 2019 7 SLM2104S Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev 1.0, August 2019 8 SLM2104S Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev 1.0, August 2019 9 SLM2104S Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev 1.0, August 2019 10 SLM2104S Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev 1.0, August 2019 11 SLM2104S Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev 1.0, August 2019 12 SLM2104S Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev 1.0, August 2019 13 SLM2104S PACKAGE CASE OUTLINES Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev 1.0, August 2019 14 SLM2104S Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev 1.0, August 2019 15 SLM2104S Revision History Note: page numbers for previous revisions may differ from page numbers in current version Page or Item Subjects (major changes since previous revision) Rev 1.0 datasheet, 2019-8-27 Whole document New company logo released Page 1 Removed “Figure 1.” and “May 2019” Page 5 Add UVLO threshold for VBS voltage Sillumin Semiconductor Co., Ltd. – www.sillumin.com Rev 1.0, August 2019 16