SOLOMON SYSTECH
SEMICONDUCTOR TECHNICAL DATA
SSD6270
SSD6260
SSD6250
SSD6240
Advance Information
30 Driving x 44 Sensing
Capacitive Touch Panel Controller
This document contains information on a new product. Specifications and information herein are subject to change without notice.
http://www.solomon-systech.com
SSD6270
Rev 1.0
P 1/42
Mar 2015
Copyright 2015 Solomon Systech Limited
Appendix: IC Revision history of SSD6270 Specification
Version
1.0
Change Items
Effective Date
24-Mar-15
Advance Information Release
Solomon Systech
Mar 2015
P 2/42
Rev 1.0
SSD6270
CONTENTS
1
GENERAL DESCRIPTION ..................................................................................................................................... 7
2
FEATURES................................................................................................................................................................. 7
3
ORDERING INFORMATION ................................................................................................................................. 7
4
BLOCK DIAGRAM .................................................................................................................................................. 8
5
PIN ARRANGEMENT .............................................................................................................................................. 9
5.1
5.2
5.3
5.4
6
PIN DESCRIPTIONS .............................................................................................................................................. 13
6.1
6.2
6.3
6.4
7
SSD6270QT6 100 PINS TQFP .................................................................................................................................................... 9
SSD6260 88 PINS QFN ............................................................................................................................................................. 10
SSD6250 68 PINS QFN ............................................................................................................................................................. 11
SSD6240 68 PINS QFN ............................................................................................................................................................. 12
POWER ...................................................................................................................................................................................... 13
LOGIC ....................................................................................................................................................................................... 13
ANALOG ................................................................................................................................................................................... 14
INPUT AND OUTPUT .................................................................................................................................................................. 14
FUNCTIONAL BLOCK DESCRIPTIONS........................................................................................................... 15
7.1
7.2
7.3
7.4
7.5
7.6
7.7
STYPE0, STYPE1, GPIO3 ...................................................................................................................................................... 15
MCU ........................................................................................................................................................................................ 15
ADC ......................................................................................................................................................................................... 15
ANALOG BOOSTER CIRCUIT ...................................................................................................................................................... 15
IIC INTERFACE (SLAVE) ............................................................................................................................................................ 15
44 PINS SENSING INPUT ............................................................................................................................................................. 15
30 PINS DRIVING OUTPUT AMPLIFIER ....................................................................................................................................... 15
8
COMMAND TABLE ............................................................................................................................................... 16
9
COMMAND DESCRIPTIONS ............................................................................................................................... 20
10 REGISTERS ............................................................................................................................................................. 30
11 MAXIMUM RATINGS ........................................................................................................................................... 31
12 DC CHARACTERISTICS ...................................................................................................................................... 31
13 AC CHARACTERISTICS ...................................................................................................................................... 32
14 POWER UP/DOWN SEQUENCE ......................................................................................................................... 33
14.1
14.2
POWER UP ................................................................................................................................................................................. 33
POWER DOWN ........................................................................................................................................................................... 34
15 APPLICATION EXAMPLES ................................................................................................................................. 35
15.1
15.2
SSD6270
APPLICATION DIAGRAM ........................................................................................................................................................... 35
FPC LAYOUT EXAMPLE FOR QFP100....................................................................................................................................... 36
Rev 1.0
P 3/42
Mar 2015
Solomon Systech
16 PACKAGE INFORMATION ................................................................................................................................. 37
16.1
16.2
16.3
16.4
TQFP 100 PINS (12X12MM) ...................................................................................................................................................... 37
QFN 88 PINS (10 X 10 MM) ....................................................................................................................................................... 38
QFN 68 PINS (8 X 8 MM) ........................................................................................................................................................... 39
PACKAGE ORIENTATION............................................................................................................................................................ 40
Solomon Systech
Mar 2015
P 4/42
Rev 1.0
SSD6270
TABLES
TABLE 3-1: ORDERING INFORMATION ........................................................................................................................................................ 7
TABLE 5-1 : SSD6270 100 PINS TQFP PIN ASSIGNMENT TABLE ................................................................................................................ 9
TABLE 5-2 : SSD6260 88 PINS QFN PIN ASSIGNMENT TABLE.................................................................................................................. 10
TABLE 5-3 : SSD6250 68 PINS QFN PIN ASSIGNMENT TABLE.................................................................................................................. 11
TABLE 5-4 : SSD6240 68 PINS QFN PIN ASSIGNMENT TABLE.................................................................................................................. 12
TABLE 11-1: MAXIMUM RATINGS (VOLTAGE REFERENCED TO VSS) ........................................................................................................ 31
TABLE 12-1: DC CHARACTERISTICS ......................................................................................................................................................... 31
TABLE 13-1 :I2C INTERFACE TIMING CHARACTERISTICS .......................................................................................................................... 32
SSD6270
Rev 1.0
P 5/42
Mar 2015
Solomon Systech
FIGURES
FIGURE 4-1: SSD6270 BLOCK DIAGRAM ........................................................................................................................................................ 8
FIGURE 5-1: SSD6270 PIN-OUT DIAGRAM – 100 PINS TQFP (TOP VIEW) ....................................................................................................... 9
FIGURE 5-2: SSD6260 PIN-OUT DIAGRAM – 88 PINS QFN (TOP VIEW)......................................................................................................... 10
FIGURE 5-3: SSD6250 PIN-OUT DIAGRAM – 68 PINS QFN (TOP VIEW)......................................................................................................... 11
FIGURE 5-4: SSD6240 PIN-OUT DIAGRAM – 68 PINS QFN (TOP VIEW)......................................................................................................... 12
FIGURE 13-1: I2C INTERFACE TIMING CHARACTERISTICS.............................................................................................................................. 32
FIGURE 15-1: APPLICATION EXAMPLE ........................................................................................................................................................... 35
FIGURE 16-1 : SSD6270QT6 PACKAGE ORIENTATION ................................................................................................................................... 40
FIGURE 16-2 : SSD6260QN10 PACKAGE ORIENTATION ................................................................................................................................ 40
FIGURE 16-3 : SSD6250QN4/SSD6240QN4 PACKAGE ORIENTATION .......................................................................................................... 41
Solomon Systech
Mar 2015
P 6/42
Rev 1.0
SSD6270
1
GENERAL DESCRIPTION
SSD6270 series is an all in one capacitive touch panel driver that integrated the power circuits, driving and sensing circuits
into a single MCU based chip. It can drive capacitive type touch panel with up to 30 driving and 44 sensing lines.
2
FEATURES
3
Operating voltage for IIC communication:
o VCI:
2.5 ~ 3.3V
o VDDIO:
1.65 ~ 3.3V
6V to 8V(max.) driving voltage with external booster Caps
5 steps in 0.5V increment programmable driving voltage control
16 bit MCU core
4k x 16 bit RAM
16k x 16-bit Internal ROM
Support ROM Patching for feature enhancement
Support Palm rejection with 3mm passive pen (6mm or below ITO pitch CTP)
Support 2816 x 1920 touch resolution and capable to support up to Full-HD panel
Support 100Hz sampling rate
Total 30 driving and 44 sensing pins
Fully programmable driver scanning order
8 choices for Touch Screen Orientation control
Provide (X,Y) coordinates and number of touch points with force index
Support up to 10 fingers
Automatic mode switching (Normal, Idle)
Auto calibration for each cross-over point
Support IIC (up to 400kbits/sec) interface for Android OS
Supports high-ohm ITO (100kohm) up to 13-inch panel size
Features “short I/O tester” for all sense pins
Supports various type of panels with no ground shielding layer
Supports various ITO patterns
Supports pressure sensing
Package: QFN68, QFN88, TQFP100
ORDERING INFORMATION
Table 3-1: Ordering Information
Ordering Part Number
Drive
Sense
SSD6270QT6
30
44
SSD6260QN10
28
SSD6250QN4
SSD6240QN4
SSD6270
Rev 1.0
MOQ / MPQ
Remark
TQFP-100 (Tray)
119/1190
IIC
38
QFN-88 (Tray)
168/1680
IIC
30
23
QFN-68 (Tray)
260/2600
IIC
28
18
QFN-68 (Tray)
260/2600
IIC
P 7/42
Mar 2015
Package Form
Solomon Systech
4
BLOCK DIAGRAM
Figure 4-1: SSD6270 Block Diagram
Solomon Systech
Mar 2015
P 8/42
Rev 1.0
SSD6270
5
5.1
PIN ARRANGEMENT
SSD6270QT6 100 pins TQFP
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
75
74
73
72
71
70
69
68
67
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
SSD6270QT6
Figure 5-1: SSD6270 Pin-out Diagram – 100 pins TQFP (Top view)
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
Signal Name
SENSE43
NC
NC
/RESET
/IRQ
NC
NC
SLAVE_SDA
SLAVE_SCL
NC
NC
NC
NC
GPIO03
STYPE00
STYPE01
VDDIO
VCI
BIAS
AVSS
VCORE
C2XP
C2XN
C3XN
C3XP
Pin #
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
Signal Name
VOUT
VCHS
DRIVE00
DRIVE01
DRIVE02
DRIVE03
DRIVE04
DRIVE05
DRIVE06
DRIVE07
DRIVE08
DRIVE09
DRIVE10
DRIVE11
DRIVE12
DRIVE13
DRIVE14
DRIVE15
DRIVE16
DRIVE17
DRIVE18
DRIVE19
DRIVE20
DRIVE21
DRIVE22
Pin #
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
Signal Name
DRIVE23
DRIVE24
DRIVE25
DRIVE26
DRIVE27
DRIVE28
DRIVE29
SENSE00
SENSE01
SENSE02
SENSE03
SENSE04
SENSE05
SENSE06
SENSE07
SENSE08
SENSE09
SENSE10
SENSE11
SENSE12
SENSE13
SENSE14
SENSE15
SENSE16
SENSE17
Pin #
76
77
78
79
80
81
82
83
84
85
86
87
88
89
90
91
92
93
94
95
96
97
98
99
100
Signal Name
SENSE18
SENSE19
SENSE20
SENSE21
SENSE22
SENSE23
SENSE24
SENSE25
SENSE26
SENSE27
SENSE28
SENSE29
SENSE30
SENSE31
SENSE32
SENSE33
SENSE34
SENSE35
SENSE36
SENSE37
SENSE38
SENSE39
SENSE40
SENSE41
SENSE42
Table 5-1 : SSD6270 100 pins TQFP Pin Assignment Table
SSD6270
Rev 1.0
P 9/42
Mar 2015
Solomon Systech
5.2
SSD6260 88 pins QFN
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
66
65
64
63
62
61
60
59
58
57
56
55
54
53
52
51
50
49
48
47
46
45
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
SSD6260QN10
Figure 5-2: SSD6260 Pin-out Diagram – 88 pins QFN (Top view)
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
Signal Name
SENSE41
NC
NC
/RESET
/IRQ
NC
NC
SLAVE_SDA
SLAVE_SCL
NC
NC
NC
STYPE
VDDIO
VCI
BIAS
AVSS
VCORE
C2XP
C2XN
C3XN
C3XP
Pin #
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
Signal Name
VOUT
DRIVE00
DRIVE01
DRIVE02
DRIVE03
DRIVE04
DRIVE05
DRIVE06
DRIVE07
DRIVE08
DRIVE09
DRIVE10
DRIVE11
DRIVE12
DRIVE13
DRIVE14
DRIVE15
DRIVE16
DRIVE17
DRIVE18
DRIVE19
DRIVE20
Pin #
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
Signal Name
DRIVE21
DRIVE22
DRIVE23
DRIVE24
DRIVE25
DRIVE26
DRIVE27
SENSE04
SENSE05
SENSE06
SENSE07
SENSE08
SENSE09
SENSE10
SENSE11
SENSE12
SENSE13
SENSE14
SENSE15
SENSE16
SENSE17
SENSE18
Pin #
67
68
69
70
71
72
73
74
75
76
77
78
79
80
81
82
83
84
85
86
87
88
Signal Name
SENSE19
SENSE20
SENSE21
SENSE22
SENSE23
SENSE24
SENSE25
SENSE26
SENSE27
SENSE28
SENSE29
SENSE30
SENSE31
SENSE32
SENSE33
SENSE34
SENSE35
SENSE36
SENSE37
SENSE38
SENSE39
SENSE40
Table 5-2 : SSD6260 88 pins QFN Pin Assignment Table
Solomon Systech
Mar 2015
P 10/42
Rev 1.0
SSD6270
5.3
SSD6250 68 pins QFN
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
SSD6250QN4
Figure 5-3: SSD6250 Pin-out Diagram – 68 pins QFN (Top view)
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Signal Name
SENSE35
/RESET
/IRQ
SLAVE_SDA
SLAVE_SCL
STYPE
VDDIO
VCI
BIAS
AVSS
VCORE
C2XP
C2XN
C3XN
C3XP
VOUT
DRIVE00
Pin #
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Signal Name
DRIVE01
DRIVE02
DRIVE03
DRIVE04
DRIVE05
DRIVE06
DRIVE07
DRIVE08
DRIVE09
DRIVE10
DRIVE11
DRIVE12
DRIVE13
DRIVE14
DRIVE15
DRIVE16
DRIVE17
Pin #
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
Signal Name
DRIVE18
DRIVE19
DRIVE20
DRIVE21
DRIVE22
DRIVE23
DRIVE24
DRIVE25
DRIVE26
DRIVE27
DRIVE28
DRIVE29
SENSE13
SENSE14
SENSE15
SENSE16
SENSE17
Pin #
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
Signal Name
SENSE18
SENSE19
SENSE20
SENSE21
SENSE22
SENSE23
SENSE24
SENSE25
SENSE26
SENSE27
SENSE28
SENSE29
SENSE30
SENSE31
SENSE32
SENSE33
SENSE34
Table 5-3 : SSD6250 68 pins QFN Pin Assignment Table
SSD6270
Rev 1.0
P 11/42
Mar 2015
Solomon Systech
5.4
SSD6240 68 pins QFN
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
51
50
49
48
47
46
45
44
43
42
41
40
39
38
37
36
35
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
SSD6240QN4
Figure 5-4: SSD6240 Pin-out Diagram – 68 pins QFN (Top view)
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
Signal Name
SENSE35
/RESET
/IRQ
SLAVE_SDA
SLAVE_SCL
STYPE
VDDIO
VCI
BIAS
AVSS
VCORE
C2XP
C2XN
C3XN
C3XP
VOUT
TEST PIN00
Pin #
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
Signal Name
TEST PIN01
DRIVE02
DRIVE03
DRIVE04
DRIVE05
DRIVE06
DRIVE07
DRIVE08
DRIVE09
DRIVE10
DRIVE11
DRIVE12
DRIVE13
DRIVE14
DRIVE15
DRIVE16
DRIVE17
Pin #
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
Signal Name
DRIVE18
DRIVE19
DRIVE20
DRIVE21
DRIVE22
DRIVE23
DRIVE24
DRIVE25
DRIVE26
DRIVE27
DRIVE28
DRIVE29
TEST PIN02
TEST PIN03
TEST PIN04
TEST PIN05
TEST PIN06
Pin #
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
Signal Name
SENSE18
SENSE19
SENSE20
SENSE21
SENSE22
SENSE23
SENSE24
SENSE25
SENSE26
SENSE27
SENSE28
SENSE29
SENSE30
SENSE31
SENSE32
SENSE33
SENSE34
Table 5-4 : SSD6240 68 pins QFN Pin Assignment Table
Solomon Systech
Mar 2015
P 12/42
Rev 1.0
SSD6270
6
Key:
6.1
6.2
PIN DESCRIPTIONS
I = Input
O =Output
IO = Bi-directional (input/output)
P = Power pin
Hi-Z = High impedance
Power
RESET#
State
N/A
N/A
N/A
N/A
N/A
Pin Name
Type
Description
VDDIO
VCI
VCHS
DVSS
AVSS
P
P
P
P
P
Pin Name
Type
/RESET
/IRQ
SLAVE_
SDA
SLAVE_
SCK
NC
I
O
RESET#
State
VCHS
VDDIO
IO
Hi-Z
IIC data pin
I
Hi-Z
IIC clock input pin
IO
Hi-Z
No Connect
Bus interface mode selection pin.
STYPE means STYPE00 and STYPE01 bonded
together.
This pin is power supply input for I/O buffer
This pin is power supply input for analog circuit
This pin is ground for Booster and HV switches
This pin is ground for logic
This pin is ground for analog
Logic
STYPE00,
STYPE01 I
SSD6270
Rev 1.0
P 13/42
Hi-Z
Mar 2015
Description
This is Reset pin for the chip
This is Interrupt pin for Interrupt request
STYPE1
STYPE0
IIC Addr
0
0
0x48
0
1
0x49
1
0
0x4A
1
1
0x4B
Solomon Systech
6.3
6.4
Analog
Pin Name
Type
C2XP
C2XN
C3XP
C3XN
IO
IO
IO
IO
RESET#
State
VCI/VCHS
VCI/VCHS
VCI/VCHS
VCI/VCHS
VOUT
P
VCI/VCHS
BIAS
P
VCI/VCHS
VCORE
P
N/A
Description
Booster pin. Connect a capacitor to C2N
Booster pin. Connect a capacitor to C2P
Booster pin. Connect a capacitor to C3N
Booster pin. Connect a capacitor to C3P
Output power supply for booster.
Connect a capacitor for stabilization
Regulated voltage supply for sensor circuit.
Connect a capacitor for stabilization
Regulated voltage supply for logic circuit.
Connect a capacitor for stabilization
Input and Output
Pin Name
SENSE00 –
SENSE43
DRIVE00 –
DRIVE29
GPIO03
Solomon Systech
Type
RESET#
State
Description
I
Hi-Z
Sensor input pins
O
VCHS
Driver output pins
I
Hi-Z
GPIO pins
Mar 2015
P 14/42
Rev 1.0
SSD6270
7
7.1
FUNCTIONAL BLOCK DESCRIPTIONS
STYPE0, STYPE1, GPIO3
In SSD6270, the addresses for IIC interface are listed as below. STYPE means STYPE00 and STYPE01 bonded together.
7.2
STYPE 1
STYPE 0
IIC Address
0
0
0x48
0
1
0x49
1
0
0x4A
1
1
0x4B
MCU
This block is a 16bit MCU core.
7.3
ADC
This block is an analog to digital converter for converting the sensing signal to digital data.
7.4
Analog Booster circuit
This block generates the high output driving voltage for the driving pins.
7.5
IIC interface (Slave)
This block is used to communicate with the MCU.
It supports the mandatory slave feature showed below.
START Condition
STOP Condition
Acknowledge
7.6
44 pins Sensing input
This block is the sensing circuit.
7.7
30 pins driving Output Amplifier
This block is the driving output circuit.
SSD6270
Rev 1.0
P 15/42
Mar 2015
Solomon Systech
8
COMMAND TABLE
Reg No.
Hex
Name
Function
Read/W
rite/Co
mmand
Byte
of
para
meter
Async software reset
W
2
R
W
W
2
2
2
RW
2
RW
2
0x00
0x01
NOP
SW_RESET
0x02
0x04
0x05
DEVICE_ID
SLEEP_OUT_REG
SLEEP_IN_REG
0x06
DRIVE_SENSE_NO_REG
0x07
DRIVE_LINE0_REG
Read Device ID
Clock is back
Shut down everything that is controlled by
clock
Set No# of Driving Electrode
Set No# of Sensing Electrode
Select Drive pin, slew rate and driving group
0x08
DRIVE_LINE1_REG
Select Drive pin, slew rate and driving group
RW
2
0x09
DRIVE_LINE2_REG
Select Drive pin, slew rate and driving group
RW
2
0x0A
DRIVE_LINE3_REG
Select Drive pin, slew rate and driving group
RW
2
0x0B
DRIVE_LINE4_REG
Select Drive pin, slew rate and driving group
RW
2
0x0C
DRIVE_LINE5_REG
Select Drive pin, slew rate and driving group
RW
2
0x0D
DRIVE_LINE6_REG
Select Drive pin, slew rate and driving group
RW
2
0x0E
DRIVE_LINE7_REG
Select Drive pin, slew rate and driving group
RW
2
0x0F
DRIVE_LINE8_REG
Select Drive pin, slew rate and driving group
RW
2
0x10
DRIVE_LINE9_REG
Select Drive pin, slew rate and driving group
RW
2
0x11
DRIVE_LINE10_REG
Select Drive pin, slew rate and driving group
RW
2
0x12
DRIVE_LINE11_REG
Select Drive pin, slew rate and driving group
RW
2
0x13
DRIVE_LINE12_REG
Select Drive pin, slew rate and driving group
RW
2
0x14
DRIVE_LINE13_REG
Select Drive pin, slew rate and driving group
RW
2
0x15
DRIVE_LINE14_REG
Select Drive pin, slew rate and driving group
RW
2
0x16
DRIVE_LINE15_REG
Select Drive pin, slew rate and driving group
RW
2
0x17
DRIVE_LINE16_REG
Select Drive pin, slew rate and driving group
RW
2
Solomon Systech
Parameter
Default
0: reset the MCU and all peripherals
1: reset the MCU and all peripherals, except the
Patch Controller
[15:0]: report "6270" in BCD
[15:0]: Dummy bytes
[15:0]: Dummy bytes
[12:8]: Number of Drive line - 1
[5:0]: Number of Sense line - 1
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
Mar 2015
P 16/42
N/A
0x6270
N/A
N/A
0x1D2B
0x00E0
0x00E1
0x00E2
0x00E3
0x00E4
0x00E5
0x00E6
0x00E7
0x00E8
0x00E9
0x00EA
0x00EB
0x00EC
0x00ED
0x00EE
0x00EF
0x00F0
Rev 1.0
SSD6270
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[13:12]: Int Group
[8]: Drive line group (left/right)
[7:5]: Slew rate
[4:0]: Drive pin select
[7:0]: Frame scan period in millisecond.
0x00 to enter IDLE mode.
[5:0]: Sense line Offset
0x18
DRIVE_LINE17_REG
Select Drive pin, slew rate and driving group
RW
2
0x19
DRIVE_LINE18_REG
Select Drive pin, slew rate and driving group
RW
2
0x1A
DRIVE_LINE19_REG
Select Drive pin, slew rate and driving group
RW
2
0x1B
DRIVE_LINE20_REG
Select Drive pin, slew rate and driving group
RW
2
0x1C
DRIVE_LINE21_REG
Select Drive pin, slew rate and driving group
RW
2
0x1D
DRIVE_LINE22_REG
Select Drive pin, slew rate and driving group
RW
2
0x1E
DRIVE_LINE23_REG
Select Drive pin, slew rate and driving group
RW
2
0x1F
DRIVE_LINE24_REG
Select Drive pin, slew rate and driving group
RW
2
0x20
DRIVE_LINE25_REG
Select Drive pin, slew rate and driving group
RW
2
0x21
DRIVE_LINE26_REG
Select Drive pin, slew rate and driving group
RW
2
0x22
DRIVE_LINE27_REG
Select Drive pin, slew rate and driving group
RW
2
0x23
DRIVE_LINE28_REG
Select Drive pin, slew rate and driving group
RW
2
0x24
DRIVE_LINE29_REG
Select Drive pin, slew rate and driving group
RW
2
0x25
OP_MODE_REG
Set Operating Mode
RW
2
0x28
SENSE_OFFSET_REG
RW
2
0x2D
INT_TIMING3_REG
RW
2
[15:8]: intg active time
[7:0]: intg delay time
0x0A14
0x2E
INT_TIMING2_REG
RW
2
[15:8]: intg active time
[7:0]: intg delay time
0x0A14
0x2F
INT_TIMING1_REG
RW
2
[15:8]: intg active time
[7:0]: intg delay time
0x0A14
0x30
INT_TIMING0_REG
RW
2
[15:8]: intg active time
[7:0]: intg delay time
0x0A14
0x33
MIN_AREA_REG
Change the start position of sense lines. Can
be any number from 0 to 43
Set the integration active time
Set the integration delay time
(must send before Drive line mapping)
Set the integration active time
Set the integration delay time
(must send before Drive line mapping)
Set the integration active time
Set the integration delay time
(must send before Drive line mapping)
Set the integration active time
Set the integration delay time
(must send before Drive line mapping)
Define Min. Finger Area
RW
2
[7:0]: Min. area for a valid finger detection
0x0001
0x34
0x35
MIN_LEVEL_REG
MIN_WEIGHT_REG
Define Min. Finger Level
Define Min. Finger Weight
RW
RW
2
2
0x0064
0x0030
0x36
0x37
MAX_AREA_REG
PRESS_SCALE_REG
Define Max. Finger Area
Set pressure scaling factor
RW
RW
2
2
[8:0]: Min. amplitude for a valid finger detection
[15:0]: Min. weight threshold for a valid finger
detection
[7:0]: Max. area for a valid finger detection
[6:4]: 0: finger max level scale weight[8:1]
1: finger max level scale weight[9:2]
...
6: finger max level scale weight[14:7]
7: finger max level scale weight[15:8]
[2:0]: 0: pressure scale weight[8:1]
1: pressure scale weight[9:2]
SSD6270
Rev 1.0
P 17/42
Mar 2015
0x00F1
0x00F2
0x00F3
0x00F4
0x00F5
0x00F6
0x00F7
0x00F8
0x00F9
0x00FA
0x00FB
0x00FC
0x00FD
0x0000
0x0000
0x0040
0x0003
Solomon Systech
0x65
ORIENTATION_REG
Remap finger coordinates
according to different orientation
RW
2
0x66
X_SCALING_REG
Set scaling factor for X coordinate.
RW
2
0x67
Y_SCALING_REG
Set scaling factor for Y coordinate.
RW
2
0x68
X_OFFSET_REG
Set Offset in X direction
RW
2
...
6: pressure scale weight[14:7]
7: pressure scale weight[15:8]
[15:3]: Reserved
[2:0]: 000: Normal
001: Y-Invert
010: X-Invert
011: X-Invert + Y-Invert
100: Transpose
101: Transpose + X-Invert (270 deg)
110: Transpose + Y-Invert (90 deg)
111: Transpose + X-Invert + Y-Invert
[15:0]: X scaling factor in
0#.##_####_####_#### binary format.
[15:0]: Y scaling factor in
0#.##_####_####_#### binary format.
[15:0]: X offset in basic resolution unit. (+/-)
0x69
Y_OFFSET_REG
Set Offset in Y direction
RW
2
[15:0]: Y offset in basic resolution unit (+/-)
0x0000
0x79
TOUCH_STATUS
Touch Status
R
2
[13]: Finger09 detected
[12]: Finger08 detected
[11]: Finger07 detected
[10]: Finger06 detected
[9]: Finger05 detected
[8]: Finger04 detected
0x0000
0x7B
IRQ_MSK_REG
IRQ Mask
RW
2
0x7C
FINGER00_REG
Finger00 Coordinate
R
4
0x7D
FINGER01_REG
Finger01 Coordinate
R
4
0x7E
FINGER02_REG
Finger02 Coordinate
R
4
0x7F
FINGER03_REG
Finger03 Coordinate
R
4
0x80
FINGER04_REG
Finger04 Coordinate
R
4
Solomon Systech
[7]: Finger03 detected
[6]: Finger02 detected
[5]: Finger01 detected
[4]: Finger00 detected
[3]: Abnormal status detected
[2]: Large Object detected
[1]: FIFO overflow
[0]: FIFO data valid
[15:14]: reserved
[13]: Finger09 status mask
[12]: Finger08 status mask
[11]: Finger07 status mask
[10]: Finger06 status mask
[9]: Finger05 status mask
[8]: Finger04 status mask
0x0000
0x4000
0x4000
0x0000
0xC003
[7]: Finger03 status mask
[6]: Finger02 status mask
[5]: Finger01 status
[4]: Finger00 status mask
[3]: Abnormal status mask
[2]: Large Object status mask
[1]: Reserved
[0]: Reserved
[31:24]: X-coordinate[7:0]
[23:16]:Y-coordinate[7:0]
[15:12]: X-coordinate [11:8]
[11:8 ]: Y-coordinate [11:8]
[7:0]: Pressure Index
0xFF
0xFF
0xFF
0x00
[31:24]: X-coordinate[7:0]
[23:16]:Y-coordinate[7:0]
[15:12]: X-coordinate [11:8]
[11:8 ]: Y-coordinate [11:8]
[7:0]: Pressure Index
[31:24]: X-coordinate[7:0]
[23:16]:Y-coordinate[7:0]
[15:12]: X-coordinate [11:8]
[11:8 ]: Y-coordinate [11:8]
[7:0]: Pressure Index
[31:24]: X-coordinate[7:0]
[23:16]:Y-coordinate[7:0]
[15:12]: X-coordinate [11:8]
[11:8 ]: Y-coordinate [11:8]
[7:0]: Pressure Index
[31:24]: X-coordinate[7:0]
[23:16]:Y-coordinate[7:0]
[15:12]: X-coordinate [11:8]
[11:8 ]: Y-coordinate [11:8]
[7:0]: Pressure Index
Mar 2015
0xFF
0xFF
0xFF
0x00
0xFF
0xFF
0xFF
0x00
0xFF
0xFF
0xFF
0x00
0xFF
0xFF
0xFF
0x00
P 18/42
Rev 1.0
SSD6270
0x81
FINGER05_REG
Finger05 Coordinate
R
4
[31:24]: X-coordinate[7:0]
[23:16]:Y-coordinate[7:0]
[15:12]: X-coordinate [11:8]
[11:8 ]: Y-coordinate [11:8]
[7:0]: Pressure Index
0xFF
0xFF
0xFF
0x00
0x82
FINGER06_REG
Finger06 Coordinate
R
4
[31:24]: X-coordinate[7:0]
[23:16]:Y-coordinate[7:0]
[15:12]: X-coordinate [11:8]
[11:8 ]: Y-coordinate [11:8]
[7:0]: Pressure Index
0xFF
0xFF
0xFF
0x00
0x83
FINGER07_REG
Finger07 Coordinate
R
4
0xFF
0xFF
0xFF
0x00
0x84
FINGER08_REG
Finger08 Coordinate
R
4
0x85
FINGER09_REG
Finger09 Coordinate
R
4
0x8B
MIN_OFFSET0_REG
Set min level offset0 when finger touching
RW
2
[31:24]: X-coordinate[7:0]
[23:16]:Y-coordinate[7:0]
[15:12]: X-coordinate [11:8]
[11:8 ]: Y-coordinate [11:8]
[7:0]: Pressure Index
[31:24]: X-coordinate[7:0]
[23:16]:Y-coordinate[7:0]
[15:12]: X-coordinate [11:8]
[11:8 ]: Y-coordinate [11:8]
[7:0]: Pressure Index
[31:24]: X-coordinate[7:0]
[23:16]:Y-coordinate[7:0]
[15:12]: X-coordinate [11:8]
[11:8 ]: Y-coordinate [11:8]
[7:0]: Pressure Index
[8:0]: min level offset0
0x0010
0x8C
MIN_OFFSET1_REG
Set min level offset1 when no finger touching
RW
2
[8:0]: min level offset1
0x0030
0xA2
INIT_RST
Reset Init Reference Procedure
RW
2
Write 0x0001 to activiate the init reference
procedure again
0xD5
DRIVE_LEVEL_REG
Select Driving voltage
RW
2
0xD7
ADC_RANGE_SEL_REG
Select ADC Vref range
RW
2
0xD8
BIAS_RES
Select Sense line biasing resistance
RW
2
0xDB
INTG_CAP_REG
Set integrator cap value
RW
2
[7:3]: Reserved
[2:0]: 0 = Reserved
1 = 6.0V
2 = 6.5V
3 = 7.0V
4 = 7.5V
5 = 8.0V
6 = Reserved
7 = Reserved
VrefH
VrefL
[2:0]: 000: VCI/2 + 0.35 VCI/2 - 0.35
001: VCI/2 + 0.40 VCI/2 - 0.40
010: VCI/2 + 0.45 VCI/2 - 0.45
011: VCI/2 + 0.50 VCI/2 - 0.50
100: VCI/2 + 0.60 VCI/2 - 0.60
101: VCI/2 + 0.70 VCI/2 - 0.70
110: VCI/2 + 0.80 VCI/2 - 0.80
111: VCI/2 + 0.90 VCI/2 - 0.90
[2:0]: 0 = 5.0k
1= 6.5k
2 = 8.3k
3 = 10.8k
4 = 14k
5 = 18k
6 = 23k
7 = 30k
[2]: CI2
[1]: CI1
[0]: CI0
SSD6270
Rev 1.0
P 19/42
Mar 2015
0xFF
0xFF
0xFF
0x00
0xFF
0xFF
0xFF
0x00
N/A
0x0003
0x0004
0x0004
0x0004
Solomon Systech
9
COMMAND DESCRIPTIONS
No Operation (R00h)
No Operation for this command.
Software Reset (R01h)
A dummy byte (e.g. 0x00) should be sent after this command for the software reset.
Read Device ID Register (R02h)
R/W Parameter
R
1
R
2
POR
POR
IB7
0
1
0
1
IB6
1
0
1
0
IB5
1
0
1
0
IB4
0
1
0
1
IB3
0
0
0
0
IB2
0
0
0
0
IB1
1
0
1
0
IB0
0
0
0
0
This register returned the Device ID “6270h”.
System Enable (R04h)
A dummy byte (e.g. 0x00) should be sent after this command to enable the system clock.
System Disable (R05h)
A dummy byte (e.g. 0x00) should be sent after this command to disable the system clock.
Drive and Sense Line Number Register (R06h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
--
IB6
--
IB5
--
IB4
0
0
0
0
0
1
1
0
IB3
IB2
IB1
Drive_No
Sense_No
1
1
1
0
0
1
IB0
1
1
The number of driving lines can be set up to maximum 30.
Drive_No
00000
00001
:
:
:
11100
11101
Number of Driving Lines
1
2
:
Step = 1
:
29
30 (default)
The number of sensing lines can be set up to maximum 44.
Solomon Systech
Sense_No
Number of Sensing Lines
000000
1
000001
2
:
:
:
Step = 1
:
:
101010
43
101011
44 (default)
Mar 2015
P 20/42
Rev 1.0
SSD6270
Select Drive Pin for 1st Drive Line (R07h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
0
0
IB3
IB2
IB1
Drive pin selection
0
0
0
0
0
0
IB0
Group
0
0
Select Drive Pin for 2nd Drive Line (R08h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
0
0
IB3
IB2
IB1
Drive pin selection
0
0
0
0
0
0
IB0
Group
0
1
Select Drive Pin for 3rd Drive Line (R09h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
0
0
IB3
IB2
IB1
Drive pin selection
0
0
0
0
0
1
IB0
Group
0
0
Select Drive Pin for 4th Drive Line (R0Ah)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
0
0
IB3
IB2
IB1
Drive pin selection
0
0
0
0
0
1
IB0
Group
0
1
Select Drive Pin for 5th Drive Line (R0Bh)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
0
0
IB3
IB2
IB1
Drive pin selection
0
0
0
0
1
0
IB0
Group
0
0
Select Drive Pin for 6th Drive Line (R0Ch)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
0
0
IB3
IB2
IB1
Drive pin selection
0
0
0
0
1
0
IB0
Group
0
1
Select Drive Pin for 7th Drive Line (R0Dh)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
0
0
IB3
IB2
IB1
Drive pin selection
0
0
0
0
1
1
IB0
Group
0
0
Select Drive Pin for 8th Drive Line (R0Eh)
R/W Parameter
RW
1
RW
2
POR
POR
SSD6270
IB7
IB6
IB5
0
1
-0
1
0
1
Rev 1.0
P 21/42
IB4
-0
0
0
0
0
0
IB3
IB2
IB1
Drive pin selection
0
0
0
0
1
1
Mar 2015
IB0
Group
0
1
Solomon Systech
Select Drive Pin for 9th Drive Line (R0Fh)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
0
0
IB3
IB2
IB1
Drive pin selection
0
0
0
1
0
0
IB0
Group
0
0
Select Drive Pin for 10th Drive Line (R10h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
0
0
IB3
IB2
IB1
Drive pin selection
0
0
0
1
0
0
IB0
Group
0
1
Select Drive Pin for 11th Drive Line (R11h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
0
0
IB3
IB2
IB1
Drive pin selection
0
0
0
1
0
1
IB0
Group
0
0
Select Drive Pin for 12th Drive Line (R12h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
0
0
IB3
IB2
IB1
Drive pin selection
0
0
0
1
0
1
IB0
Group
0
1
Select Drive Pin for 13th Drive Line (R13h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
0
0
IB3
IB2
IB1
Drive pin selection
0
0
0
1
1
0
IB0
Group
0
0
Select Drive Pin for 14th Drive Line (R14h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
0
0
IB3
IB2
IB1
Drive pin selection
0
0
0
1
1
0
IB0
Group
0
1
Select Drive Pin for 15th Drive Line (R15h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
0
0
IB3
IB2
IB1
Drive pin selection
0
0
0
1
1
1
IB0
Group
0
0
Select Drive Pin for 16th Drive Line (R16h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
Solomon Systech
IB4
-0
0
0
0
0
0
IB3
IB2
IB1
Drive pin selection
0
0
0
1
1
1
IB0
Group
0
1
Mar 2015
P 22/42
Rev 1.0
SSD6270
Select Drive Pin for 17th Drive Line (R17h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
1
0
IB3
IB2
IB1
Drive pin selection
0
0
0
0
0
0
IB0
Group
0
0
Select Drive Pin for 18th Drive Line (R18h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
1
0
IB3
IB2
IB1
Drive pin selection
0
0
0
0
0
0
IB0
Group
0
1
Select Drive Pin for 19th Drive Line (R19h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
1
0
IB3
IB2
IB1
Drive pin selection
0
0
0
0
0
1
IB0
Group
0
0
Select Drive Pin for 20th Drive Line (R1Ah)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
1
0
IB3
IB2
IB1
Drive pin selection
0
0
0
0
0
1
IB0
Group
0
1
Select Drive Pin for 21st Drive Line (R1Bh)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
1
0
IB3
IB2
IB1
Drive pin selection
0
0
0
0
1
0
IB0
Group
0
0
Select Drive Pin for 22nd Drive Line (R1Ch)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
1
0
IB3
IB2
IB1
Drive pin selection
0
0
0
0
1
0
IB0
Group
0
1
Select Drive Pin for 23rd Drive Line (R1Dh)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
1
0
IB3
IB2
IB1
Drive pin selection
0
0
0
0
1
1
IB0
Group
0
0
Select Drive Pin for 24th Drive Line (R1Eh)
R/W Parameter
RW
1
RW
2
POR
POR
SSD6270
IB7
IB6
IB5
0
1
-0
1
0
1
Rev 1.0
P 23/42
IB4
-0
0
0
0
1
0
IB3
IB2
IB1
Drive pin selection
0
0
0
0
1
1
Mar 2015
IB0
Group
0
1
Solomon Systech
Select Drive Pin for 25th Drive Line (R1Fh)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
1
0
IB3
IB2
IB1
Drive pin selection
0
0
0
1
0
0
IB0
Group
0
0
Select Drive Pin for 26th Drive Line (R20h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
1
0
IB3
IB2
IB1
Drive pin selection
0
0
0
1
0
0
IB0
Group
0
1
Select Drive Pin for 27th Drive Line (R21h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
1
0
IB3
IB2
IB1
Drive pin selection
0
0
0
1
0
1
IB0
Group
0
0
Select Drive Pin for 28th Drive Line (R22h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
1
0
IB3
IB2
IB1
Drive pin selection
0
0
0
1
0
1
IB0
Group
0
1
Select Drive Pin for 29th Drive Line (R23h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
1
0
IB3
IB2
IB1
Drive pin selection
0
0
0
1
1
0
IB0
Group
0
0
Select Drive Pin for 30th Drive Line (R24h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
1
-0
1
0
1
IB4
-0
0
0
0
1
0
IB3
IB2
IB1
Drive pin selection
0
0
0
1
1
0
IB0
Group
0
1
Operation Mode Register (R25h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
--
IB6
--
IB5
--
0
0
0
0
0
0
IB4
IB3
--Op_Mode
0 -- 0
-0
0
--
IB2
--
IB1
--
IB0
--
0
0
0
0
0
0
Idle Mode - In Idle Mode, no scanning activities will be performed. Set 0 to enter idle mode.
Operation Mode - In Operation Mode, the frame scan rate is 0~100Hz. Any value >0 will be interrupted as frame period in milliseconds.
When reading, this command is used to check when the controller change from Idle Mode to Operating Mode (or vice versa):
(1) When going from Idle Mode to Operating Mode, this command will report 0x00 until charge bump is ready.
(2) When going from Operating Mode to Idle Mode, this command will report provious set value until the completion of frame scan.
Solomon Systech
Mar 2015
P 24/42
Rev 1.0
SSD6270
Sense Line Offset Register (R28h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
--0
0
IB6
--0
0
IB5
--
IB4
--
0
0
0
0
IB3
IB2
--Sense_Offset
0
0
0
0
IB1
--
IB0
--
0
0
0
0
Number of sense lines must be reduced accordingly.
For example, if the number of sense lines is 30 with offset is 4, the sense lines [4:33] are used.
Integration Window Timing Setting 3 (R2Dh)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
0
0
0
0
0
IB4
IB3
IB2
Intg Active Time
Intg Delay Time
0
1
0
1
0
1
IB1
IB0
1
0
0
0
IB1
IB0
1
0
0
0
IB1
IB0
1
0
0
0
IB1
IB0
1
0
0
0
IB1
--
IB0
--
0
0
0
1
Integration unit is in 62.5ns per division.
Integration Window Timing Setting 2 (R2Eh)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
0
0
0
0
0
IB4
IB3
IB2
Intg Active Time
Intg Delay Time
0
1
0
1
0
1
Integration unit is in 62.5ns per division.
Integration Window Timing Setting 1 (R2Fh)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
0
0
0
0
0
IB4
IB3
IB2
Intg Active Time
Intg Delay Time
0
1
0
1
0
1
Integration unit is in 62.5ns per division.
Integration Window Timing Setting 0 (R30h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
0
0
0
0
0
IB4
IB3
IB2
Intg Active Time
Intg Delay Time
0
1
0
1
0
1
Integration unit is in 62.5ns per division.
Min Finger Area Setting Register (R33h)
R/W Parameter
RW
1
RW
2
POR
POR
IB4
IB3
IB2
---Min_Area
0
0
0
0 -- 0
0
-0
0
0
0 -- 0
0
If the touching area detected is bigger than--Min_Area,
-Raw_Range
Min Finger Level Setting Register (R34h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
--
SSD6270
IB7
IB6
--
IB5
--
the system will report “valid finger”.
IB4
IB3
IB2
IB1
IB0
-----Min_Area
0
0
0
0 -- 0
0
0
0
-0
1
1
0
0
1
0
0
-If the touching level detected is bigger than
-- Min_Level, the system will
-Min Finger Weight Setting RegisterRaw_Range
(R35h)
R/W Parameter
RW
1
RW
2
IB7
--
IB6
--
IB6
Rev 1.0
IB5
--
IB5
IB4
IB3
IB2
Min_Weight
-Min_Weight
--------P 25/42Raw_Range
Mar 2015
-Raw_Range
IB1
report “valid finger”.
IB0
Solomon Systech
POR
POR
0
0
0
0
0
0
0
0
0
0
0
0
0
0
0
1
Similar to Min Finger Area, user can define also the weight of a valid finger touch.
Weight means the summation of the signal level within the touch area. Weight is as a function of finger area (R33h) and finger level (R34h).
Max Finger Area Setting Register (R36h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
--
IB6
--
IB5
--
IB4
IB3
IB2
IB1
IB0
-----Max_Area
0
0
0
0 -- 0
0
0
0
-0
0
0
1
1
0
0
0
-For any touching detected, the system will--count the cover area of the touch point and determine
-area is over Max_Area, the system will report
Large Object rather than a finger touch.
Raw_Range
if it is a valid finger touch. If the touching
Hopping Level Register (R50h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
0
0
0
0
0
IB4
IB3
IB2
Hopping_lv
--Hopping_lv
Hopping_lv
0
0
Normfact_1
0
0
0
0
IB1
IB0
0
0
0
0
Pressure Scaling Register (R57h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
--
IB6
--
IB5
--
IB4
--
IB3
--
0
0
0
0
0
0
0
0
0
0
IB2
--
IB1
IB0
--Press_factor
0
0
0
0
1
1
Orientation Register (R65h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
--
IB6
--
IB5
--
IB4
--
IB3
--
0
0
0
0
0
0
0
0
0
0
Orientation
000
001
010
011
100
101
110
111
IB2
--
IB1
IB0
--Orientation
0
0
0
0
0
0
Description
Normal
Y-invert
X-invert
X-invert + Y-invert
Transpose
Transpose + X-invert
Transpose + Y-invert
Transpose + X-invert + Y-invert
X Scaling Register (R66h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
IB6
IB5
0
0
1
0
0
0
Solomon Systech
IB4
IB3
X_scaling
-X_scaling
-0
0
-0 -- 0
----
IB2
IB1
IB0
0
0
0
0
0
0
Mar 2015
P 26/42
Rev 1.0
SSD6270
Y Scaling Register (R67h)
R/W Parameter IB7
RW
1
-RW
2
POR
0
POR
0
IB6
IB5
1
0
0
0
X Offset Register (R68h)
R/W Parameter IB7
RW
1
-RW
2
POR
0
POR
0
IB6
IB5
0
0
0
0
Y Offset Register (R69h)
R/W Parameter IB7
RW
1
-RW
2
POR
0
POR
0
IB6
IB5
0
0
0
0
Touch Status (R79h)
R/W Parameter
R
1
R
2
POR
POR
IB7
IB6
-F3 -- F2
0
0
0
0
IB5
F9
F1
0
0
IB4
IB3
Y_scaling
Y_scaling
-0
0
-0 -- 0
---IB4
IB3
X_offset
X_offset
-0
0
-0 -- 0
---IB4
IB3
Y_offset
Y_offset
-0
0
-0 -- 0
---IB4
IB3
F8
F7
F0
AS
0
0
0
0
IB2
IB1
IB0
0
0
0
0
0
0
IB2
IB1
IB0
0
0
0
0
0
0
IB2
IB1
IB0
0
0
0
0
0
0
IB2
F6
LO
0
0
IB1
F5
IB0
F4
--
0
0
0
0
This register showed the status of the touch detection. When a touch event is detected, the IRQ signal will set to low and at least one bit on this
register will set to “1” to indicate the touch status. This register is “0” if the IRQ signal is high.
Register
F9
F8
F7
F6
F5
F4
F3
F2
F1
F0
AS
Name
Finger9 Detected
Finger8 Detected
Finger7 Detected
Finger6 Detected
Finger5 Detected
Finger4 Detected
Finger3 Detected
Finger2 Detected
Finger1 Detected
Finger0 Detected
Abnormal status
LO
Large Object
Function
This bit will set to “1” indicating the present of 10th finger
This bit will set to “1” indicating the present of 9rd finger
This bit will set to “1” indicating the present of 8nd finger
This bit will set to “1” indicating the present of 7th finger
This bit will set to “1” indicating the present of 6rd finger
This bit will set to “1” indicating the present of 5nd finger
This bit will set to “1” indicating the present of 4th finger
This bit will set to “1” indicating the present of 3rd finger
This bit will set to “1” indicating the present of 2nd finger
This bit will set to “1” when 1st finger touch detected
This bit will set to “1” when abnormal status detected.
If a touch detected with touch area over Max Finger Area (R16h), this bit will
set to “1”
IRQ Mask (R7Bh)
R/W Parameter
RW
1
RW
2
POR
POR
SSD6270
IB7
IB6
---
F3
1
0
F2
1
0
Rev 1.0
IB5
F9
F1
0
0
P 27/42
IB4
F8
F0
0
0
IB3
F7
AS
0
0
Mar 2015
IB2
F6
LO
0
0
IB1
F5
OF
0
1
IB0
F4
VF
0
1
Solomon Systech
Finger01-10 (X,Y) coordinates, press weight index. (R7Ch – R85h)
R/W Parameter
R
1
R
2
R
3
R
4
1
2
POR
3
4
IB7
IB6
IB5
IB4
IB3
x-coor[7:0]
y-coor[7:0]
IB2
x-coor[11:8]
1
1
1
0
1
1
1
0
1
1
1
0
IB1
IB0
y-coor[11:8]
weight index[7:0]
1
1
1
1
1
1
0
0
1
1
1
0
1
1
1
0
1
1
1
0
SSD6270 can detect maximum of 10 fingers touch on the panel. Ten registers are used to report the x-y coordinate of the 10 fingers if present
and only the most concurrent coordinates are reported.
The first touch point will put to R7Ch and the second touch point will put to R7Dh and so on. Once the finger number had been assigned, the
system will keep tracking the same finger and update the latest x-y coordinate to same register until the finger leaving the touch screen.
Reset Init Reference Procedure (RA2h)
A 0x0001 should be sent after this command to activate the init reference procedure again
Select Driving voltage level (RD5h)
R/W Parameter IB7
RW
1
-RW
2
POR
0
POR
0
IB6
--
IB5 IB4
--Reserved
0
0
0
0
0
0
IB3
--
IB2
--
0
0
0
0
IB1
-DVL
0
1
IB0
-0
1
This register controls the output voltage of the driving line (5.5V to 9V).
DVL
000
001
010
011
100
101
110
111
Solomon Systech
Drive Line voltage
Reserved
6.0V
6.5V
7.0V
7.5V
8.0V
Reserved
Reserved
Mar 2015
P 28/42
Rev 1.0
SSD6270
Select ADC Vref range (RD7h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
--
IB6
--
0
0
0
0
IB5
---0
-0
1
0
IB4
--
IB3
--
IB2
--
0
0
0
0
0
1
Vref
000
001
010
011
100
101
110
111
IB1
-Vref
10
0
0
IB0
-0
0
VrefH
VCI/2+0.35
VCI/2+0.40
VCI/2+0.45
VCI/2+0.50
VCI/2+0.60
VCI/2+0.70
VCI/2+0.80
VCI/2+0.90
VrefL
VCI/2-0.35
VCI/2-0.40
VCI/2-0.45
VCI/2-0.50
VCI/2-0.60
VCI/2-0.70
VCI/2-0.80
VCI/2-0.90
Select Sense line biasing resistance (RD8h)
R/W Parameter
RW
1
RW
2
POR
POR
IB7
--
IB6
--
0
0
0
0
IB5
--00
0
0
0
0
IB4
--
IB3
--
0
0
0
0
IB2
--
IB1
IB0
--BIAS_RES
00
0
0
0
1
0
0
Setting the sense line biasing resistance
BIAS_RES
000
001
010
011
100
101
110
111
Resistance
5.0k
6.5k
8.3k
10.8k
14k
18k
23k
30k
Set integrator cap value (RDBh)
R/W Parameter
RW
1
RW
2
POR
POR
SSD6270
IB7
--
IB6
--
0
0
0
0
Rev 1.0
IB5
--00
0
0
1
0
P 29/42
IB4
--
IB3
--
0
0
0
0
Mar 2015
IB2
-CI2
0
1
IB1
-CI1
0
0
IB0
-CI0
0
0
Solomon Systech
REGISTERS
VDDIO = VCI = 2.775V
1.) Hardware Reset
2.) Set the number of driver lines.
3.) Set the number of sense lines.
4.) Set the driver line scanning order.
5.) Turn on the booster circuit and set the VOUT to ~7.0V.
Hardware Reset
Set the number of driver line
Set the number of sense line
Set the driver line scanning order
Turn on the booster circuit and
set the VOUT to ~7.0V
Solomon Systech
Mar 2015
P 30/42
Rev 1.0
SSD6270
10 MAXIMUM RATINGS
Symbol
VCORE
VDDIO
VCI
I
TA
TSTG
Parameter
Supply Voltage for Logic
Supply Voltage for I/O
Input Voltage
Current Drain Per Pin Excluding VCORE and VSS
Operating Temperature
Storage Temperature
Value
-0.3 to +2.0
-0.3 to +4.0
VSS -0.3 to +5.0
25
-40 to +85
-65 to +150
Unit
V
V
V
mA
o
C
o
C
Table 10-1: Maximum Ratings (Voltage Referenced to V SS)
Maximum ratings are those values beyond which damages to the device may occur. Functional operation should be restricted to the limits in the Electrical
Characteristics tables or Pin Description section
This device contains circuitry to protect the inputs against damage due to high static voltages or electric fields; however, it is advised that normal precautions
be taken to avoid application of any voltage higher than maximum rated voltages to this high impedance circuit. For proper operation it is recommended that
VCI and VOUT be constrained to the range VSS < VDDIO VCI < VOUT. Reliability of operation is enhanced if unused input is connected to an appropriate logic
voltage level (e.g., either VSS or VDDIO). Unused outputs must be left open. This device may be light sensitive. Caution should be taken to avoid exposure of
this device to any light source during normal operation. This device is not radiation protected.
11 DC CHARACTERISTICS
DC Characteristics (Unless otherwise specified, Voltage Referenced to V SS, TA = -40 to 85oC)
Symbol Parameter
VDDIO
Power supply pin of I/O pins
Isleep1
Isleep2
Booster Reference Supply Voltage
Range (3)
Sleep mode current (VCI pin)
Sleep mode current (VDDIO pin)
Idp
Operating mode current
VOUT
VOH1
VOL1
VIH1
VIL1
IOH
IOL
VOUT booster efficiency
Logic High Output Voltage
Logic Low Output Voltage
Logic High Input voltage
Logic Low Input voltage
Logic High Output Current Source
Logic Low Output Current Drain
Logic Output Tri-state Current Drain
Source
Logic Input Current
VCI
IOZ
IIL/IIH
Conditions
Recommend Operating Voltage
Possible Operating Voltage
Recommend Operating Voltage
Possible Operating Voltage
VDDIO=1.8V, VCI=3.3V
VDDIO=1.8V, VCI=3.3V
IDP = IVDDIO + IVCI
See Note1
Iout=-100uA
Iout=100uA
VOH = VDDIO-0.4V
VOL = 0.4V
Min
Typ
Max
Unit
1.65
-
3.3
V
2.5 or VDDIO
-
3.3
V
-
10
1
50
10
uA
uA
-
13
18
mA
70
0.8 * VDDIO
0
0.8 * VDDIO
0
50
-
85
-
VDDIO
0.2 * VDDIO
VDDIO
0.2 * VDDIO
-50
%
V
V
V
V
μA
μA
-1
-
1
μA
-1
-
1
μA
Table 11-1: DC Characteristics
SSD6270
Rev 1.0
P 31/42
Mar 2015
Solomon Systech
12 AC CHARACTERISTICS
Conditions:
VCI - VSS = 2.5 to 3.3V
VDDIO = 1.65-3.33V
TA = 25C
Symbol
Parameter
Min
Typ
Max
Unit
tcycle
Clock Cycle Time
2.5
-
-
us
tHSTART
Start condition Hold Time
0.6
-
-
us
tHD
Data Hold Time (for “SDA” pin)
0
-
-
ns
tSD
Data Setup Time
100
-
-
ns
tSSTART
Start condition Setup Time (Only relevant for a repeated
Start condition)
0.6
-
-
us
tSSTOP
Stop condition Setup Time
0.6
-
-
us
tR
Rise Time for data and clock pin
-
-
300
ns
tF
Fall Time for data and clock pin
-
-
300
ns
tIDLE
Idle Time before a new transmission can start
1.3
-
-
us
Table 12-1 :I2C Interface Timing Characteristics
tHD
tHSTART
SCL
//
0.8VDDIO
0.2VDDIO
SDA
tR
//
tIDLE
tF
tSD
tSSTART
tSSTOP
0.8VDDIO
0.2VDDIO
tCYCLE
Figure 12-1: I2C Interface Timing Characteristics
Solomon Systech
Mar 2015
P 32/42
Rev 1.0
SSD6270
13
Power up/down Sequence
13.1 Power up
Symbol
tPR
tPD
tSTABLE
tRES
tREADY
Parameter
Power rise time
Power delay time
Chip stable time
Reset pulse
Chip need time after hardware reset
Min
10
4
10
Typ
-
Max
30
30
-
Unit
us
us
us
us
us
tPR
VCI
CS
tPD
VDDIO
tSTABLE
tRES
RES
tREADY
SDA,
SCL
SSD6270
Rev 1.0
P 33/42
Mar 2015
Solomon Systech
13.2 Power down
Symbol
tDISCHARGE
tPDOWN
Parameter
VOUT discharge wait time
Power Hold time
Min
50
50
Typ
-
Max
-
Unit
ms
ms
TDISCHARGE
VOUT.
VCI/VDDIO
RES
tPHOLD
SDA,
SCL
25,00
24,00
Power off
Enter power save mode
With regards to the Power Off, Vout should be discharged at least below than 5V before turn off the VCI/VDDIO power supplies
Solomon Systech
Mar 2015
P 34/42
Rev 1.0
SSD6270
14 APPLICATION EXAMPLES
14.1 Application Diagram
Full-HD
Touch
Panel
30 pins Driving
44 pins Sensing
VDDIO
Pull-high resistor is need for
IIC bus. Recommended
4.7kohm
VCI
C2XP
C2XN
C3XP
C3XN
SLAVE_SCK
SLAVE_SDA
BIAS VCORE VOUT
Except
VCI
VOUT
For filtering RF signal interfere on
the IIC bus. They can be added on
baseband PCB or FPC. (For
example, 22pF for GSM noise)
SSD6270
Rev 1.0
P 35/42
Suggested value of all capacitor:
0.1uF/16V
1~2.2uF/6.3V
1~2.2uF/16V
Figure 14-1: Application Example
Mar 2015
Solomon Systech
14.2 FPC Layout Example for QFP100
Solomon Systech
Mar 2015
P 36/42
Rev 1.0
SSD6270
15 PACKAGE INFORMATION
15.1 TQFP 100 pins (12x12mm)
SSD6270
Rev 1.0
P 37/42
Mar 2015
Solomon Systech
15.2 QFN 88 pins (10 x 10 mm)
Solomon Systech
Mar 2015
P 38/42
Rev 1.0
SSD6270
15.3 QFN 68 pins (8 x 8 mm)
SSD6270
Rev 1.0
P 39/42
Mar 2015
Solomon Systech
15.4 Package orientation
Figure 15-1 : SSD6270QT6 package orientation
Figure 15-2 : SSD6260QN10 package orientation
Solomon Systech
Mar 2015
P 40/42
Rev 1.0
SSD6270
Figure 15-3 : SSD6250QN4/SSD6240QN4 package orientation
SSD6270
Rev 1.0
P 41/42
Mar 2015
Solomon Systech
Solomon Systech reserves the right to make changes without notice to any products herein. Solomon Systech makes no warranty, representation or guarantee regarding
the suitability of its products for any particular purpose, nor does Solomon Systech assume any liability arising out of the application or use of any product or circuit,
and specifically disclaims any, and all, liability, including without limitation consequential or incidental damages. “Typical” parameters can and do vary in different
applications. All operating parameters, including “Typical” must be validated for each customer application by the customer’s technical experts. Solomon Systech does
not convey any license under its patent rights nor the rights of others. Solomon Systech products are not designed, intended, or authorized for use as components in
systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the
Solomon Systech product could create a situation where personal injury or death may occur. Should Buyer purchase or use Solomon Systech products for any such
unintended or unauthorized application, Buyer shall indemnify and hold Solomon Systech and its offices, employees, subsidiaries, affiliates, and distributors harmless
against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with
such unintended or unauthorized use, even if such claim alleges that Solomon Systech was negligent regarding the design or manufacture of the part.
The product(s) listed in this datasheet comply with Directive 2011/65/EU of the European Parliament and of the council of 8 June 2011 on the restriction of
the use of certain hazardous substances in electrical and electronic equipment and People’s Republic of China Electronic Industry Standard SJ/T 11363-2006
“Requirements for concentration limits for certain hazardous substances in electronic information products (电子信息产品中有毒有害物质的限量要求)”. Hazardous
Substances test report is available upon request.
http://www.solomon-systech.com
Solomon Systech
Mar 2015
P 42/42
Rev 1.0
SSD6270