FP6373S6CTR

fitipower integrated technology lnc. FP6373 85T High Efficiency 1MHz 2.5A Synchronous Step Down Regulator Description Features The FP6373 is a high-efficiency 1MHz synchronous step-down DC-DC regulator and capable of delivering output current up to 2.5A. The FP6373 operates over wide input voltage range from 2.7V to 5.5V, and integrates main switch and synchronous switch with very low RDS(ON) to minimize the conduction loss.   Low output voltage ripple, small external inductor and capacitor sizes are achieved with 1MHz switching frequency.         High Efficiency up to 96% Low RDS(ON) for Internal Switch (Top/Bottom): 95/75mΩ 2.7V-5.5V Input Voltage Range Adjustable Output Voltage Down to 0.6V 1MHz Switching Frequency Minimizes the External Components Internal Compensation Function Internal Soft-Start Limits the Inrush Current 100% Dropout Operation RoHS Compliant and Halogen Free Compact Package: SOT-23-6 Applications     Set Top Box LCD TV Tablet Portable Equipment Pin Assignments Ordering Information S6 Package (SOT-23-6) FP6373□□□ TR: Tape/Reel FB PG VIN C: Green 6 1 5 4 (Marking) 2 EN GND LX Figure 1. Pin Assignment of FP6373 FP6373-1.0-JUN-2013 Package Type S6: SOT-23-6 3 SOT-23-6 Marking Part Number Product Code FP6373S6C B0G 1 FP6373 85T fitipower integrated technology lnc. Typical Application Circuit OFF ON EN VIN VIN C1 FP6373 R3 PG L1 VOUT LX PG R1 C3 C2 (opt.) FB GND R2 Figure 2. Schematic Diagram VOUT 3.3V 2.5V 1.8V 1.5V 1.2V 1.05V C1 10μF MLCC 10μF MLCC 10μF MLCC 10μF MLCC 10μF MLCC 10μF MLCC R1 453kΩ 316kΩ 200kΩ 150kΩ 100kΩ 75kΩ R2 100kΩ 100kΩ 100kΩ 100kΩ 100kΩ 100kΩ L1 2.2μH 2.2μH 1.8μH 1.5μH 1.5μH 1.2μH C2 22μF MLCC x2 22μF MLCC x2 22μF MLCC x2 22μF MLCC x2 22μF MLCC x2 22μF MLCC x2 Table 1. Recommended Component Values FP6373-1.0-JUN-2013 2 FP6373 85T fitipower integrated technology lnc. Functional Pin Description Pin Name Pin No. Pin Function EN 1 Enable Control. GND 2 Ground Pin. LX 3 Power Switching Output. NMOS. VIN 4 Power Input Pin. PG 5 Open Drain Power Good Output Pin. FB 6 Output Feedback Pin. Connect this pin to the center point of the output resistor divider (as shown in 1 Figure 1) to program the output voltage: 0. 1 . Pull high to turn the IC on. Connect an inductor to the drains of internal high side PMOS and low side Decouple this pin to GND pin with at least 4.7μF ceramic capacitor. 2 Block Diagram EN PG VIN 1MΩ Power Good Undervoltage Lockout Bias Supply Enable Control Slope Compensation 90% VREF FB COMP EA Control Logic Current Limit Logic Control and Driver Logic 1 X LX Compensation Oscillator VREF COMP GND Soft Start Figure 3. Block Diagram of FP6373 FP6373-1.0-JUN-2013 3 fitipower integrated technology lnc. Absolute Maximum Ratings (Note 1) FP6373 85T ● VIN to GND --------------------------------------------------------------------------------------------------- -0.3V to +6.5V ● LX to GND ---------------------------------------------------------------------------------------------------- -0.3V to (VIN+0.3) ● EN, FB, PG to GND ---------------------------------------------------------------------------------------- -0.3V to VIN ● Junction Temperature Range ---------------------------------------------------------------------------- 150°C ● Lead Temperature (Soldering, 10 sec.) ---------------------------------------------------------------- 260°C ● Storage Temperature Range ----------------------------------------------------------------------------- -65°C to +150℃ ● Package hermal esistance (θJA) SOT-23-6 ------------------------------------------------------------------------------------------ +250ºC/W ● Package hermal esistance (θJC) SOT-23-6 ------------------------------------------------------------------------------------------ +110°C/W Note 1：Stresses beyond those listed under “Absolute Maximum atings" may cause permanent damage to the device. Recommended Operating Conditions (Note2) ● Supply Input Voltage --------------------------------------------------------------------------------------- 2.7V to 5.5V ● Junction Temperature Range ---------------------------------------------------------------------------- -40°C to +125°C ● Ambient Temperature Range ----------------------------------------------------------------------------- -40°C to +85°C Note 2：The device is not guaranteed to function outside its operating conditions. FP6373-1.0-JUN-2013 4 FP6373 85T fitipower integrated technology lnc. Electrical Characteristics (VIN=5V, TA=25°C, unless otherwise specified.) Parameter Symbol Input Voltage Range VIN Shutdown Current ISD Feedback Reference Voltage FB Input Current Conditions Typ Max Unit 5.5 V 0.1 1 μA 0.6 0.609 V 50 nA 2.7 EN=GND VREF IFB Min 0.591 VFB=VIN -50 PFET RON RDS(ON),P 0.095 Ω NFET RON RDS(ON),N 0.075 Ω PFET Current Limit ILIM 4 A EN Rising Threshold VENH 1.5 V EN Falling Threshold VENL 0.4 V Input UVLO Threshold VUVLO 2.7 V UVLO Hysteresis VHYS Oscillation Frequency FOSC 0.2 IOUT=350mA 0.8 Minimum ON Time 50 Maximum Duty Cycle PG Rising Threshold PG Sink Current 1 100 V 1.2 MHz ns % VPG (H) VFB Rising 90 % IPG VPG=0.1V 1 mA 100 Ω VOUT Discharge Resistance Thermal Shutdown Temperature TSD 150 °C Internal Soft Start Time TSS 1 ms FP6373-1.0-JUN-2013 5 FP6373 85T fitipower integrated technology lnc. Typical Performance Curves VIN=5V, VOUT=1.8V, C3=22pF, C1 10μF, C2 22μFx2, L1 1.8μH, A 95 95 90 90 Efficiency (%) 100 Efficiency (%) 100 85 80 75 VOUT=1.2V 70 85 80 75 VOUT=1.8V 70 VIN=3.3V VIN=5V 65 25°C, unless otherwise noted. VIN=3.3V 65 60 VIN=5V 60 0 0.5 1 1.5 Load Current (A) 2 2.5 0 0.5 Figure 4. Efficiency vs. Load Current 95 0.607 Feedback Voltage (V) 0.609 Efficiency (%) 90 85 80 75 VOUT=3.3V VIN=4.2V VIN=5V 65 2 2.5 Figure 5. Efficiency vs. Load Current 100 70 1 1.5 Load Current (A) 0.605 0.603 0.601 0.599 0.597 0.595 0.593 0.591 60 0 0.5 1 1.5 Load Current (A) Figure 6. Efficiency vs. Load Current IOUT=0A VOUT IL VLX 2 -40 -30 -20 -10 0 2.5 10 20 30 40 50 60 70 80 90 Temperature (°C) Figure 7. Feedback Voltage vs. Temperature IOUT=2.5A 10mV/div. (AC) VOUT 5mV/div. (AC) IL 1A/div. VLX 2V/div. 250mA/div. 2V/div. 40ms/div 2μs/div Figure 8. Steady State Waveform Figure 9. Steady State Waveform FP6373-1.0-JUN-2013 6 FP6373 85T fitipower integrated technology lnc. Typical Performance Curves (Continued) VIN=5V, VOUT=1.8V, C3=22pF, C1 10μF, C2 22μFx2, L1 1.8μH, A IOUT=0A 25°C, unless otherwise noted. IOUT=2.5A VIN 2V/div. VIN 2V/div. VOUT 500mV/div. VOUT 500mV/div. IOUT 1A/div. IOUT 1A/div. VLX 2V/div. VLX 2V/div. 4ms/div. 4ms/div. Figure 10. Power On through VIN Waveform Figure 11. Power On through VIN Waveform IOUT=2.5A IOUT=0A VIN 2V/div. VIN 2V/div. VOUT 500mV/div. VOUT 500mV/div. IOUT 1A/div. VLX 2V/div. IOUT 1A/div. VLX 2V/div. 1s/div. 40ms/div. Figure 12. Power Off through VIN Waveform Figure 13. Power Off through VIN Waveform IOUT=0A IOUT=2.5A VEN 5V/div. VEN 5V/div. VOUT 500mV/div. VOUT 500mV/div. IOUT 1A/div. VLX 2V/div. IOUT VLX 1A/div. 2V/div. 1ms/div. 1ms/div. Figure 14. Power On through EN Waveform Figure 15. Power On through EN Waveform FP6373-1.0-JUN-2013 7 FP6373 85T fitipower integrated technology lnc. Typical Performance Curves (Continued) VIN=5V, VOUT=1.8V, C3=22pF, C1 10μF, C2 22μFx2, L1 1.8μH, A IOUT=0A 25°C, unless otherwise noted. IOUT=2.5A VEN 5V/div. VEN 5V/div. VOUT 500mV/div. VOUT 500mV/div. IOUT 1A/div. IOUT 1A/div. VLX 2V/div. VLX 2V/div. 20ms/div. 200μs/div. Figure 16. Power Off through EN Waveform Figure 17. Power Off through EN Waveform IOUT=0.5A to 2.5A VOUT 50mV/div. IL 1A/div. 200μs/div. Figure 18. Load Transient Waveform FP6373-1.0-JUN-2013 8 fitipower integrated technology lnc. Function Description The FP6373 is a high efficiency, internal compensation and constant frequency current mode step-down synchronous DC/DC converter. It has integrated high-side (95mΩ, typ) and low-side (75mΩ, typ) power switches, and provides 2.5A continuous load current. It regulates input voltage from 2.7V to 5.5V, and down to an output voltage as low as 0.6V. Control Loop Slope compensated current mode PWM control provides stable switching and cycle-by-cycle current limit for superior load, line response, protection of the internal main switch and synchronous rectifier. The FP6373 switches at a constant frequency (1MHz) and regulates the output voltage. During each cycle, the PWM comparator modulates the power transferred to the load by changing the inductor peak current based on the feedback error voltage. During normal operation, the main switch is turned on for a certain time to ramp the inductor current at each rising edge of the internal oscillator, and switched off when the peak inductor current is above the error voltage. When the main switch is off, the synchronous rectifier will be turned on immediately and stay on until next cycle starts. Enable The FP6373 EN pin provides digital control to turn on/off the regulator. When the voltage of EN exceeds the threshold voltage, the regulator will start the soft start function. If the EN pin voltage is below the shutdown threshold voltage, the regulator will turn into the shutdown mode and the shutdown current will be smaller than 1μA. For auto start-up operation, connect EN to VIN. Soft Start The FP6373 employs internal soft start function to reduce input inrush current during start up. The internal soft start time will be 1ms. FP6373 85T Short Circuit Protection The FP6373 provides short circuit protection function to prevent the device damaged from short condition. When the short condition occurs and the feedback voltage drops lower than 50% of the regulation level, this will activate the latch protection circuit. Then output will be forced shutdown to prevent the inductor current runaway and to reduce the power dissipation within the IC under true short circuit conditions. Once the short condition is removed, reset EN or VIN to restart IC. Over Current Protection The FP6373 over current protection function is implemented by using cycle-by-cycle current limit architecture. The inductor current is monitored by measuring the high-side MOSFET series sense resistor voltage. When the load current increases, the inductor current will also increase. When the peak inductor current reaches the current limit threshold, the output voltage will start to drop. When the over current condition is removed, the output voltage will return to the regulated value. Over Temperature Protection The FP6373 incorporates an over temperature protection circuit to protect itself from overheating. When the junction temperature exceeds the thermal shutdown threshold temperature, the regulator will be shutdown. And the hysteretic of the over temperature protection is 30°C (typ). PG Signal Output (PG) PG pin is an open-drain output and requires a pull up resistor. PG is actively held low in soft-start, standby and shutdown. It will be released when the output voltage rises above 90% of nominal regulation point. Under Voltage Lockout When the FP6373 is power on, the internal circuits will be held inactive until VIN voltage exceeds the UVLO threshold voltage. And the regulator will be disabled when VIN is below the UVLO threshold voltage. The hysteretic of the UVLO comparator is 200mV (typ). FP6373-1.0-JUN-2013 9 FP6373 85T fitipower integrated technology lnc. Application Information Output Voltage Setting The output voltage VOUT is set by using a resistive divider from the output to FB. The FB pin regulated voltage is 0.6V. Thus the output voltage is: 0. 1 A low ESR capacitor is required to keep the noise minimum. Ceramic capacitors are better, but tantalum or low ESR electrolytic capacitors may also suffice. Output Capacitor Selection 1 2 Table 2 lists recommended values of R1 and R2 for most used output voltage. Table 2 Recommended Resistance Values VOUT R1 R2 3.3V 453kΩ 100kΩ 2.5V 316kΩ 100kΩ 1.8V 200kΩ 100kΩ 1.5V 150kΩ 100kΩ 1.2V 100kΩ 100kΩ The output capacitor is used to keep the DC output voltage and supply the load transient current. When operating in constant current mode, the output ripple is determined by four components: PPL t PPL C t PPL PPL ( SL) t S N S t t The following figures show the form of the ripple contributions. VRIPPLE(ESR)(t) Place resistors R1 and R2 close to FB pin to prevent stray pickup. Input Capacitor Selection The use of the input capacitor is filtering the input voltage ripple and the MOSFETS switching spike voltage. Because the input current to the step-down converter is discontinuous, the input capacitor is required to supply the current to the converter to keep the DC input voltage. The capacitor voltage rating should be 1.25 to 1.5 times greater than the maximum input voltage. The input capacitor ripple current RMS value is calculated as: D 1D N( MS) D + VRIPPLE(ESL) (t) (t) + VRIPPLE(C) (t) (t) + VNOISE (t) (t) N Where D is the duty cycle of the power MOSFET. This function reaches the maximum value at D=0.5 and the equivalent RMS current is equal to IOUT/2. The following diagram is the graphical representation of above equation. = VRIPPLE(t) 1.5 2.5A IIN(RMS) (A) 1.25 2A 1 (t) 0.75 1A 0.5 0.25 0 10 20 30 40 50 60 70 80 90 D (%) FP6373-1.0-JUN-2013 10 FP6373 85T fitipower integrated technology lnc. Application Information (Continued) PPL ( SL) PPL (C) F SC L SL L SL F SC2 1 S N That will lower ripple current and result in lower output ripple voltage. The Δ L is inductor peak-to-peak ripple current: N L L C 1 N Where FOSC is the switching frequency, L is the inductance value, VIN is the input voltage, ESR is the equivalent series resistance value of the output capacitor, ESL is the equivalent series inductance value of the output capacitor and the COUT is the output capacitor. Low ESR capacitors are preferred to use. Ceramic, tantalum or low ESR electrolytic capacitors can be used depending on the output ripple requirements. When using the ceramic capacitors, the ESL component is usually negligible. It is important to use the proper method to eliminate high frequency noise when measuring the output ripple. The figure shows how to locate the probe across the capacitor when measuring output ripple. Remove the scope probe plastic jacket in order to expose the ground at the tip of the probe. It gives a very short connection from the probe ground to the capacitor and eliminates noise. F 1 L=1.2μH 0.8 L=1.8μH 0.6 0.4 L=2.2μH 0.2 0 2.5 3 3.5 4.5 5 5.5 VOUT =1.8V, FOSC=1MHz A good compromise value between size and efficiency is to set the peak-to-peak inductor ripple current Δ L equal to 30% of the maximum load current. But setting the peak-to-peak inductor ripple current Δ L between 20%~50% of the maximum load current is also acceptable. Then the inductance can be calculated with the following equation: L 0. (MA ) N N Ceramic Capacitor 4 VIN (V) L GND N 1.2 Probe Ground VOUT 1 L SC The following diagram is an example to graphically represent Δ L equation. ΔIL (A) PPL ( S ) F SC L To guarantee sufficient output current, peak inductor current must be lower than the FP6373 high-side MOSFET current limit. The peak inductor current is shown as below: P A (MA ) L 2 Inductor Selection The output inductor is used for storing energy and filtering output ripple current. But the trade-off condition often happens between maximum energy storage and the physical size of the inductor. The first consideration for selecting the output inductor is to make sure that the inductance is large enough to keep the converter in the continuous current mode. FP6373-1.0-JUN-2013 11 FP6373 85T fitipower integrated technology lnc. Application Information (Continued) Feedforward Capacitor Selection PCB Layout Recommendation Internal compensation function allows users saving time in design and saving cost by reducing the number of external components. The use of a feedforward capacitor C3 in the feedback network is recommended to improve transient response or higher phase margin. he device’s performance and stability are dramatically affected by PCB layout. It is recommended to follow these general guidelines shown as below: 1. Place the input capacitors and output capacitors as close to the device as possible. The traces which connect to these capacitors should be as short and wide as possible to minimize parasitic inductance and resistance. FB R2 For optimizing the feedforward capacitor, knowing the cross frequency is the first thing. The cross frequency (or the converter bandwidth) can be determined by using a network analyzer. When getting the cross frequency with no feedforward capacitor identified, the value of feedforward capacitor C3 can be calculated with the following equation: C 2 1 FC SS 1 1 1 1 1 2 2. Place feedback resistors close to the FB pin. 3. Keep the sensitive signal (FB) away from the switching signal (LX). 4. Multi-layer PCB design is recommended. GND VOUT C2 L1 C1 VIN VIN 4 3 LX PG 5 2 GND FB 6 1 EN R1 C3 C3 R1 FP6373 R3 VOUT R2 Figure 19. Recommended Layout Diagram Where FCROSS is the cross frequency. To reduce transient ripple, the feedforward capacitor value can be increased to push the cross frequency to higher region. Although this can improve transient response, it also decreases phase margin and causes more ringing. In the other hand, if more phase margin is desired, the feedforward capacitor value can be decreased to push the cross frequency to lower region. In general, the feedforward capacitor range is between 10pF to 330pF. FP6373-1.0-JUN-2013 12 FP6373 85T fitipower integrated technology lnc. Outline Information SOT-23-6 Package (Unit: mm) SYMBOLS UNIT DIMENSION IN MILLIMETER MIN MAX A 0.90 1.45 A1 0.00 0.15 A2 0.90 1.30 B 0.30 0.50 D 2.80 3.00 E 2.60 3.00 E1 1.50 1.70 e 0.90 1.00 e1 1.80 2.00 L 0.30 0.60 Note：Followed From JEDEC MO-178-C. Carrier Dimensions Life Support Policy Fitipower’s products are not authorized for use as critical components in life support devices or other medical systems. FP6373-1.0-JUN-2013 13