Preliminary Datasheet
LP4063S
500mA Single Chip Li-Ion and Li-Polymer Charger
General Description
Features
The LP4063S is a complete constant-current/ constant
voltage linear charger for single cell lithium-ion battery.
Its SOT23-5 package and low external component
count make the LP4063S ideally suited for portable
applications. No external sense resistor is needed,
and no blocking diode is required due to the internal
MOSFET architecture. Thermal feedback regulates
the charge current to limit the die temperature during
high power operation or high ambient temperature.
The charge voltage is fixed at 4.2V, and the charge
current can be ISET programmed externally with a
single resistor.
The LP4063S automatically terminates the charge
cycle when the charge current drops to 1/10 setting
current value after the final float voltage is reached.
When the input supply is removed, the LP4063S
automatically enters a low current state, dropping the
battery drain current to less than < 1µA.
Other features include charge current monitor, under
voltage lockout, automatic recharge and a status pin .
Input Voltage up to 28V
Input Over Voltage Protection:7V
Short-circuit protection
Programmable Charge Current:50mA to 500mA
< 1µA Battery Reverse Current
Protection of Reverse Connection of Battery
No MOSFET, Sense Resistor or Blocking Diode
Required
Constant-Current/Constant-Voltage Operation
with Thermal Regulation to Maximize Charge
Rate Without Risk of Overheating
SOT23-5 Package
RoHS Compliant and 100% Lead (Pb)-Free
Typical Application Circuit
LP4063S
VIN
4
VIN
BAT
Battery
3
CIN
1uF
Order Information
5
LP4063S
10nF
COV
1uF
1K
ISET
CHRG
1
LED1
RISET
2K
F: Pb-Free
GND
Package Type
B5: SOT23-5
2
Charge Voltage
Default: 4.2V
Marking Information
Applications
Device
Marking
LP4063
Portable Media Players/Game
LP4063SB5F
Power Bank
Bluetooth Applications
Marking indication:
PDA/MID
LP4063S-00
May.-2019
SYWX
Package
SOT23-5
Y:Production year W:Production week
Email: marketing@lowpowersemi.com
Shipping
3K/REEL
X: Series Number
www.lowpowersemi.com
Page 1 of 6
Preliminary Datasheet
LP4063S
Functional Pin Description
Package Type
Pin Configurations
SOT23-5
CHRG
1
GND
2
BAT
3
5
ISET
4
VIN
SOT23-5
TOP VIEW
Pin Description
No.
NAME
DESCRIPTION
Open-Drain Charge Status Output. When the battery is charging, the CHRG pin is pulled low
1
CHRG
by an internal NMOS. When the charge cycle is completed, the pin could be pulled High by an
external pull high resistor.
2
GND
GND is the connection to system ground.
BAT is the connection to the battery. Typically a 10µF Tantalum capacitor is needed for
3
BAT
stability when there is no battery attached. When a battery is attached, only a 1uF ceramic
capacitor is required.
4
VIN
VIN is the input power source. Connect to a wall adapter.
Charge Current Program. The charge current is programmed by connecting a 1%
5
ISET
LP4063S-00
resistor(RISET) to ground.
May.-2019
Email: marketing@lowpowersemi.com
www.lowpowersemi.com
Page 2 of 6
Preliminary Datasheet
LP4063S
Function Block Diagram
BAT
VIN
R1
CHRG
Control
Logic
R2
GND
ISET
Absolute Maximum Ratings Note 1
Input Voltage to GND ---------------------------------------------------------------------------------------- -0.3V to 28V
BAT Voltage GND --------------------------------------------------------------------------------------------- - 5V to 6.5V
Other pin to GND -------------------------------------------------------------------------------------------- -0.3V to 6.5V
Maximum Junction Temperature ---------------------------------------------------------------------------------- 125℃
Maximum Soldering Temperature (at leads, 10 sec) --------------------------------------------------------- 260℃
Operating Junction Temperature Range (TJ) -------------------------------------------------------- -40℃ to 85℃
Storage Temperature ------------------------------------------------------------------------------------- -65℃ to 165℃
Thermal Information
Maximum Power Dissipation ( PD,TA=25°C) --------------------------------------------------------------------- 0.6W
Thermal Resistance (θJA) ---------------------------------------------------------------------------------------- 200℃/W
ESD Susceptibility
HBM(Human Body Mode) --------------------------------------------------------------------------------------------- 2KV
MM(Machine Mode) ---------------------------------------------------------------------------------------------------- 200V
Note 1.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not
implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
LP4063S-00
May.-2019
Email: marketing@lowpowersemi.com
www.lowpowersemi.com
Page 3 of 6
Preliminary Datasheet
LP4063S
Electrical Characteristics
(TA=25°C, VIN =5V, unless otherwise noted.)
SYMBOL
PARAMETER
CONDITIONS
VIN
Input Voltage
IIN
Input Supply Current
IBAT=0
VFLOAT
Regulated Output (Float) Voltage
IBAT=40mA,
VOVP
Input Voltage OVP
VIN Rising
VOVP_HYS
OVP Hysteresis
IBAT
BAT Pin Current
ITRIKL
Trickle Charge Current
VTRIKL
Trickle Charge Threshold Voltage
VTRHYS
MIN
TYP.
MAX
UNITS
4.4
5
6.5
V
1000
4.158
4.2
uA
4.242
V
7
V
150
mV
RISET=4k, Current Mode
325
mA
RISET=10k, Current Mode
130
mA
VBAT=4.2V
1
VIN=float or 0V
±1
1
VBAT
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