OM-O2SP

OM-O2S / OM-O2SP Onion Omega2S IoT compute modules Data Sheet Version 1.10 Omega2S Datasheet Table of Contents 1. Overview 1.1 Key Features 4 6 1.2 Variants 1.3 Block Diagram 7 8 2. Features 2.1 CPU 2.2 Memory 2.3 Flash 2.4 WiFi 2.4.1 Antenna Interfaces 2.5 Interfaces 2.5.1 USB 2.5.2 SPI 2.5.3 I2C 2.5.4 I2S 2.5.4.1 Features 2.5.5 SDIO/eMMC 2.5.6 Ethernet 2.5.7 UART 2.5.7.1 Features 2.5.8 PWM 2.5.9 GPIO 9 9 9 9 9 9 10 10 10 10 10 10 11 11 11 11 11 11 3. Pin Definition 3.1 Pin Assignment 3.2 Pin Multiplexing Diagram 3.3 Special Pins 3.3.1 - System Boot Pins 3.3.2 - SPI Pins 3.3.3 - Reset Pins 3.3.4 - Power Supply Pins 3.3.4.1 - VDD_Flash Pin 12 12 16 17 17 17 18 18 19 4. Electrical Specifications 4.1 Absolute Maximum Ratings 4.2 Operating Conditions 4.3 Power Consumption 20 20 20 21 OM-O2S | OM-O2SP Give Feedback Page 2 of 30 Omega2S Datasheet 5. Mechanical Specifications 5.1 Mechanical Drawing 5.2 Recommended PCB Footprint 5.3 Packaging Details 22 22 23 24 5.3.1 Carrier Tape Specifications 5.3.2 Surface Mount Reel Specifications 5.3.3 Tolerances and Additional Notes 24 25 26 6. Reflow Soldering 27 7. Additional Resources 7.1 Omega2S Reference Design Schematics 28 28 7.2 Omega2 Online Documentation 7.3 Omega2S Hardware Design Guide 28 28 8. Suggestions & Feedback 29 9. Datasheet Revision History 30 OM-O2S | OM-O2SP Give Feedback Page 3 of 30 Omega2S Datasheet 1. Overview The Onion Omega2S is a Wi-Fi enabled, Linux compute module, designed specifically for IoT applications. It provides a drop-in, low-power solution ideal for building IoT hubs and devices. The module measures 34x20x2.8 mm and features a MIPS 24KEc processor running at 580 MHz, built-in DDR2 DRAM, flash storage, and a 2.4 GHz 802.11b/g/n Wi-Fi radio. It supports a wide variety of I/O protocols, with 42 pins available to the developer. The module is self-contained and only requires a power supply and an external WiFi antenna to operate. By virtue of the Linux operating system, developers can create their own applications using a programming language of their choice, and make use of existing network stacks and a rich set of software packages to implement their desired software functionality. Key highlights: ● ● ● ● ● ● Drop-in Wi-Fi enabled Linux compute module for IoT applications Dual mode 2.4 GHz 802.11 b/g/n Wi-Fi - simultaneously host a WiFi access point and connect to existing WiFi networks CPU, memory, and flash storage are built-in - Only requires external antenna Runs OpenWRT Linux operating system out of the box Features USB, SD/eMMC storage support, ethernet, 3x UARTs, I2C, SPI, GPIOs interfaces FCC and CE certified OM-O2S | OM-O2SP Give Feedback Page 4 of 30 Omega2S Datasheet Highlights on the software and operating system: ● ● The operating system is based on the OpenWRT Linux distribution ○ Support for modern programming languages: Python (2.7 and 3.6), NodeJS (8.10), GoLang, C, C++, and others The default device operating system image includes: ○ Onion’s enhanced WiFi driver ○ A package manager (opkg) ○ A lightweight web server (uhttpd) and an extendable Remote Procedure Call daemon (RPCD and ubus) ○ Utilities to control the GPIOs (gpioctl, fast-gpio) and pin multiplexing (omega2-ctrl) ○ The sysfs interface for programmatic control of the hardware interfaces ○ OnionOS, a web-based, graphical user interface for the Omega2 family The build system for creating the operating system image and software packages is open source, so developers can create their own customized operating system images tailored to their needs. It can be found on GitHub: https://github.com/OnionIoT/source. Additionally, the source code for many software packages created by Onion can be found on GitHub: https://github.com/OnionIoT This includes the Omega2 bootloader source code. Extensive documentation can be found online on the Onion Docs site that describes technical details, software usage, and more. OM-O2S | OM-O2SP Give Feedback Page 5 of 30 Omega2S Datasheet 1.1 Key Features CPU Chipset MT7688AN Architecture MIPS24KEc Clock Speed 580MHz Memory Flash 16MB (OM-O2S) or 32MB (OM-O2SP) DDR2 DRAM 64MB (OM-O2S) or 128MB (OM-O2SP) WIFI WiFi Protocol IEEE 802.11 b/g/n Base Band 2.4GHz Data Rate 150 Mbit/s Channel Bandwidth 20/40 MHz Operation Mode AP, STA, AP&STA Encryption Mode WEP64/128, AES, WPA, WPA2, WAP Interfaces Ethernet 1 (10M/100M) USB 2.0 Host 1 SDXC/eMMC 1 SPI 1 I2C 1 I2S 1 UART 3 PWM 4 GPIO Up to 30 Power Supply Requirement DC Input 3.3V No-load Running Current 200±40mA OM-O2S | OM-O2SP Give Feedback Page 6 of 30 Omega2S Datasheet Peak Current Requirement 800mA Operation Conditions Ambient Temperature -10°C ~ 55 °C Storage Temperature -20°C ~ 80° C Operating Humidity 10%-95%RH (Non-Condensing) Storage Humidity 5%-95%RH (Non-Condensing) Physical Specifications Dimensions 34*20*2.8mm Packaging Surface mount Additional specifications and operating details for the microprocessor in the Omega2S can be found in the Mediatek MT7688 Datasheet 1.2 Variants Model Name RAM Flash Packaging OM-O2S Omega2S 64 MB 16 MB SMT OM-O2SP Omega2S+ 128 MB 32 MB SMT OM-O2S | OM-O2SP Give Feedback Page 7 of 30 Omega2S Datasheet 1.3 Block Diagram OM-O2S | OM-O2SP Give Feedback Page 8 of 30 Omega2S Datasheet 2. Features 2.1 CPU The processor is based on the MIPS architecture, it is a MIPS 24KEc, little-endian, 32-bit RISC core that operates at 580 MHz with a 64 KB Instruction Cache and 32 KB Data Cache. 2.2 Memory Features on-board 16-bit DDR2 DRAM memory operating at 400 MHz ● Omega2S features 64 MB memory ● Omega2S+ features 128 MB memory 2.3 Flash Features on-board SPI flash storage that contains the bootloader, Linux OS, and WiFi calibration data. ● Omega2S features 24-bit addressed 16 MB flash storage ● Omega2S+ features 32-bit addressed 32 MB flash storage 2.4 WiFi The Omega supports 2.4 GHz IEEE 802.11 b/g/n WiFi with a maximum 150 Mbps PHY data rate. The embedded RF front-end is 1T1R, meaning that it is used for both transmitting and receiving by virtue of time-multiplexing. The Omega’s WiFi interface can simultaneously host its own WiFi Access Point while connecting to another WiFi network. 2.4.1 Antenna Interfaces The Omega2S supports on-board antennas as well as external antennas - there is no built-in antenna on the module. On-board antennas, such as ceramic chip antennas or PCB trace antennas, need to be connected to pin 24. External antennas can be connected directly to the u.FL connector on the module. Note 1: Only one of pin 24 or the u.FL connector should be used in a design. If both pin 24 and the u.FL connector are connected to antennae, the transmission power will be split between the two. OM-O2S | OM-O2SP Give Feedback Page 9 of 30 Omega2S Datasheet 2.5 Interfaces Describing the interfaces available on the Omega2S modules. 2.5.1 USB There is one (1) USB 2.0 host controller available on dedicated pins. Note 1: A 5V power source needs to be supplied to the USB client device to properly operate. Note 2: Special care needs to be taken to ensure the high-speed USB data lines are impedance matched when routing custom hardware with the Omega2S. Note 3: Use of an ESD protection device is recommended. 2.5.2 SPI One (1) SPI interface is available. The interface supports half-duplex transmissions and can operate in host-mode only. The maximum SPI clock frequency is 40 MHz. The SPI interface features two Chip Select signals. The processor communicates with the on-board flash storage using the SPI protocol. The flash storage occupies SPI Chip Select 0, external devices can be connected to SPI Chip Select 1. Note: External devices connected to the SPI bus can affect the boot sequence under certain conditions. See section 3.3.2 - SPI Pins for details. 2.5.3 I2C There is one (1) I2C controller available. The interface can operate in host-mode only. Standard (100kbps) and fast mode (400kbps) are supported. The I2C logic level is 3.3V. 2.5.4 I2S The Omega2S has one (1) I2S interface available. The I2S interface consists of two separate cores, a transmitter and receiver. Both can operate in either master or slave mode. 2.5.4.1 Features - I2S transmitter / receiver, configurable as master or slave As slave: 24-bit data, sampling rates up to 192 kHz As master: 16-bit data, sampling rates of 8 kHz, 16 kHz, 22.05 kHz, 44.1 kHz, and 48 kHz Stereo audio data transfer 32-byte FIFO for transmission GDMA access 12 Mhz bit clock from external source (when in slave mode) OM-O2S | OM-O2SP Give Feedback Page 10 of 30 Omega2S Datasheet 2.5.5 SDIO/eMMC There is a single SDIO interface. Only one of eMMC, SD/Micro-SD, or other SDIO device can be used. The SDIO interface supports the SDXC specification for SD cards, with a maximum capacity of 2 TB and a maximum transfer speed of 300 MB/s, and the eMMC5.1 interface for eMMC storage. 2.5.6 Ethernet The Omega2 has a single 10/100M Ethernet integrated PHY. It is recommended that typical ethernet magnetics be used, however for very short runs (