ESP32WROVERE &
ESP32WROVERIE
Datasheet
Version 1.6
Espressif Systems
Copyright © 2022
www.espressif.com
About This Document
This document provides the specifications for the ESP32-WROVER-E and ESP32-WROVER-IE modules.
Document Updates
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For revision history of this document, please refer to the last page.
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Contents
1
Overview
1
2
Block Diagram
3
3
Pin Definitions
5
3.1
Pin Layout
5
3.2
Pin Description
5
3.3
Strapping Pins
7
4
Functional Description
9
4.1
CPU and Internal Memory
9
4.2
External Flash and SRAM
9
4.3
Crystal Oscillators
9
4.4
RTC and Low-Power Management
9
5
Peripherals and Sensors
11
6
Electrical Characteristics
12
6.1
Absolute Maximum Ratings
12
6.2
Recommended Operating Conditions
12
6.3
DC Characteristics (3.3 V, 25 °C)
12
6.4
Wi-Fi Radio
13
6.5
Bluetooth LE Radio
14
6.5.1
Receiver
14
6.5.2
Transmitter
14
7
Schematics
15
8
Peripheral Schematics
17
9
Physical Dimensions
18
10 Recommended PCB Land Pattern
19
11 Dimensions of External Antenna Connector
20
12 Product Handling
21
12.1
Storage Conditions
21
12.2
Electrostatic Discharge (ESD)
21
12.3
Reflow Profile
21
12.4
Ultrasonic Vibration
22
13 Related Documentation and Resources
23
Revision History
24
List of Tables
1
ESP32-WROVER-E Series Comparison
1
2
ESP32-WROVER-IE Series Comparison
1
3
ESP32-WROVER-E & ESP32-WROVER-IE Specifications
2
4
Pin Definitions
6
5
Strapping Pins
7
6
Description of ESP32 Power-up and Reset Timing Parameters
8
7
Absolute Maximum Ratings
12
8
Recommended Operating Conditions
12
9
DC Characteristics (3.3 V, 25 °C)
12
10
Wi-Fi Radio Characteristics
13
11
Receiver Characteristics – Bluetooth LE
14
12
Transmitter Characteristics – Bluetooth LE
14
List of Figures
1
ESP32-WROVER-E Block Diagram (with ESP32-D0WD-V3 embedded)
3
2
ESP32-WROVER-E Block Diagram (with ESP32-D0WDR2-V3 embedded)
3
3
ESP32-WROVER-IE Block Diagram (with ESP32-D0WD-V3 embedded)
4
4
ESP32-WROVER-IE Block Diagram (with ESP32-D0WDR2-V3 embedded)
4
5
Pin Layout (Top View)
5
6
ESP32 Power-up and Reset Timing
8
7
Schematics of ESP32-WROVER-E
15
8
Schematics of ESP32-WROVER-IE
16
9
Peripheral Schematics
17
10
Physical Dimensions
18
11
Recommended PCB Land Pattern
19
12
Dimensions of External Antenna Connector
20
13
Reflow Profile
21
1 Overview
1 Overview
ESP32-WROVER-E and ESP32-WROVER-IE are two powerful, generic Wi-Fi + Bluetooth + Bluetooth LE MCU
modules that target a wide variety of applications, ranging from low-power sensor networks to the most
demanding tasks, such as voice encoding, music streaming and MP3 decoding.
ESP32-WROVER-E comes with a PCB antenna, and ESP32-WROVER-IE with a connector for an external
antenna. The information in this datasheet is applicable to both modules.
The Series Comparison for the two modules is as follows:
Table 1: ESP32WROVERE Series Comparison1
Ordering Code
Ambient Temp.2
Size3
(°C)
(mm)
Flash
PSRAM
ESP32-WROVER-E-N4R8
4 MB (Quad SPI)
8 MB (Quad SPI)
–40 ~ 85
ESP32-WROVER-E-N8R8
8 MB (Quad SPI)
8 MB (Quad SPI)
–40 ~ 85
ESP32-WROVER-E-N16R8
16 MB (Quad SPI)
8 MB (Quad SPI)
–40 ~ 85
4
–40 ~ 85
ESP32-WROVER-E-N4R2
4 MB (Quad SPI)
2 MB (Quad SPI)
ESP32-WROVER-E-N8R2
8 MB (Quad SPI)
2 MB (Quad SPI)4
–40 ~ 85
ESP32-WROVER-E-N16R2
16 MB (Quad SPI)
2 MB (Quad SPI)4
–40 ~ 85
1
18.0 x 31.4 x 3.3
This table shares the same notes presented in the table 2 below.
Table 2: ESP32WROVERIE Series Comparison
Ordering Code
Ambient Temp.2
Size3
(°C)
(mm)
Flash
PSRAM
ESP32-WROVER-IE-N4R8
4 MB (Quad SPI)
8 MB (Quad SPI)
–40 ~ 85
ESP32-WROVER-IE-N8R8
8 MB (Quad SPI)
8 MB (Quad SPI)
–40 ~ 85
ESP32-WROVER-IE-N16R8
16 MB (Quad SPI)
8 MB (Quad SPI)
–40 ~ 85
4
–40 ~ 85
ESP32-WROVER-IE-N4R2
4 MB (Quad SPI)
2 MB (Quad SPI)
ESP32-WROVER-IE-N8R2
8 MB (Quad SPI)
2 MB (Quad SPI)4
–40 ~ 85
4
–40 ~ 85
ESP32-WROVER-IE-N16R2
2
16 MB (Quad SPI)
2 MB (Quad SPI)
18.0 x 31.4 x 3.3
Ambient temperature specifies the recommended temperature range of the environment immediately outside
the Espressif module.
3
For details, refer to Section 10 Physical Dimensions.
4
This module uses PSRAM integrated in the chip’s package.
At the core of the module is the ESP32-D0WD-V3 chip or ESP32-D0WDR2-V3 chip*. The chip embedded is
designed to be scalable and adaptive. There are two CPU cores that can be individually controlled, and the CPU
clock frequency is adjustable from 80 MHz to 240 MHz. The chip also has a low-power coprocessor that can be
used instead of the CPU to save power while performing tasks that do not require much computing power, such
as monitoring of peripherals. ESP32 integrates a rich set of peripherals, ranging from capacitive touch sensors,
Hall sensors, SD card interface, Ethernet, high-speed SPI, UART, I2S and I2C.
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1 Overview
Note:
* For details on the part numbers of the ESP32 family of chips, please refer to the document ESP32 Datasheet.
The integration of Bluetooth® , Bluetooth LE and Wi-Fi ensures that a wide range of applications can be targeted,
and that the module is all-around: using Wi-Fi allows a large physical range and direct connection to the Internet
through a Wi-Fi router, while using Bluetooth allows the user to conveniently connect to the phone or broadcast
low energy beacons for its detection. The sleep current of the ESP32 chip is less than 5 µA, making it suitable for
battery powered and wearable electronics applications. The module supports a data rate of up to 150 Mbps,
and 20 dBm output power at the antenna to ensure the widest physical range. As such the module does offer
industry-leading specifications and the best performance for electronic integration, range, power consumption,
and connectivity.
The operating system chosen for ESP32 is freeRTOS with LwIP; TLS 1.2 with hardware acceleration is built in as
well. Secure (encrypted) over the air (OTA) upgrade is also supported, so that users can upgrade their products
even after their release, at minimum cost and effort.
Table 3 provides the specifications of the two modules.
Table 3: ESP32WROVERE & ESP32WROVERIE Specifications
Categories
Items
Certification
RF certification
Test
Reliablity
Specifications
See
certificates
for
ESP32-WROVER-E
and
ESP32-WROVER-IE
HTOL/HTSL/uHAST/TCT/ESD
802.11 b/g/n (802.11n up to 150 Mbps)
Wi-Fi
Protocols
A-MPDU and A-MSDU aggregation and 0.4 µs guard interval support
Frequency range
2412 ~ 2484 MHz
Protocols
Bluetooth v4.2 BR/EDR and Bluetooth LE specification
NZIF receiver with –97 dBm sensitivity
Bluetooth
Radio
Class-1, class-2 and class-3 transmitter
AFH
Audio
CVSD and SBC
SD card, UART, SPI, SDIO, I2C, LED PWM, Motor
PWM, I2S, IR, pulse counter, GPIO, capacitive touch sen-
Module interfaces
sor, ADC, DAC, Two-Wire Automotive Interface (TWAI® ),
compatible with ISO11898-1 (CAN Specification 2.0)
Hardware
On-chip sensor
Hall sensor
Integrated crystal
40 MHz crystal
Integrated SPI flash
See Table 1 and Table 2
Integrated PSRAM
See Table 1 and Table 2
Operating voltage/Power supply
3.0 V ~ 3.6 V
Minimum current delivered by
power supply
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500 mA
Package size
(18.00±0.15) mm × (31.40±0.15) mm × (3.30±0.15) mm
Moisture sensitivity level (MSL)
Level 3
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Q
Q
2 Block Diagram
2 Block Diagram
ESP32-WROVER-IE
40 MHz
Crystal
40 MHz
Crystal
3V3
3V3
ESP32-WROVER-E
Antenna
Antenna
RF Matching
RF Matching
GPIOs
ESP32-D0WD-V3
QSPI PSRAM
VDD_SDIO
SPICS0
FLASH_CLK QSPI
SPIDI
SPIDO
SPIWP
SPIHD
VDD_SDIO
SPICS1
FLASHPSRAM_CLK
SIO0
SIO1
SIO2
SIO3
GPIOs
QSPI PSRAM
EN
ESP32-D0WDR2-V3
SPICS
SPICLK
SPIDI
SPIDO
SPIHD
SPIWP
VDD_SDIO
EN
QSPI FLASH
Figure 1: ESP32WROVERE Block Diagram (with ESP32D0WDV3 embedded)
ESP32-WROVER-E
40 MHz
Crystal
3V3
Antenna
RF Matching
EN
ESP32-D0WDR2-V3
GPIOs
QSPI PSRAM
SPICS
SPICLK
SPIDI
SPIDO
SPIHD
SPIWP
VDD_SDIO
nna
SIO3
SPIHD
QSPI FLASH
Figure 2: ESP32WROVERE Block Diagram (with ESP32D0WDR2V3 embedded)
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ESP32-WROVER-IE
40 MHz
Crystal
3V3
Antenna
3V3
RF Matching
ESP32-D0WD-V3
VDD_SDIO
SPICS0
FLASH_CLK
SPIDI
SPIDO
SPIWP
SPIHD
VDD_SDIO
SPICS1
PSRAM_CLK
SIO0
SIO1
SIO2
SIO3
GPIOs
QSPI PSRAM
QSPI FLASH
EN
Figure 3: ESP32WROVERIE Block Diagram (with ESP32D0WDV3 embedded)
ESP32-WROVER-IE
40 MHz
Crystal
40 MHz
Crystal
3V3
3V3
ESP32-WROVER-E
Antenna
Antenna
RF Matching
RF Matching
GPIOs
ESP32-D0WD-V3
QSPI PSRAM
VDD_SDIO
SPICS0
FLASH_CLK
QSPI
SPIDI
SPIDO
SPIWP
SPIHD
VDD_SDIO
SPICS1
PSRAM_CLK
FLASH
SIO0
SIO1
SIO2
SIO3
GPIOs
QSPI PSRAM
EN
ESP32-D0WDR2-V3
SPICS
SPICLK
SPIDI
SPIDO
SPIHD
SPIWP
VDD_SDIO
EN
QSPI FLASH
Figure 4: ESP32WROVERIE Block Diagram (with ESP32D0WDR2V3 embedded)
ESP32-WROVER-E
40 MHz
Crystal
3V3
Antenna
RF Matching
EN
ESP32-D0WDR2-V3
GPIOs
QSPI PSRAM
SPICS
SPICLK
SPIDI
SPIDO
SPIHD
SPIWP
VDD_SDIO
ntenna
2 Block Diagram
QSPI FLASH
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3V3
3 Pin Definitions
3 Pin Definitions
3.1 Pin Layout
Keepout Zone
1
GND
GND
38
2
3V3
IO23
37
3
EN
IO22
36
4
SENSOR_VP
TXD0
35
5
SENSOR_VN
RXD0
34
6
IO34
IO21
33
7
IO35
NC
32
GND
GND
GND
GND
Pin 39
GND
GND
GND
GND
GND
8
IO32
IO19
31
9
IO33
IO18
30
10
IO25
IO5
29
11
IO26
NC
28
12
IO27
NC
27
13
IO14
IO4
26
14
IO12
IO0
25
15
GND
IO2
24
16
IO13
IO15
23
17
NC
NC
22
18
NC
NC
21
19
NC
NC
20
Figure 5: Pin Layout (Top View)
3.2 Pin Description
The module has 38 pins. See pin definitions in Table 4.
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3 Pin Definitions
Table 4: Pin Definitions
Name
No.
Type
Function
GND
1
P
Ground
3V3
2
P
Power supply
EN
3
I
Module-enable signal. Active high.
SENSOR_VP
4
I
GPIO36, ADC1_CH0, RTC_GPIO0
SENSOR_VN
5
I
GPIO39, ADC1_CH3, RTC_GPIO3
IO34
6
I
GPIO34, ADC1_CH6, RTC_GPIO4
IO35
7
I
GPIO35, ADC1_CH7, RTC_GPIO5
IO32
8
I/O
IO33
9
I/O
IO25
10
I/O
GPIO25, DAC_1, ADC2_CH8, RTC_GPIO6, EMAC_RXD0
IO26
11
I/O
GPIO26, DAC_2, ADC2_CH9, RTC_GPIO7, EMAC_RXD1
IO27
12
I/O
GPIO27, ADC2_CH7, TOUCH7, RTC_GPIO17, EMAC_RX_DV
IO14
13
I/O
IO12
14
I/O
GND
15
P
IO13
16
I/O
NC *
17
-
-
NC *
18
-
-
NC *
19
-
-
NC *
20
-
-
NC *
21
-
-
NC *
22
-
-
IO15
23
-
IO2
24
I/O
IO0
25
I/O
IO4
26
I/O
NC
27
-
-
NC
28
-
-
IO5
29
I/O
GPIO5, VSPICS0, HS1_DATA6, EMAC_RX_CLK
IO18
30
I/O
GPIO18, VSPICLK, HS1_DATA7
IO19
31
I/O
GPIO19, VSPIQ, U0CTS, EMAC_TXD0
NC
32
-
-
IO21
33
I/O
GPIO21, VSPIHD, EMAC_TX_EN
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GPIO32, XTAL_32K_P (32.768 kHz crystal oscillator input), ADC1_CH4,
TOUCH9, RTC_GPIO9
GPIO33, XTAL_32K_N (32.768 kHz crystal oscillator output),
ADC1_CH5, TOUCH8, RTC_GPIO8
GPIO14, ADC2_CH6, TOUCH6, RTC_GPIO16, MTMS, HSPICLK,
HS2_CLK, SD_CLK, EMAC_TXD2
GPIO12, ADC2_CH5, TOUCH5, RTC_GPIO15, MTDI, HSPIQ,
HS2_DATA2, SD_DATA2, EMAC_TXD3
Ground
GPIO13, ADC2_CH4, TOUCH4, RTC_GPIO14, MTCK, HSPID,
HS2_DATA3, SD_DATA3, EMAC_RX_ER
GPIO15, ADC2_CH3, TOUCH3, MTDO, HSPICS0, RTC_GPIO13,
HS2_CMD, SD_CMD, EMAC_RXD3
GPIO2, ADC2_CH2, TOUCH2, RTC_GPIO12, HSPIWP, HS2_DATA0,
SD_DATA0
GPIO0, ADC2_CH1, TOUCH1, RTC_GPIO11, CLK_OUT1,
EMAC_TX_CLK
GPIO4, ADC2_CH0, TOUCH0, RTC_GPIO10, HSPIHD, HS2_DATA1,
SD_DATA1, EMAC_TX_ER
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3 Pin Definitions
Name
No.
Type
Function
RXD0
34
I/O
GPIO3, U0RXD, CLK_OUT2
TXD0
35
I/O
GPIO1, U0TXD, CLK_OUT3, EMAC_RXD2
IO22
36
I/O
GPIO22, VSPIWP, U0RTS, EMAC_TXD1
IO23
37
I/O
GPIO23, VSPID, HS1_STROBE
GND
38
P
Ground
Notice:
* Pins GPIO6 to GPIO11 on the ESP32-D0WD-V3/ESP32-D0WDR2-V3 chip are connected to the SPI flash integrated
on the module and are not led out.
3.3 Strapping Pins
ESP32 has five strapping pins, which can be seen in Chapter 7 Schematics:
• MTDI
• GPIO0
• GPIO2
• MTDO
• GPIO5
Software can read the values of these five bits from register ”GPIO_STRAPPING”.
During the chip’s system reset release (power-on-reset, RTC watchdog reset and brownout reset), the latches of
the strapping pins sample the voltage level as strapping bits of ”0” or ”1”, and hold these bits until the chip is
powered down or shut down. The strapping bits configure the device’s boot mode, the operating voltage of
VDD_SDIO and other initial system settings.
Each strapping pin is connected to its internal pull-up/pull-down during the chip reset. Consequently, if a
strapping pin is unconnected or the connected external circuit is high-impedance, the internal weak
pull-up/pull-down will determine the default input level of the strapping pins.
To change the strapping bit values, users can apply the external pull-down/pull-up resistances, or use the host
MCU’s GPIOs to control the voltage level of these pins when powering on ESP32.
After reset release, the strapping pins work as normal-function pins.
Refer to Table 5 for a detailed boot-mode configuration by strapping pins.
Table 5: Strapping Pins
Voltage of Internal LDO (VDD_SDIO)
Pin
MTDI
Default
3.3 V
1.8 V
Pull-down
0
1
Booting Mode
Pin
Default
SPI Boot
Download Boot
GPIO0
Pull-up
1
0
GPIO2
Pull-down
Don’t-care
0
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3 Pin Definitions
Enabling/Disabling Debugging Log Print over U0TXD During Booting
Pin
Default
U0TXD Active
U0TXD Silent
MTDO
Pull-up
1
0
Timing of SDIO Slave
FE Sampling
FE Sampling
RE Sampling
RE Sampling
Pin
Default
FE Output
RE Output
FE Output
RE Output
MTDO
Pull-up
0
0
1
1
GPIO5
Pull-up
0
1
0
1
Note:
• FE: falling-edge, RE: rising-edge.
• Firmware can configure register bits to change the settings of ”Voltage of Internal LDO (VDD_SDIO)” and ”Timing
of SDIO Slave” after booting.
• Internal pull-up resistor (R9) for MTDI is not populated in the module, as the flash and SRAM in the module only
support a power voltage of 3.3 V (output by VDD_SDIO).
The illustration below shows the ESP32 power-up and reset timing. Details about the parameters are listed in
Table 6.
t0
t1
VDD3P3_RTC Min
VDD
VIL_nRST
CHIP_PU
Figure 6: ESP32 Powerup and Reset Timing
Table 6: Description of ESP32 Powerup and Reset Timing Parameters
Parameters
t0
t1
Espressif Systems
Description
Time between the 3.3 V rails being brought up and CHIP_PU being
activated
Duration of CHIP_PU signal level < VIL_nRST (refer to its value in
Table 9 DC Characteristics) to reset the chip
8
Min.
Unit
50
µs
50
µs
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4 Functional Description
4 Functional Description
This chapter describes the modules and functions integrated in ESP32-WROVER-E and
ESP32-WROVER-IE.
4.1 CPU and Internal Memory
ESP32-D0WD-V3 (ESP32-D0WDR2-V3) contains two low-power Xtensa® 32-bit LX6 microprocessors. The
internal memory includes:
• 448 KB of ROM for booting and core functions.
• 520 KB of on-chip SRAM for data and instructions.
• 8 KB of SRAM in RTC, which is called RTC FAST Memory and can be used for data storage; it is accessed
by the main CPU during RTC Boot from the Deep-sleep mode.
• 8 KB of SRAM in RTC, which is called RTC SLOW Memory and can be accessed by the co-processor
during the Deep-sleep mode.
• 1 Kbit of eFuse: 256 bits are used for the system (MAC address and chip configuration) and the remaining
768 bits are reserved for customer applications, including flash-encryption and chip-ID.
4.2 External Flash and SRAM
ESP32 supports multiple external QSPI flash and SRAM chips. More details can be found in Chapter SPI in the
ESP32 Technical Reference Manual. ESP32 also supports hardware encryption/decryption based on AES to
protect developers’ programs and data in flash.
ESP32 can access the external QSPI flash and SRAM through high-speed caches.
• The external flash can be mapped into CPU instruction memory space and read-only memory space
simultaneously.
– When external flash is mapped into CPU instruction memory space, up to 11 MB + 248 KB can be
mapped at a time. Note that if more than 3 MB + 248 KB are mapped, cache performance will be
reduced due to speculative reads by the CPU.
– When external flash is mapped into read-only data memory space, up to 4 MB can be mapped at a
time. 8-bit, 16-bit and 32-bit reads are supported.
• External SRAM can be mapped into CPU data memory space. Up to 4 MB can be mapped at a time.
8-bit, 16-bit and 32-bit reads and writes are supported.
4.3 Crystal Oscillators
The module uses a 40-MHz crystal oscillator.
4.4 RTC and LowPower Management
With the use of advanced power-management technologies, ESP32 can switch between different power
modes.
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4 Functional Description
For details on ESP32’s power consumption in different power modes, please refer to section ”RTC and
Low-Power Management” in ESP32 Datasheet.
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5 Peripherals and Sensors
5 Peripherals and Sensors
Please refer to Section Peripherals and Sensors in ESP32 Datasheet.
Note:
External connections can be made to any GPIO except for GPIOs in the range 6-11, 16, or 17. GPIOs 6-11 are connected
to the module’s integrated SPI flash. GPIOs 16 and 17 are connected to the module’s integrated PSRAM. For details,
please see Section 7 Schematics.
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6 Electrical Characteristics
6 Electrical Characteristics
6.1 Absolute Maximum Ratings
Stresses beyond the absolute maximum ratings listed in the table below may cause permanent damage to the
device. These are stress ratings only, and do not refer to the functional operation of the device that should follow
the recommended operating conditions.
Table 7: Absolute Maximum Ratings
Symbol
Parameter
VDD33
Power supply voltage
Ioutput
1
Min
Max
–0.3
3.6
-
1,100
–40
105
Cumulative IO output current
Tstore
Storage temperature
Unit
V
mA
°C
1. The module worked properly after a 24-hour test in ambient temperature at 25 °C, and the IOs in three domains
(VDD3P3_RTC, VDD3P3_CPU, VDD_SDIO) output high logic level to ground. Please note that pins occupied by flash
and/or PSRAM in the VDD_SDIO power domain were excluded from the test.
2. Please see Appendix IO_MUX in ESP32 Datasheet for IO’s power domain.
6.2 Recommended Operating Conditions
Table 8: Recommended Operating Conditions
Symbol
Parameter
Min
Typical
Max
Unit
VDD33
Power supply voltage
3.0
3.3
3.6
V
IV DD
Current delivered by external power supply
0.5
-
-
A
T
Operating temperature
–40
-
85
°C
6.3 DC Characteristics (3.3 V, 25 °C)
Table 9: DC Characteristics (3.3 V, 25 °C)
Symbol
CIN
VIH
Parameter
Min
Typ
Pin capacitance
-
2
High-level input voltage
1
0.75×VDD
Max
1
Unit
pF
-
VDD +0.3
V
1
V
VIL
Low-level input voltage
–0.3
-
IIH
High-level input current
-
-
50
nA
IIL
Low-level input current
-
-
50
nA
VOH
High-level output voltage
0.8×VDD1
-
-
V
VOL
Low-level output voltage
-
-
0.1×VDD1
V
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6 Electrical Characteristics
Symbol
Parameter
VDD3P3_CPU
High-level source current
power domain 1,
1
(VDD = 3.3 V,
VDD3P3_RTC
VOH >= 2.64 V,
IOH
2
power domain 1,
output drive strength set
2
VDD_SDIO power
to the maximum)
domain 1,
3
Min
Typ
Max
Unit
-
40
-
mA
-
40
-
mA
-
20
-
mA
-
28
-
mA
Low-level sink current
(VDD1 = 3.3 V, VOL = 0.495 V,
IOL
output drive strength set to the maximum)
RP U
Resistance of internal pull-up resistor
-
45
-
kΩ
RP D
Resistance of internal pull-down resistor
-
45
-
kΩ
-
-
0.6
VIL_nRST
Low-level input voltage of CHIP_PU
to power off the chip
V
Notes:
1. Please see Appendix IO_MUX in ESP32 Datasheet for IO’s power domain. VDD is the I/O voltage for a particular power
domain of pins.
2. For VDD3P3_CPU and VDD3P3_RTC power domain, per-pin current sourced in the same domain is gradually reduced
from around 40 mA to around 29 mA, VOH >=2.64 V, as the number of current-source pins increases.
3. Pins occupied by flash and/or PSRAM in the VDD_SDIO power domain were excluded from the test.
6.4 WiFi Radio
Table 10: WiFi Radio Characteristics
Parameter
Condition
Operating frequency range
Output impedance
note2
TX power note3
Sensitivity
Adjacent channel rejection
Espressif Systems
note1
Min
Typical
Max
Unit
-
2412
-
2484
MHz
-
-
*
-
12
13
14
dBm
18.5
19.5
20.5
dBm
11b, 1 Mbps
-
–97
-
dBm
11b, 11 Mbps
-
–88
-
dBm
11g, 6 Mbps
-
–92
-
dBm
11g, 54 Mbps
-
–75
-
dBm
11n, HT20, MCS0
-
–92
-
dBm
11n, HT20, MCS7
-
–72
-
dBm
11n, HT40, MCS0
-
–89
-
dBm
11n, HT40, MCS7
-
–69
-
dBm
11g, 6 Mbps
-
27
-
dB
11g, 54 Mbps
-
13
-
dB
11n, HT20, MCS0
-
27
-
dB
11n, HT20, MCS7
-
12
-
dB
11n, MCS7
11b mode
13
Ω
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6 Electrical Characteristics
Notes:
1. Device should operate in the frequency range allocated by regional regulatory authorities. Target operating frequency
range is configurable by software.
2. For the modules that use external antennas, the output impedance is 50 Ω. For other modules without external
antennas, users do not need to concern about the output impedance.
3. Target TX power is configurable based on device or certification requirements.
6.5 Bluetooth LE Radio
6.5.1 Receiver
Table 11: Receiver Characteristics – Bluetooth LE
Parameter
Conditions
Min
Typ
Max
Unit
Sensitivity @30.8% PER
-
–94
–93
–92
dBm
Maximum received signal @30.8% PER
-
0
-
-
dBm
Co-channel C/I
-
-
+10
-
dB
F = F0 + 1 MHz
-
–5
-
dB
F = F0 – 1 MHz
-
–5
-
dB
F = F0 + 2 MHz
-
–25
-
dB
F = F0 – 2 MHz
-
–35
-
dB
F = F0 + 3 MHz
-
–25
-
dB
F = F0 – 3 MHz
-
–45
-
dB
30 MHz ~ 2000 MHz
–10
-
-
dBm
2000 MHz ~ 2400 MHz
–27
-
-
dBm
2500 MHz ~ 3000 MHz
–27
-
-
dBm
3000 MHz ~ 12.5 GHz
–10
-
-
dBm
-
–36
-
-
dBm
Unit
Adjacent channel selectivity C/I
Out-of-band blocking performance
Intermodulation
6.5.2 Transmitter
Table 12: Transmitter Characteristics – Bluetooth LE
Parameter
Conditions
Min
Typ
Max
RF transmit power
-
-
0
-
dBm
Gain control step
-
-
3
-
dBm
RF power control range
-
–12
-
+9
dBm
F = F0 ± 2 MHz
-
–52
-
dBm
F = F0 ± 3 MHz
-
–58
-
dBm
F = F0 ± > 3 MHz
-
–60
-
dBm
∆ f 1avg
-
-
-
265
kHz
∆ f 2max
-
247
-
-
kHz
∆ f 2avg /∆ f 1avg
-
-
+0.92
-
-
ICFT
-
-
–10
-
kHz
Drift rate
-
-
0.7
-
kHz/50 µs
Drift
-
-
2
-
kHz
Adjacent channel transmit power
Espressif Systems
14
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5
4
3
2
1
This is the reference design of the module.
GND
The values of C1 and C2 vary with
the selection of the crystal.
GND
The value of R2 varies with the actual
PCB board.
1
1uF
C2
TBD
GND
0
GND
3
GND
TBD
C20
100pF
VDD33
U1
2
C3
D
C1
XIN
VDD33
GND XOUT
4
GND
C9
GND
0.1uF
PCB ANTENNA
GND
2.0nH(0.1nH)
C13
C11
C10
C21
10uF
1uF
0.1uF
NC
40MHz(±10ppm)
GPIO21
U0TXD
U0RXD
GPIO22
R3
499
3.3nF/6.3V(10%)
GND
J39
IPEX(NC)
VDD33
GND
CAP1
CAP2
VDDA
XTAL_P
XTAL_N
VDDA
GPIO21
U0TXD
U0RXD
GPIO22
49
0(NC)
GND
3
2
C5
10nF/6.3V(10%)
GND
GND
ANT2 R14
20K(5%)
D1
C4
VDD33
ESD
0.1uF
1
2
ANT1 R15
RF_ANT L4
0
PCB_ANT
C15
C14
TBD
TBD
GND
C
LNA_IN
TBD
GND
GND
The values of C15, L4 and C14
vary with the actual PCB board.
SENSOR_VP
SENSOR_VN
EN
GPIO34
GPIO35
GPIO32
GPIO33
GPIO25
NC: No component.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VDDA
LNA_IN
VDD3P3
VDD3P3
SENSOR_VP
SENSOR_CAPP
SENSOR_CAPN
SENSOR_VN
CHIP_PU
VDET_1
VDET_2
32K_XP
32K_XN
GPIO25
SCK/CLK
R12
15
16
17
18
19
20
21
22
23
24
FLASH_CLK
0
38
37
36
35
34
33
32
31
30
29
28
27
26
25
ESP32-D0WD-V3
ESP32-D0WDR2-V3
GPIO19
GPIO23
GPIO18
GPIO5
SDI/SD1
SDO/SD0
SCK/CLK
SCS/CMD
SWP/SD3
SHD/SD2
GPIO17
GPIO16
R4
C24 VDD_SDIO
2K(NC)
1uF
VDD33
GND
0(NC)
GPIO17
R13
SRAM_CLK
0
GND
R9
C19
GPIO13
GPIO15
GPIO2
GPIO0
GPIO4
10K(NC)
GPIO26
GPIO27
GPIO14
GPIO12
VDD33
R11
0.1uF
GND
Flash and PSRAM
VDD_SDIO
SHD/SD2
7
CLK
/HOLD
FLASH
B
GND
VDD_SDIO
R10
8
/CS
GND
1
FLASH_CLK 6
VCC
U3
SCS/CMD
VDD_SDIO
DI
DO
/WP
5
SDI/SD1
2
SDO/SD0
3
SWP/SD3
10K
U4
1
2
3
4
GPIO16
SDO/SD0
SWP/SD3
4
ESP32-WROVER-E & ESP32-WROVER-IE Datasheet v1.6
U2
GPIO19
VDD3P3_CPU
GPIO23
GPIO18
GPIO5
SD_DATA_1
SD_DATA_0
SD_CLK
SD_CMD
SD_DATA_3
SD_DATA_2
GPIO17
VDD_SDIO
GPIO16
GPIO26
GPIO27
MTMS
MTDI
VDD3P3_RTC
MTCK
MTDO
GPIO2
GPIO0
GPIO4
GND
ANT1
15
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GND
1
R1
C6
48
47
46
45
44
43
42
41
40
39
L5
GND
GND
R2
VDD33
CS#
VDD
SO/SIO1
SIO3
SIO2
SCLK
VSS
SI/SIO0
8
7
6
5
SHD/SD2
SRAM_CLK
SDI/SD1
PSRAM
GND
GND
Pin.1
GND
Pin.2
3V3
Pin.3
EN
Pin.4
SENSOR_VP
Pin.5
SENSOR_VN
Pin.6
IO34
Pin.7
IO35
Pin.8
IO32
Pin.9
IO33
Pin.10
IO25
Pin.11
IO26
Pin.12
IO27
Pin.13
IO14
Pin.14
IO12
Pin.15
GND
Pin.16
IO13
Pin.17
NC
Pin.18
NC
Pin.19
NC
When ESP32-D0WDR2-V3 is used, U4 will be NC.
Figure 7: Schematics of ESP32WROVERE
GND
GND
GPIO23
VDD33
EN
GPIO22
SENSOR_VP
U0TXD
SENSOR_VN
U0RXD
GPIO34
GPIO21
GPIO35
EPAD
GPIO32
GPIO19
GPIO33
GPIO18
GPIO25
GPIO5
GPIO26
GPIO27
GPIO14
GPIO4
GPIO12
GPIO0
GPIO2
GND
GPIO13
GPIO15
ESP32-WROVER-E(pin-out)
Pin.38
GND
Pin.37
IO23
Pin.36
IO22
Pin.35
U0TXD
Pin.34
U0RXD
Pin.33
IO21
Pin.32
NC
Pin.31
IO19
Pin.30
IO18
Pin.29
IO5
Pin.28
NC
Pin.27
NC
Pin.26
IO4
Pin.25
IO0
Pin.24
IO2
Pin.23
IO15
Pin.22
NC
Pin.21
NC
Pin.20
NC
7 Schematics
Espressif Systems
7 Schematics
5
4
3
2
1
7 Schematics
GND
The value of R2 varies with the actual
PCB board.
1
1uF
GND
3
GND
C20
100pF
VDD33
TBD
C2
TBD
2
C3
D
C1
U1
XIN
VDD33
GND XOUT
4
GND
GND
0
Espressif Systems
GND
The values of C1 and C2 vary with
the selection of the crystal.
C9
GND
0.1uF
PCB ANTENNA
GND
2.0nH(0.1nH)
C13
C11
C10
C21
10uF
1uF
0.1uF
NC
R3
GPIO21
U0TXD
U0RXD
GPIO22
499
3.3nF/6.3V(10%)
GND
GND
GND
40MHz(±10ppm)
C6
C5
10nF/6.3V(10%)
J39
IPEX
VDD33
GND
CAP1
CAP2
VDDA
XTAL_P
XTAL_N
VDDA
GPIO21
U0TXD
U0RXD
GPIO22
0
GND
3
2
ANT2 R14
20K(5%)
49
GND
1
R1
48
47
46
45
44
43
42
41
40
39
L5
GND
GND
R2
VDD33
D1
C4
VDD33
ESD
0.1uF
1
2
ANT1 R15
0(NC) RF_ANT L4
PCB_ANT
C14
TBD
GND
GND
The values of C15, L4 and C14
vary with the actual PCB board.
SENSOR_VP
SENSOR_VN
EN
GPIO34
GPIO35
GPIO32
GPIO33
GPIO25
NC: No component.
1
2
3
4
5
6
7
8
9
10
11
12
13
14
VDDA
LNA_IN
VDD3P3
VDD3P3
SENSOR_VP
SENSOR_CAPP
SENSOR_CAPN
SENSOR_VN
CHIP_PU
VDET_1
VDET_2
32K_XP
32K_XN
GPIO25
SCK/CLK
R12
15
16
17
18
19
20
21
22
23
24
U2
16
FLASH_CLK
0
GPIO19
VDD3P3_CPU
GPIO23
GPIO18
GPIO5
SD_DATA_1
SD_DATA_0
SD_CLK
SD_CMD
SD_DATA_3
SD_DATA_2
GPIO17
VDD_SDIO
GPIO16
38
37
36
35
34
33
32
31
30
29
28
27
26
25
ESP32-D0WD-V3
ESP32-D0WDR2-V3
GPIO19
GPIO23
GPIO18
GPIO5
SDI/SD1
SDO/SD0
SCK/CLK
SCS/CMD
SWP/SD3
SHD/SD2
GPIO17
GPIO16
R4
C24 VDD_SDIO
2K(NC)
1uF
VDD33
GND
0(NC)
GPIO17
R13
SRAM_CLK
0
GND
R9
C19
GPIO13
GPIO15
GPIO2
GPIO0
GPIO4
10K(NC)
GPIO26
GPIO27
GPIO14
GPIO12
VDD33
R11
0.1uF
GND
Flash and PSRAM
VDD_SDIO
SHD/SD2
7
CLK
/HOLD
FLASH
B
GND
VDD_SDIO
R10
8
/CS
GND
1
FLASH_CLK 6
VCC
U3
SCS/CMD
VDD_SDIO
DI
DO
/WP
5
SDI/SD1
2
SDO/SD0
3
SWP/SD3
10K
U4
1
2
3
4
GPIO16
SDO/SD0
SWP/SD3
4
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C15
TBD
GND
C
LNA_IN
TBD
GPIO26
GPIO27
MTMS
MTDI
VDD3P3_RTC
MTCK
MTDO
GPIO2
GPIO0
GPIO4
GND
ANT1
CS#
VDD
SO/SIO1
SIO3
SIO2
SCLK
VSS
SI/SIO0
8
7
6
5
SHD/SD2
SRAM_CLK
SDI/SD1
PSRAM
GND
GND
Pin.1
GND
Pin.2
3V3
Pin.3
EN
Pin.4
SENSOR_VP
Pin.5
SENSOR_VN
Pin.6
IO34
Pin.7
IO35
Pin.8
IO32
Pin.9
IO33
Pin.10
IO25
Pin.11
IO26
Pin.12
IO27
Pin.13
IO14
Pin.14
IO12
Pin.15
GND
Pin.16
IO13
Pin.17
NC
Pin.18
NC
Pin.19
NC
When ESP32-D0WDR2-V3 is used, U4 will be NC.
Figure 8: Schematics of ESP32WROVERIE
A
GND
GND
GPIO23
VDD33
EN
GPIO22
SENSOR_VP
U0TXD
SENSOR_VN
U0RXD
GPIO34
GPIO21
GPIO35
EPAD
GPIO32
GPIO19
GPIO33
GPIO18
GPIO25
GPIO5
GPIO26
GPIO27
GPIO14
GPIO4
GPIO12
GPIO0
GPIO2
GND
GPIO13
GPIO15
ESP32-WROVER-IE(pin-out)
Pin.38
GND
Pin.37
IO23
Pin.36
IO22
Pin.35
U0TXD
Pin.34
U0RXD
Pin.33
IO21
Pin.32
NC
Pin.31
IO19
Pin.30
IO18
Pin.29
IO5
Pin.28
NC
Pin.27
NC
Pin.26
IO4
Pin.25
IO0
Pin.24
IO2
Pin.23
IO15
Pin.22
NC
Pin.21
NC
Pin.20
NC
8 Peripheral Schematics
8 Peripheral Schematics
This is the typical application circuit of the module connected with peripheral components (for example, power
supply, antenna, reset button, JTAG interface, and UART interface).
U1
C2
R1
22uF
0.1uF
TBD
EN
SENSOR_VP
SENSOR_VN
IO34
IO35
IO32
IO33
IO25
IO26
IO27
IO14
IO12
C3
TBD
GND
IO13
GND
P_GND
GND3
IO23
IO22
TXD0
RXD0
IO21
NC
IO19
IO18
IO5
NC
NC
IO4
IO0
IO2
IO15
NC
NC
NC
GND1
3V3
EN
SENSOR_VP
SENSOR_VN
IO34
IO35
IO32
IO33
IO25
IO26
IO27
IO14
IO12
GND2
IO13
NC
NC
NC
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
22
21
20
GND
IO19
IO18
IO5
ESP32-WROVER-E/ESP32-WROVER-IE
1
2
3
4
1
2
3
4
UART
GND
GND
JP2
Boot Option
SW1
JP3
TMS
TDI
TCK
TDO
JP1
1
2
3
4
IO4
IO0
IO2
IO15
GND
IO14
IO12
IO13
IO15
VDD33
IO23
IO22
TXD0
RXD0
IO21
1
2
C1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
1
2
VDD33
R2
1
2
3
4
C4
JTAG
0R
EN
0.1uF
GND
IO12 should be kept low when the module is powered on.
Figure 9: Peripheral Schematics
Note:
• Soldering Pad 39 to the Ground of the base board is not necessary for a satisfactory thermal performance. If users
do want to solder it, they need to ensure that the correct quantity of soldering paste is applied.
• To ensure the power supply to the ESP32 chip during power-up, it is advised to add an RC delay circuit at the EN pin.
The recommended setting for the RC delay circuit is usually R = 10 kΩ and C = 1 µF. However, specific parameters
should be adjusted based on the power-up timing of the module and the power-up and reset sequence timing
of the chip. For ESP32’s power-up and reset sequence timing diagram, please refer to Section Power Scheme in
ESP32 Datasheet.
4
Espressif Systems
3
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2
9 Physical Dimensions
Espressif Systems
9 Physical Dimensions
Unit: mm
18.00±0.15
3.30±0.15
0.85
0.1
0.50
15.84
0.90
10.50
0.57
1.10
0.85
Top View
Side View
Figure 10: Physical Dimensions
Bottom View
16.16
0.50
23.05
24.09
3.70
3.72
0.90
3.70
10.45
1.27
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31.40±0.15
6.22
0.90
6.22
0.45
18
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0.80
2.25
10 Recommended PCB Land Pattern
10
Recommended PCB Land Pattern
Unit: mm
Via for thermal pad
Copper
6.22
18.00
Antenna Area
38x1.50
3.70
0.90
0.50
0.50
0.90
3.70
16.16
1.27
1.10
7.50
38
22.86
31.40
38x0.90
1
20
19
0.50
Figure 11: Recommended PCB Land Pattern
Espressif Systems
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11 Dimensions of External Antenna Connector
11
Dimensions of External Antenna Connector
Unit: mm
Figure 12: Dimensions of External Antenna Connector
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12 Product Handling
12
Product Handling
12.1
Storage Conditions
The products sealed in moisture barrier bags (MBB) should be stored in a non-condensing atmospheric
environment of < 40 °C and 90%RH. The module is rated at the moisture sensitivity level (MSL) of 3.
After unpacking, the module must be soldered within 168 hours with the factory conditions 25 ± 5 °C and 60
%RH. If the above conditions are not met, the module needs to be baked.
12.2
Electrostatic Discharge (ESD)
• Human body model (HBM): ±2000 V
• Charged-device model (CDM): ±500 V
12.3
Reflow Profile
Temperature (℃)
Solder the module in a single reflow.
Peak Temp.
235 ~ 250 ℃
250
Preheating zone
150 ~ 200 ℃
60 ~ 120 s
217
200
Reflow zone
217 ℃ 60 ~ 90 s
Cooling zone
–1 ~ –5 ℃/s
Soldering time
> 30 s
Ramp-up zone
1 ~ 3 ℃/s
100
50
25
Time (sec.)
0
0
50
100
150
200
250
Ramp-up zone — Temp.: 25 ~ 150 ℃ Time: 60 ~ 90 s Ramp-up rate: 1 ~ 3 ℃/s
Preheating zone — Temp.: 150 ~ 200 ℃ Time: 60 ~ 120 s
Reflow zone — Temp.: >217 ℃
60 ~ 90 s; Peak Temp.: 235 ~ 250 ℃ Time: 30 ~ 70 s
Cooling zone — Peak Temp. ~ 180 ℃ Ramp-down rate: –1 ~ –5 ℃/s
Solder — Sn-Ag-Cu (SAC305) lead-free solder alloy
Figure 13: Reflow Profile
Espressif Systems
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12 Product Handling
12.4
Ultrasonic Vibration
Avoid exposing Espressif modules to vibration from ultrasonic equipment, such as ultrasonic welders or
ultrasonic cleaners. This vibration may induce resonance in the in-module crystal and lead to its malfunction or
even failure. As a consequence, the module may stop working or its performance may deteriorate.
Espressif Systems
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13 Related Documentation and Resources
13
Related Documentation and Resources
Related Documentation
• ESP32 Series Datasheet – Specifications of the ESP32 hardware.
• ESP32 Technical Reference Manual – Detailed information on how to use the ESP32 memory and peripherals.
• ESP32 Hardware Design Guidelines – Guidelines on how to integrate the ESP32 into your hardware product.
• ESP32 ECO and Workarounds for Bugs – Correction of ESP32 design errors.
• Certificates
https://espressif.com/en/support/documents/certificates
• ESP32 Product/Process Change Notifications (PCN)
https://espressif.com/en/support/documents/pcns
• ESP32 Advisories – Information on security, bugs, compatibility, component reliability.
https://espressif.com/en/support/documents/advisories
• Documentation Updates and Update Notification Subscription
https://espressif.com/en/support/download/documents
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Espressif Systems
23
ESP32-WROVER-E & ESP32-WROVER-IE Datasheet v1.6
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Revision History
Revision History
Date
Version
Release notes
Added module variants embedded with ESP32-D0WDR2-V3 chip
Added Table 1: ESP32-WROVER-E Series Comparison and Table 2: ESP32-
2022-07-20
v1.6
WROVER-IE Series Comparison
Added Figure 6 and Table 6 in Section 3.3: Strapping Pins
Updated Section 13: Related Documentation and Resources
Replaced Espressif Product Ordering Information with ESP Product Selector
Updated the description of TWAI in Table 3
2022-02-22
v1.5
Added a link to RF certificates in Table 3
Updated Ordering Information Table
Updated Table 7
Fixed typos
2021-02-09
V1.4
Updated Figure 10: Physical Dimensions
Updated Figure 11: Recommended PCB Land Pattern
Updated the trade mark from TWAI™ to TWAI®
2021-02-02
V1.3
Modified the note below Figure 13: Reflow Profile
Deleted Reset Circuit and Discharge Circuit for VDD33 Rail in Section 8: Peripheral Schematics
Updated Figure 3.1: Pin Layout
2020-11-02
V1.2
Added a note to EPAD in Section 10: Recommended PCB Land Pattern
Updated the note to RC delay circuit in Section 8: Peripheral Schematics
Updated the following figures:
• Figure 1: ESP32-WROVER-E Block Diagram (with ESP32-D0WD-V3 embed-
2020-06-11
V1.1
ded)
• Figure 2: ESP32-WROVER-E Block Diagram (with ESP32-D0WDR2-V3 embedded)
2020-05-22
V1.0
Espressif Systems
Official release
24
ESP32-WROVER-E & ESP32-WROVER-IE Datasheet v1.6
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