FP6185
85T
300mA, Low Noise High PSRR
LDO Regulator
Description
Features
The FP6185 is a low dropout, low noise, high PSRR,
very low quiescent current positive linear regulator.
The FP6185 can supply 300mA output current with
low dropout voltage at about 400mV that optimized
for battery-powered systems or portable wireless
devices such as mobile phones. The shutdown
function can provide remote control for the external
signal to decide the on/off state of FP6185 that
consumes less than 0.1µA during shutdown mode.
The FP6185 regulator is able to operate with output
capacitors as small as 1µF for stability. Other than
the current limit protection, FP6185 also offers the
on chip thermal shutdown feature providing
protection against overload or any condition when
the ambient temperature exceeds the maximum
junction temperature.
Low VIN and Wide VIN Range: 2V to 5.5V
Guarantee Output Current 300mA
2% Output Voltage Accuracy
Output Noise 65μVrms from 10Hz to 100kHz
VOUT Fixed 1.1V to 3.3V
Low Dropout Voltage of 400mV at 300mA
Ripple Rejection 70dB at 10kHz
Very Low Quiescent Current at 35µA
Needs Only 1µF Capacitor for Stability
Thermal Shutdown Protection
Current Limit Protection
Miniature Packages:
SOT-23-5, UTDFN-4L (1mm×1mm)
RoHS Compliant
Applications
The FP6185 offers high precision output voltage of
2%.The FP6185 is available in SOT-23-5 and
UTDFN – 4L (1mmx1mm) packages which features
small size.
Pin Assignment
Ordering Information
PDAs, Mobile phones, GPS, Smartphones
Wireless Handsets, Wireless LAN, Bluetooth® ,
Zigbee®
Portable Medical Equipment
Other Battery Powered Applications
FP6185-□□
S5 Package (SOT-23-5)
VOUT
Package Type
S5: SOT-23-5
X6: UTDFN-4L
NC
5
4
(Marking)
1
2
3
Output Voltage
VIN GND SHDN
X6 Package (UTDFN-4L)(1mmx1mm) (Top view)
VIN
SHDN
3
4
UTDFN-4L Marking
Part Number
Product
Code
FP6185-
EP
1
VOUT
2
GND
Figure 1. Pin Assignment of FP6185
FP6185-Preliminary-0.2-Jan-2017
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FP6185
85T
Typical Application Circuit
VIN
VIN
CIN
1µF
GND
VSHDN
VOUT
VOUT
COUT
1µF
FP6185
SHDN
NC
Figure 2. Typical Application Circuit of FP6185
Note 2: To prevent oscillation, it is recommended to use minimum 1µF X7R or X5R dielectric capacitors if ceramics are used as
input/output capacitors.
Functional Pin Description
PIN NUMBER
PIN NAME
SOT-23-5
UTDFN-4L
1
4
VIN
5
1
VOUT
4
-
NC
2
2
GND
3
3
FUNCTIONS
Power is supplied to this device from this pin which is required an input filter capacitor. In
general, the input capacitor in the range of 1µ F to 10µ F is sufficient.
The FP6185 is stable with an output capacitor 1µF or greater. The larger output capacitor will
be required for application with larger load transients. The large output capacitor could
reduce output noise, improve stability and PSRR.
No connection
Common ground pin
Pull this pin high to enable IC, pull this pin low to shutdown IC.
shutdown due to the built-in pull-low resistor.
Floating this pin will be
Block Diagram
RSEN
PMOS
VIN
VOUT
Current
Limit
SHDN
Power
Shutdown
_
Error
Amp
R1
+
5MΩ
Thermal
Shutdown
Vref
R2
GND
Figure 3. Block Diagram of FP6185
FP6185-Preliminary-0.2-Jan-2017
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FP6185
Absolute Maximum Ratings (Note 1)
85T
● Supply Voltage VIN ----------------------------------------------------------------------------------------- -0.3V to +6.5V
● EN Voltage VEN --------------------------------------------------------------------------------------------- -0.3V to VIN+0.3V
● Power Dissipation @ TA=25°C & TJ=125°C (PD)
SOT23-5 ----------------------------------------------------------------------------------------- 0.4W
UTDFN-4L(1mmx1mm)----------------------------------------------------------------------- TBD
● Package Thermal Resistance (θJA)
(Note 2)
SOT23-5 ----------------------------------------------------------------------------------------- +250°C/W
UTDFN-4L(1mmx1mm)----------------------------------------------------------------------- TBD
● Package Thermal Resistance (θJC)
SOT23-5 ----------------------------------------------------------------------------------------- +130°C/W
UTDFN-4L(1mmx1mm)----------------------------------------------------------------------- TBD
● Lead Temperature (Soldering, 10sec.) --------------------------------------------------------------- 260°C
● Junction Temperature (TJ) ------------------------------------------------------------------------------- -40°C to +150°C
● Storage Temperature (TSTG) ----------------------------------------------------------------------------- -65°C to +150°C
Note 1:Stresses beyond this listed under “Absolute Maximum Ratings" may cause permanent damage to the device.
Note 2:θJA is measured at 25°C ambient with the component mounted on a high effective thermal conductivity 4-layer board of
JEDEC-51-7. The thermal resistance greatly varies with layout, copper thickness, number of layers and PCB size.
Recommended Operating Conditions
● VIN Supply Voltage ---------------------------------------------------------------------------------------- +2V to +5.5V
● Output Current (IOUT) -------------------------------------------------------------------------------------- 0mA to 300mA
● Operating Temperature Range (TOPR) ---------------------------------------------------------------- -40°C to +85°C
● Operating Junction Temperature Range (TJ) -------------------------------------------------------- -40°C to +125°C
FP6185-Preliminary-0.2-Jan-2017
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FP6185
85T
Electrical Characteristics
(VIN=VOUT+1V,
pin connected to VIN, CIN=1µF, COUT=1µF, TA=25ºC, unless otherwise specified)
Parameter
Symbol
Input Voltage Range
VIN
Current Limit
Quiescent Current
Standby Current
RLoad=1Ω
IQ
IOUT=0mA
VOUT
Dropout Voltage (Note 4)
VDROP
Dropout Voltage (Note 4)
VDROP
V
mA
0.1
-2
µA
1
µA
+2
%
VOUT=1.2V
1950
2300
VOUT=1.5V
1600
1920
VOUT=1.8V
1450
1750
VOUT=2.5V
980
1170
VOUT=2.7V
630
760
VOUT=3.0V
510
610
VOUT=3.3V
400
480
VOUT=1.2V
650
767
VOUT=1.5V
533
640
VOUT=1.8V
483
583
VOUT=2.5V
327
390
VOUT=2.7V
210
253
VOUT=3.0V
170
203
VOUT=3.3V
133
160
mV
mV
1
8
mV
VLOAD
IOUT=0mA to 150mA
6
30
mV
PSRR
(Note 6)
VNOISE
Temperature Coefficient
TC
(Note 6)
VIN=VOUT+1V,
fRIPPLE = 10kHz
COUT=1μF, IOUT=0mA
BW=10Hz ~ 100KHz
IOUT=1mA, VIN=5V
TSD
Thermal Shutdown Threshold
(Note 6)
TSD
Hysteresis
Pin Current
Pin Threshold
5.5
35
IOUT=1mA
IOUT=100mA
Unit
300
Pin Connected to GND
IOUT=300mA
Max
IOUT=1mA, VIN=VOUT +1V to 5V
Ripple Rejection (Note 6)
Output Noise Voltage
Typ
VLINE
Line Regulation
(Note 5)
Min
2
ILIMIT
ISTBY
Output Voltage Accuracy
Load Regulation
Conditions
V
(
Start-up
V
( FF
Shutdown
70
dB
65
μVRMS
100
ppm/ºC
145
ºC
25
ºC
0.3
uA
1.0
V
0.4
V
Note 4: The dropout voltage is defined as VIN-VOUT, which is measured when VOUT drops 2% of its normal value with the specified output
current.
Note 5: Load regulation and dropout voltage are measured at a constant junction temperature by using a 40ms low duty cycle current pulse.
Note 6: Guarantee by design.
FP6185-Preliminary-0.2-Jan-2017
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FP6185
85T
Application Information
The FP6185 is a low dropout linear regulator that
could provide 300mA output current at dropout
voltage about 400mV. Current limit and on chip
thermal shutdown features provide protection
against any combination of overload or ambient
temperature that could exceed maximum junction
temperature.
1. Output and Input Capacitor
The FP6185 regulator is designed to be stable with a
wide range of output capacitors. The ESR of the
output capacitor affects stability. Larger value of the
output capacitor decreases the peak deviations and
improves transient response for larger current
changes.
The capacitor types (aluminum, ceramic, and
tantalum) have different characterizations such as
temperature and voltage coefficients. All ceramic
capacitors are manufactured with a variety of
dielectrics, each with different behavior across
temperature and applications. Common dielectrics
used are X5R, X7R and Y5V. It is recommended to
use 1µF to 10µF X5R or X7R dielectric ceramic
capacitors with 30m to 50m ESR range between
device outputs and ground for stability.
The
FP6185 is designed to be stable with low ESR
ceramic capacitors and higher values of capacitors
and ESR could improve output stability. The ESR of
output capacitor is very important because it
generates a zero to provide phase lead for loop
stability.
2. Protection Features
In order to prevent overloading or thermal condition
from damaging the device, FP6185 has internal
thermal and current limiting functions designed to
protect the device. It will rapidly shut off PMOS
pass element during over-temperature condition.
3. Thermal Consideration
The power handling capability of the device will be
limited by allowable operation junction temperature
(125ºC). The power dissipated by the device will
be estimated by PD=IOUT(VIN-VOUT). The power
dissipation should be lower than the maximum
power dissipation listed in “Absolute Maximum
Ratings” section.
4. Shutdown Operation
The FP6185 is shutdown by pulling the
input low, and turned on by driving the
high.
If
pin floating, the FP6185 will shut down
because
pin has built-in a pull low resistor
(refer to Block Diagram).
There are no requirements for the ESR on the input
capacitor, but its voltage and temperature coefficient
have to be considered for device application
environment.
FP6185-Preliminary-0.2-Jan-2017
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FP6185
85T
Outline Information
SOT-23-5 Package (Unit: mm)
SYMBOLS
UNIT
A
DIMENSION IN MILLIMETER
MIN
MAX
0.90
1.45
A1
0.00
0.15
A2
0.90
1.30
B
0.30
0.50
D
2.80
3.00
E
2.60
3.00
E1
1.50
1.70
e
0.90
1.00
e1
1.80
2.00
L
0.30
0.60
Note:Followed From JEDEC MO-178-C.
Carrier Dimensions
FP6185-Preliminary-0.2-Jan-2017
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FP6185
85T
Outline Information (Continued)
UTDFN- 4L 1.0mm x 1.0mm (pitch 0.65 mm) Package (Unit: mm)
SYMBOLS
UNIT
A
A1
DIMENSION IN MILLIMETER
MIN
MAX
0.340
0.400
0.00
A3
0.050
0.102REF
D
0.950
1.050
E
0.950
1.050
D1
0.430
0.530
E1
0.430
k
b
0.180
e
L
0.530
0.211REF
0.280
0.650TYP
0.200
0.300
Note:Followed From JEDEC 664-1
Carrier Dimensions
Life Support Policy
Fitipower’s products are not authorized for use as critical components in life support devices or other medical systems.
FP6185-Preliminary-0.2-Jan-2017
7
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