TXB0104
SCES650J – APRIL 2006 – REVISED OCTOBER 2020
TXB0104 4-Bit Bidirectional Voltage-Level Translator With Automatic Direction
Sensing and ±15-kV ESD Protection
1 Features
3 Description
•
This TXB0104 4-bit noninverting translator uses two
separate configurable power-supply rails. The A port
is designed to track VCCA. VCCA accepts any supply
voltage from 1.2 V to 3.6 V. The B port is designed
to track VCCB. VCCB accepts any supply voltage from
1.65 V to 5.5 V. This allows for universal low-voltage
bidirectional translation between any of the 1.2-V, 1.5V, 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes. VCCA
must not exceed VCCB.
•
•
•
•
•
•
1.2-V to 3.6-V on A port and 1.65-V to 5.5-V
on B port (VCCA ≤ VCCB)
VCC isolation feature: if either VCC input ss at GND,
all outputs are in the high-impedance state
Output enable (OE) input circuit referenced to
VCCA
Low power consumption, 5-μA maximum ICC
I OFF supports partial power-down mode operation
Latch-up Performance Exceeds 100 mA Per JESD
78, Class II
ESD Protection Exceeds JESD 22
– A Port:
• 2500-V Human-Body Model (A114-B)
• 1500-V Charged-Device Model (C101)
– B Port:
• ±15-kV Human-Body Model (A114-B)
• 1500-V Charged-Device Model (C101)
2 Applications
•
•
•
•
Headsets
Smartphones
Tablets
Desktop PC
When the OE input is low, all outputs are placed in the
high-impedance state. To ensure the high-impedance
state during power up or power down, OE must
be tied to GND through a pulldown resistor The
current sourcing capability of the driver determines
the minimum value of the resistor.
The TXB0104 device is designed so the OE input
circuit is supplied by VCCA.
This device is fully specified for partial powerdown applications using I OFF. The I OFF circuitry
disables the outputs, which prevents damaging
current backflow through the device when the device
is powered down.
Device Information
(1)PART
NUMBER
PACKAGE
BODY SIZE (NOM)
TXB0104RUT
UQFN (12)
2.00 mm × 1.70 mm
TXB0104D
SOIC (14)
8.65 mm × 3.91 mm
TXB0104ZXU/GXU
BGA MICROSTAR
JUNIOR™ (12)
2.00 mm × 2.50 mm
TXB0104PW
TSSOP (14)
5.00 mm × 4.40 mm
TXB0104RGY
VQFN (14)
3.50 mm × 3.50 mm
TXB0104YZT
DSBGA (12)
1.40 mm × 1.90 mm
TXB0104NMN
NFBGA (12)
2.00 mm × 2.50 mm
(1)
For all available packages, see the orderable addendum at
the end of the data sheet.
VCCA
Processor
VCCB
Peripheral
Typical Application Block Diagram for TXB010X
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
TXB0104
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SCES650J – APRIL 2006 – REVISED OCTOBER 2020
Table of Contents
1 Features............................................................................1
2 Applications..................................................................... 1
3 Description.......................................................................1
4 Revision History.............................................................. 2
5 Pin Configuration and Functions...................................3
6 Specifications.................................................................. 5
6.1 Absolute Maximum Ratings........................................ 5
6.2 ESD Ratings............................................................... 5
6.3 Recommended Operating Conditions.........................6
6.4 Thermal Information....................................................6
6.5 Electrical Characteristics.............................................7
6.6 Timing Requirements: VCCA = 1.2 V........................... 8
6.7 Timing Requirements: VCCA = 1.5 V ± 0.1 V............... 8
6.8 Timing Requirements: VCCA = 1.8 V ± 0.15 V............. 8
6.9 Timing Requirements: VCCA = 2.5 V ± 0.2 V............... 8
6.10 Timing Requirements: VCCA = 3.3 V ± 0.3 V............. 8
6.11 Switching Characteristics: VCCA = 1.2 V................... 9
6.12 Switching Characteristics: VCCA = 1.5 V ± 0.1 V.......9
6.13 Switching Characteristics: VCCA = 1.8 V ± 0.15 V...10
6.14 Switching Characteristics: VCCA = 2.5 V ± 0.2 V.....10
6.15 Switching Characteristics: VCCA = 3.3 V ± 0.3 V..... 11
6.16 Operating Characteristics: VCCA = 1.2 V to 1.5
V, VCCB = 1.5 V to 1.8 V.............................................. 12
6.17 Operating Characteristics: VCCA = 1.8 V to 3.3
V, VCCB = 1.8 V to 5 V................................................. 12
6.18 Typical Characteristics............................................ 13
7 Parameter Measurement Information.......................... 14
8 Detailed Description......................................................16
8.1 Overview................................................................... 16
8.2 Functional Block Diagram......................................... 16
8.3 Feature Description...................................................17
8.4 Device Functional Modes..........................................19
9 Application and Implementation.................................. 20
9.1 Application Information............................................. 20
9.2 Typical Application.................................................... 20
10 Power Supply Recommendations..............................22
11 Layout........................................................................... 22
11.1 Layout Guidelines................................................... 22
11.2 Layout Example...................................................... 22
12 Device and Documentation Support..........................23
12.1 Receiving Notification of Documentation Updates..23
12.2 Support Resources................................................. 23
12.3 Trademarks............................................................. 23
12.4 Electrostatic Discharge Caution..............................23
12.5 Glossary..................................................................23
13 Mechanical, Packaging, and Orderable
Information.................................................................... 23
4 Revision History
NOTE: Page numbers for previous revisions may differ from page numbers in the current version.
Changes from Revision I (March 2018) to Revision J (October 2020)
Page
• Updated the numbering format for tables, figures, and cross-references throughout the document..................1
• Added NMN Package, 12-Pin NFBGA pinout drawing in Pin Configuration and Functions section...................3
Changes from Revision H (January 2018) to Revision I (March 2018)
Page
• Updated Pin Functions table ..............................................................................................................................3
• Added Pin Assignments table for YZT package ................................................................................................ 3
• Added Pin Assignments table for GXU and ZXU package ................................................................................ 3
• Updated Layout Example ................................................................................................................................ 22
Changes from Revision G (November 2014) to Revision H (January 2018)
Page
• Added Package, families to Package, pinout drawings in Pin Configuration and Functions section .................3
• Added junction temperature range in Absolute Maximum Ratingstable............................................................. 5
• Changed unit from V to kV in ESD Ratings table............................................................................................... 5
Changes from Revision F (May 2012) to Revision G (November 2014)
Page
• Added Pin Configuration and Functions section, Handling Rating table, Feature Description section, Device
Functional Modes, Application and Implementation section, Power Supply Recommendations section, Layout
section, Device and Documentation Support section, and Mechanical, Packaging, and Orderable Information
section ............................................................................................................................................................... 1
2
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SCES650J – APRIL 2006 – REVISED OCTOBER 2020
5 Pin Configuration and Functions
A
B C
A
4
4
3
3
2
2
1
1
Figure 5-1. GXU and ZXU Package, 12-Pin BGA
Microstar Junior (Top View)
B C
Figure 5-2. NMN Package, 12-Pin NFBGA (Top
View)
3 2 1
D
C
B
A
PLACEHOLDER
Figure 5-3. YZT Package, 12-Pin DSBGA (Top View)
VCCA
1
14
VCCB
A1
2
13
B1
A2
3
12
B2
A3
4
11
B3
A4
5
10
B4
NC
GND
6
9
7
8
NC
OE
NC − No internal connection
14
OE
VCCB
1
VCCA
13 B1
2
3
4
5
6
1
12
11 VCCB
A1 2
10 B1
11 B3
A2 3
9 B2
10 B4
A3 4
8 B3
12 B2
Exposed
Center
Pad
8
A4 5
6
7 B4
GND
7
OE
9 NC
GND
A1
A2
A3
A4
NC
VCCA
Figure 5-4. D or PW Package, 14-Pin SOIC or
TSSOP (Top View)
Figure 5-6. RUT Package, 12-Pin UQFN (Top View)
NC − No internal connection
Figure 5-5. RGY Package, 14-Pin VQFN With
Exposed Thermal Pad (Top View)
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Table 5-1. Pin Functions
PIN
D, PW
RGY
RUT
GXU,
ZXU,
NMN
YZT
A1
2
2
2
A1
A3
I/O
Input/output 1. Referenced to VCCA.
A2
3
3
3
A2
B3
I/O
Input/output 2. Referenced to VCCA.
A3
4
4
4
A3
C3
I/O
Input/output 3. Referenced to VCCA.
A4
5
5
5
A4
D3
I/O
Input/output 4. Referenced to VCCA.
B1
13
13
10
C1
A1
I/O
Input/output 1. Referenced to VCCB.
B2
12
12
9
C2
B1
I/O
Input/output 2. Referenced to VCCB.
NAME
I/O
DESCRIPTION
B3
11
11
8
C3
C1
I/O
Input/output 3. Referenced to VCCB.
B4
10
10
7
C4
D1
I/O
Input/output 4. Referenced to VCCB.
GND
7
7
6
B4
D2
—
Ground
NC
6, 9
6,9
—
—
—
—
No connection. Not internally connected.
OE
8
8
12
B3
C2
I
Tri-state output-mode enable. Pull OE low to place all outputs
in tri-state mode. Referenced to VCCA.
VCCA
1
1
1
B2
B2
—
A-port supply voltage 1.2 V ≤ VCCA ≤ 3.6 V and VCCA ≤ VCCB.
VCCB
14
14
11
B1
A2
—
B-port supply voltage 1.65 V ≤ VCCB ≤ 5.5 V.
Thermal
pad
—
—
—
—
—
For the RGY package, the exposed center thermal pad must
either be connected to Ground or left electrically open.
Table 5-2. Pin Assignments: NMN, GXU and ZXU Package
A
B
C
4
A4
GND
B4
3
A3
OE
B3
2
A2
VCCA
B2
1
A1
VCCB
B1
Table 5-3. Pin Assignments: YZT Package
4
3
2
1
D
A4
GND
B4
C
A3
OE
B3
B
A2
VCCA
B2
A
A1
VCCB
B1
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted)
(1)
MIN
MAX
Supply voltage, VCCA
–0.5
4.6
Supply voltage, VCCB
–0.5
6.5
A port
–0.5
4.6
B port
–0.5
6.5
A port
–0.5
4.6
B port
-0.5
6.5
A port
–0.5
VCCA + 0.5
B port
–0.5
VCCB + 0.5
Input voltage, VI
Voltage applied to any output in the high-impedance or power-off
state, VO
Voltage applied to any output in the high or low state, VO (2)
UNIT
V
V
V
V
Input clamp current, IIK
VI < 0
–50
mA
Output clamp current, IOK
VO < 0
–50
mA
Continuous output current, IO
–50
50
mA
Continuous current through VCCA, VCCB, or GND
–100
100
mA
150
°C
150
°C
Junction temperature range, TJ
Storage temperature range, Tstg
(1)
(2)
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Section 6.3 is not implied.
Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
The value of VCCA and VCCB are provided in the recommended operating conditions table.
6.2 ESD Ratings
VALUE
JS-001(1)
A port
±2.5
Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1)
B port
±15
JESD22-C101(2)
A port
±1.5
Charged-device model (CDM), per JEDEC specification JESD22-C101(2)
B port
±1.5
Human-body model (HBM), per ANSI/ESDA/JEDEC
V(ESD)
(1)
(2)
Electrostatic
discharge
Charged-device model (CDM), per JEDEC specification
UNIT
kV
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
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6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)(1) (2)
MIN
MAX
VCCA Supply voltage
1.2
3.6
VCCB Supply voltage
1.65
5.5
VCCI × 0.65(3)
VCCI
VCCA × 0.65
5.5
Data VCCA = 1.2 V to 5.5 V
inputs VCCB = 1.65 V to 5.5 V
0
VCCI × 0.35(3)
VCCA = 1.2 V to 3.6 V
VCCB = 1.65 V to 5.5 V
0
VCCA × 0.35
0
3.6
0
5.5
VIH
High-level input voltage
Data VCCA = 1.2 V to 3.6 V
inputs VCCB = 1.65 V to 5.5 V
OE
VIL
Low-level input voltage
OE
Input transition
Δt/Δv
rise or fall rate
TA
(1)
(2)
(3)
V
V
A-port VCCA = 1.2 V to 3.6 V
inputs VCCB = 1.65 V to 5.5 V
B-port
VCCA = 1.2 V to 3.6 V
inputs
V
V
VCCA = 1.2 V to 3.6 V
VCCB = 1.65 V to 5.5 V
V
= 1.2 V to 3.6 V
A-port CCA
Voltage applied to any
VCCB = 1.65 V to 5.5 V
output in the high-impedance
V
= 1.2 V to 3.6 V
or power-off state
B-port CCA
VCCB = 1.65 V to 5.5 V
VO
UNIT
40
VCCB = 1.65 V to 3.6 V
40
VCCB = 4.5 V to 5.5 V
30
Operating free-air temperature
–40
ns/V
85
°C
The A and B sides of an unused data I/O pair must be held in the same state, that is, both at VCCI or both at GND.
VCCA must be less than or equal to VCCB and must not exceed 3.6 V.
VCCI is the supply voltage associated with the input port.
6.4 Thermal Information
TXB0104
THERMAL METRIC(1)
GXU/ZXU
PW
RGY
RUT
YZT
NMN
14 PINS
12 PINS
14 PINS
14 PINS
12 PINS
12 PINS
12 PINS
RθJA
Junction-to-ambient thermal
resistance
90.7
127.1
121.0
52.8
119.8
89.2
134.3
Rθ
Junction-to-case (top) thermal
resistance
50.5
92.8
50.0
67.7
42.6
0.9
90.7
RθJB
Junction-to-board thermal
resistance
45.4
62.2
62.8
28.9
52.5
14.4
88.4
ψJT
Junction-to-top characterization
parameter
14.7
2.3
6.4
2.6
0.7
3.0
4.3
ψJB
Junction-to-board
characterization parameter
45.1
62.2
62.2
29.0
52.3
14.4
89.3
Rθ
Junction-to-case (bottom)
thermal resistance
─
─
─
─
─
─
─
JC(top)
JC(bot)
(1)
6
D
UNIT
°C/W
For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report.
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6.5 Electrical Characteristics
over recommended operating free-air temperature range (unless otherwise noted)
PARAMETER(1) (2)
TEST CONDITIONS
VCCA
VCCB
IOH = –20 μA
VOLA
Port A output
low voltage
IOL = 20 μA
VOHB
Port B output
high voltage
IOH = –20 μA
1.65 V to 5.5 V
VOLB
Port B output
low voltage
IOL = 20 μA
1.65 V to 5.5 V
II
Inflection-point OE:
current
VI = VCCI or GND
Ioff
Off-state
current
ICCA
ICCB
VCCA supply
current
VCCB supply
current
MAX
MIN
MAX
1.4 V to 3.6 V
1.2 V
0.3
1.4 V to 3.6 V
0.4
VCCB – 0.4
0.4
V
μA
–1
1
–2
2
A port:
VI or VO = 0 to 3.6 V
0V
0 V to 5.5 V
–1
1
–2
2
B port:
VI or VO = 0 to 5.5 V
0 V to 3.6 V
0V
–1
1
–2
2
1.2 V to 3.6 V
1.65 V to 5.5 V
–1
1
–2
2
1.2 V
1.65 V to 5.5 V
1.4 V to 3.6 V
1.65 V to 5.5 V
5
3.6 V
0V
2
VI = VCCI or GND
IO = 0
VI = VCCI or GND
IO = 0
ICCZA
HighVI = VCCI or GND
impedance
IO = 0,
state, VCCA
OE = GND
supply current
ICCZB
HighVI = VCCI or GND
impedance
IO = 0,
state, VCCB
OE = GND
supply current
Ci
Input
capacitance
Cio
Input-to-output A port
internal
B port
capacitance
OE
V
V
1.65 V to 5.5 V
A or B port:
OE = GND
UNIT
V
VCCA – 0.4
1.2 V to 3.6 V
ICCA + Combined
VI = VCCI or GND
ICCB supply current IO = 0
(1)
(2)
TYP
–40°C to 85°C
1.1
Port A output
high voltage
IOZ
MIN
1.2 V
VOHA
Highimpedancestate output
current
TA = 25°C
μA
μA
0.06
0V
5.5 V
1.2 V
1.65 V to 5.5 V
1.4 V to 3.6 V
1.65 V to 5.5 V
5
3.6 V
0V
–2
μA
–2
3.4
0V
5.5 V
1.2 V
1.65 V to 5.5 V
1.4 V to 3.6 V
1.65 V to 5.5 V
1.2 V
1.65 V to 5.5 V
1.4 V to 3.6 V
1.65 V to 5.5 V
1.2 V
1.65 V to 5.5 V
1.4 V to 3.6 V
1.65 V to 5.5 V
1.2 V to 3.6 V
1.65 V to 5.5 V
3
4
1.2 V to 3.6 V
1.65 V to 5.5 V
5
6
1.2 V to 3.6 V
1.65 V to 5.5 V
11
14
μA
2
3.5
10
μA
0.05
5
μA
3.3
5
μA
pF
pF
VCCI is the supply voltage associated with the input port.
VCCO is the supply voltage associated with the output port.
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6.6 Timing Requirements: VCCA = 1.2 V
TA = 25°C, VCCA = 1.2 V
VCCB = 1.8 V
MIN
TYP
Data rate
tw
Pulse duration
Data inputs
VCCB = 2.5 V
MAX
MIN
TYP
MAX
VCCB = 3.3 V
MIN
VCCB = 5 V
TYP MAX
MIN
TYP MAX
UNIT
20
20
20
20
Mbps
50
50
50
50
ns
6.7 Timing Requirements: VCCA = 1.5 V ± 0.1 V
over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (unless otherwise noted)
VCCB = 1.8 V
± 0.15 V
MIN
MAX
Data rate
tw
Pulse duration
VCCB = 2.5 V
± 0.2 V
MIN
MAX
40
Data inputs
VCCB = 3.3 V
± 0.3 V
MIN
40
25
25
VCCB = 5 V
± 0.5 V
MAX
MIN
40
40
25
UNIT
MAX
25
Mbps
ns
6.8 Timing Requirements: VCCA = 1.8 V ± 0.15 V
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (unless otherwise noted)
VCCB = 1.8 V
± 0.15 V
MIN
MAX
Data rate
tw
Pulse duration
VCCB = 2.5 V
± 0.2 V
MIN
MAX
60
Data inputs
VCCB = 3.3 V
± 0.3 V
MIN
60
17
VCCB = 5 V
± 0.5 V
MAX
MIN
60
17
60
17
UNIT
MAX
17
Mbps
ns
6.9 Timing Requirements: VCCA = 2.5 V ± 0.2 V
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (unless otherwise noted)
VCCB = 2.5 V
± 0.2 V
MIN
MAX
Data rate
tw
Pulse duration Data inputs
VCCB = 3.3 V
± 0.3 V
MIN
100
10
MAX
VCCB = 5 V
± 0.5 V
MIN
100
10
UNIT
MAX
100
10
Mbps
ns
6.10 Timing Requirements: VCCA = 3.3 V ± 0.3 V
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (unless otherwise noted)
VCCB = 3.3 V
± 0.3 V
MIN
Data rate
tw
8
Pulse duration
MAX
VCCB = 5 V
± 0.5 V
MIN
100
Data inputs
10
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10
UNIT
MAX
Mbps
ns
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6.11 Switching Characteristics: VCCA = 1.2 V
TA = 25°C, VCCA = 1.2 V
PARAMETER
TEST
CONDITIONS
VCCB = 1.8 V
MIN
TYP
VCCB = 2.5 V
MAX
MIN
TYP
VCCB = 3.3 V
MAX
MIN
TYP
VCCB = 5 V
MAX
MIN
TYP
MAX
UNIT
A-to-B
6.9
5.7
5.3
5.5
B-to-A
7.4
6.4
6
5.8
OE-to-A
1
1
1
1
OE-to-B
1
1
1
1
OE-to-A
18
15
14
14
OE-to-B
20
17
16
16
Input rise
trA, tfA time, input
fall time
A-port rise
and fall times
4.2
4.2
4.2
4.2
ns
Input rise
trB, tfB time, input
fall time
B-port rise
and fall times
2.1
1.5
1.2
1.1
ns
Channel-tochannel skew
0.4
0.5
0.5
1.4
ns
tpd
Propagation
delay time
ten
Enable time
tdis
Disable time
tSK(O)
Skew (time),
output
Maximum
data rate
20
20
20
ns
µs
ns
20
Mbps
6.12 Switching Characteristics: VCCA = 1.5 V ± 0.1 V
over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (unless otherwise noted)
PARAMETER
tpd
Propagation
delay time
ten
Enable time
tdis
Disable time
TEST
CONDITIONS
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
MIN
MAX
MIN
MAX
MIN
A-to-B
1.4
12.9
1.2
10.1
B-to-A
0.9
14.2
0.7
12
VCCB = 5 V
± 0.5 V
UNIT
MAX
MIN
MAX
1.1
10
0.8
9.9
0.4
11.7
0.3
13.7
OE-to-A
1
1
1
1
OE-to-B
1
1
1
1
ns
µs
OE-to-A
5.9
31
5.7
25.9
5.6
23
5.7
22.4
OE-to-B
5.4
30.3
4.9
22.8
4.8
20
4.9
19.5
Input rise
trA, tfA time, input
fall time
A-port
rise and
fall times
1.4
5.1
1.4
5.1
1.4
5.1
1.4
5.1
ns
Input rise
trB, tfB time, input
fall time
B-port
rise and
fall times
0.9
4.5
0.6
3.2
0.5
2.8
0.4
2.7
ns
0.5
ns
tSK(O)
Skew (time),
output
Maximum
data rate
Channel-tochannel skew
0.5
40
0.5
40
0.5
40
40
ns
Mbps
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6.13 Switching Characteristics: VCCA = 1.8 V ± 0.15 V
over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (unless otherwise noted)
PARAMETER
TEST
CONDITIONS
tpd
Propagation A-to-B
delay time B-to-A
ten
Enable time
tdis
Disable
time
VCCB = 1.8 V
± 0.15 V
VCCB = 2.5 V
± 0.2 V
VCCB = 3.3 V
± 0.3 V
VCCB = 5 V
± 0.5 V
MIN
MAX
MIN
MAX
MIN
MAX
MIN
MAX
1.6
11
1.4
7.7
1.3
6.8
1.2
6.5
1.5
12
1.3
8.4
1
7.6
0.9
7.1
OE-to-A
1
1
1
1
OE-to-B
1
1
1
1
UNIT
ns
µs
OE-to-A
5.9
31
5.1
21.3
5
19.3
5
17.4
OE-to-B
5.4
30.3
4.4
20.8
4.2
17.9
4.3
16.3
Input rise
trA, tfA time, input
fall time
A-port
rise and
fall times
1
4.2
1.1
4.1
1.1
4.1
1.1
4.1
ns
Input rise
trB, tfB time, input
fall time
B-port
rise and
fall times
0.9
3.8
0.6
3.2
0.5
2.8
0.4
2.7
ns
0.5
ns
Skew
(time),
output
tSK(O)
Channel-tochannel skew
Maximum
data rate
0.5
0.5
60
0.5
60
60
60
ns
Mbps
6.14 Switching Characteristics: VCCA = 2.5 V ± 0.2 V
over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (unless otherwise noted)
PARAMETER
TEST
CONDITIONS
VCCB = 2.5 V ± 0.2 V
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
MIN
MAX
MIN
MAX
MIN
MAX
1.1
6.3
1
5.2
0.9
4.7
1.2
6.6
1.1
5.1
0.9
4.4
UNIT
tpd
Propagatio A-to-B
n delay
B-to-A
time
ten
Enable
time
OE-to-A
1
1
1
OE-to-B
1
1
1
tdis
Disable
time
OE-to-A
5.1
21.3
4.6
15.2
4.6
13.2
OE-to-B
4.4
20.8
3.8
16
3.9
13.9
trA, tfA
Input rise A-port
time, input rise and
fall time
fall times
0.8
3
0.8
3
0.8
3
ns
trB, tfB
Input rise B-port
time, input rise and
fall time
fall times
0.7
2.6
0.5
2.8
0.4
2.7
ns
tSK(O)
Skew
(time),
output
0.5
ns
Channel-tochannel skew
Maximum
data rate
10
0.5
100
0.5
100
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μs
ns
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6.15 Switching Characteristics: VCCA = 3.3 V ± 0.3 V
over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (unless otherwise noted)
PARAMETER
TEST
CONDITIONS
tpd
Propagation A-to-B
delay time
B-to-A
ten
Enable time
tdis
Disable time
trA, tfA
VCCB = 3.3 V ± 0.3 V
VCCB = 5 V ± 0.5 V
MIN
MAX
MIN
MAX
0.9
4.7
0.8
4
1
4.9
0.9
3.8
OE-to-A
1
1
OE-to-B
1
1
UNIT
ns
μs
OE-to-A
4.6
15.2
4.3
12.1
OE-to-B
3.8
16
3.4
13.2
Input rise
time, input
fall time
A-port
rise and
fall times
0.7
2.5
0.7
2.5
ns
trB, tfB
Input rise
time, input
fall time
B-port
rise and
fall times
0.5
2.1
0.4
2.7
ns
tSK(O)
Skew (time), Channel-to-channel
output
skew
0.5
ns
Maximum
data rate
0.5
100
100
ns
Mbps
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6.16 Operating Characteristics: VCCA = 1.2 V to 1.5 V, VCCB = 1.5 V to 1.8 V
TA = 25°C
PARAMETER
CpdA
CpdB
CpdA
CpdB
Power
dissipation
capacitance
Power
dissipation
capacitance
Power
dissipation
capacitance
Power
dissipation
capacitance
VCCA = 1.2 V, VCCB =1.5 V
TEST CONDITIONS
CL = 0
f = 10 MHz
tr = tf = 1 ns
OE = VCCA
(outputs
enabled)
CL = 0
f = 10 MHz
tr = tf = 1 ns
OE = GND
(outputs
disabled)
MIN
TYP
VCCA = 1.2 V, VCCB = 1.8 V
MAX
MIN
TYP
VCCA = 1.5 V, VCCB = 1.8 V
MAX
MIN
TYP
A-port input,
B-port output
7.8
10
9
B-port input,
A-port output
12
11
11
A-port input,
B-port output
38.1
28
28
B-port input,
A-port output
25.4
19
18
A-port input,
B-port output
0.01
0.01
0.01
B-port input,
A-port output
0.01
0.01
0.01
A-port input,
B-port output
0.01
0.01
0.01
B-port input,
A-port output
0.01
0.01
0.01
MAX
UNIT
pF
pF
6.17 Operating Characteristics: VCCA = 1.8 V to 3.3 V, VCCB = 1.8 V to 5 V
TA = 25°C
PARAMETER
TEST CONDITIONS
VCCA = 1.8 V,
VCCB =1.8 V
MIN
Power
CpdA dissipation CL = 0
capacitance f = 10 MHz
tr = tf = 1 ns
OE = VCCA
(outputs
Power
CpdB dissipation enabled)
capacitance
Power
CpdA dissipation CL = 0
capacitance f = 10 MHz
tr = tf = 1 ns
OE = GND
(outputs
Power
CpdB dissipation disabled)
capacitance
12
TYP
MAX
VCCA = 2.5 V,
VCCB = 2.5 V
MIN
TYP
VCCA = 2.5 V,
VCCB = 5 V
MAX
MIN
TYP
MAX
VCCA = 3.3 V,
VCCB = 3.3 V to 5 V
MIN
TYP
A-port input,
B-port output
8
8
8
9
B-port input,
A-port output
11
11
11
11
A-port input,
B-port output
28
29
29
29
B-port input,
A-port output
18
19
21
22
A-port input,
B-port output
0.01
0.01
0.01
0.01
B-port input,
A-port output
0.01
0.01
0.01
0.01
A-port input,
B-port output
0.01
0.01
0.01
0.03
B-port input,
A-port output
0.01
0.01
0.01
0.04
UNIT
MAX
pF
pF
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6.18 Typical Characteristics
6
40
25qC (Room Temperature)
85qC
5
A Port I/O Capacitance (pF)
OE Pin Input Capacitance (pF)
6
4
3
2
1
0
0
0.5
1
1.5
2
2.5
VCCA (V)
3
3.5
5
4
3
2
40
25qC (Room Temperature)
85qC
1
0
4
0
0.5
1
D001
VCCB= 3.3 V
1.5
2
2.5
VCCA (V)
3
3.5
4
D002
VCCB= 3.3 V
Figure 6-1. Input Capacitance for OE Pin (CI) vs
Power Supply (VCCA)
Figure 6-2. Capacitance for A port I/O Pins (CiO) vs
Power Supply (VCCA)
B Port I/O Capacitance (pF)
12
10
8
6
4
40
25qC (Room Temperature)
85qC
2
0
0
0.5
1
1.5
2
2.5 3
VCCB (V)
3.5
4
4.5
5
5.5
D003
VCCA= 1.8 V
Figure 6-3. Capacitance for B Port I/O Pins (CiO) vs Power Supply (VCCB)
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7 Parameter Measurement Information
Unless otherwise noted, all input pulses are supplied by generators that have the following characteristics:
• PRR 10 MHz
• ZO = 50 W
• dv/dt ≥ 1 V/ns
Note
All parameters and waveforms are not applicable to all devices.
From Output
Under Test
15 pF
A.
1M
The outputs are measured one at a time, with one transition per measurement.
Figure 7-1. Load Circuit For Maximum Data Rate: Pulse Duration,
Propagation Delay Output Rise, And Fall Time Measurement
2 x VCCO
S1
50 k
From Output
Under Test
15 pF
A.
Open
50 k
The outputs are measured one at a time, with one transition per measurement.
Figure 7-2. Load Circuit For Enable and Disable Time Measurement
Table 7-1. Switch Position For Enable and Disable Time Measurement (See Figure 7-2)
14
TEST
S1
tPZL, tPLZ
2 × VCCO
tPHZ, tPZH
Open
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VCCI
Input
VCCI / 2
VCCI / 2
0V
t PLH
Output
t PHL
VCCO / 2
0.9
VCCO
0.1
VCCO
VOH
VCCO / 2
VOL
tr
A.
B.
C.
D.
tf
VCCI is the VCC associated with the input port.
VCCO is theVCC associated with the output port.
tPLH and tPHL are the same as tpd.
The outputs are measured one at a time, with one transition per measurement.
Figure 7-3. Voltage Waveforms Propagation Delay Times
tw
VCCI
Input
VCCI / 2
VCCI / 2
0V
Figure 7-4. Voltage Waveforms Pulse Duration
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8 Detailed Description
8.1 Overview
The TXB0104 device is a 4-bit, directionless voltage-level translator specifically designed for translating logic
voltage levels. The A port is able to accept I/O voltages ranging from 1.2 V to 3.6 V, while the B port can accept
I/O voltages from 1.65 V to 5.5 V. The device is a buffered architecture with edge-rate accelerators (one-shots)
to improve the overall data rate. This device can only translate push-pull CMOS logic outputs. If for open-drain
signal translation, please refer to TI’s TXS010X products.
8.2 Functional Block Diagram
VCCA
VCCB
OE
One
Shot
B1
A1
4k
One
Shot
4k
2 channels
One
Shot
B2
B3
A2
A3
4k
One
Shot
4k
One
Shot
B4
A4
4k
One
Shot
4k
16
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8.3 Feature Description
8.3.1 Architecture
The TXB0104 device architecture (see Figure 8-1) does not require a direction-control signal to control the
direction of data flow from A to B or from B to A. In a DC state, the output drivers of the device maintain a high or
low, but are designed to be weak, so the output drivers can be overdriven by an external driver when data on the
bus flows the opposite direction.
The output one-shots detect rising or falling edges on the A or B ports. During a rising edge, the one-shot turns
on the PMOS transistors (T1, T3) for a short duration, which speeds up the low-to-high transition. Similarly,
during a falling edge, the one-shot turns on the NMOS transistors (T2, T4) for a short duration, which speeds up
the high-to-low transition. The typical output impedance during output transition is 70 Ω at VCCO = 1.2 V to 1.8 V,
50 Ω at VCCO = 1.8 V to 3.3 V, and 40 Ω at VCCO = 3.3 V to 5 V.
VCCA
VCCB
One
Shot
T1
4k
One
Shot
T2
A
B
One
Shot
T3
4k
T4
One
Shot
Figure 8-1. Architecture of TXB0104 Device I/O Cell
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8.3.2 Input Driver Requirements
Typical IIN vs VIN characteristics of the device are shown in Figure 8-2. For proper operation, the device driving
the data I/Os of the TXB0104 device must have drive strength of at least ±2 mA.
IIN
VT /4 k
VIN
±(VD ± VT)/4 k
A.
B.
VT is the input threshold of the TXB0104 device, (typically VCC / 2).
VD is the supply voltage of the external driver.
Figure 8-2. Typical IIN vs VIN Curve
8.3.3 Output Load Considerations
TI recommends careful PCB layout practices with short PCB trace lengths to avoid excessive capacitive loading
and to ensure that proper O.S. triggering takes place. PCB signal trace-lengths must be kept short enough such
that the round trip delay of any reflection is less than the one-shot duration. This improves signal integrity by
ensuring that any reflection sees a low impedance at the driver. The O.S. circuits have been designed to stay
on for approximately 10 ns. The maximum capacitance of the lumped load that can be driven also depends
directly on the one-shot duration. With very heavy capacitive loads, the one-shot can time-out before the signal
is driven fully to the positive rail. The O.S. duration has been set to best optimize trade-offs between dynamic
ICC, load driving capability, and maximum bit-rate considerations. Both PCB trace length and connectors add
to the capacitance that the device output sees, so it is recommended that this lumped-load capacitance be
considered to avoid O.S. retriggering, bus contention, output signal oscillations, or other adverse system-level
affects.
18
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8.3.4 Enable and Disable
The TXB0104 device has an OE input that is used to disable the device by setting OE = low, which places all
I/Os in the high-impedance (Hi-Z) state. The disable time (tdis) indicates the delay between when OE goes low
and when the outputs acutally get disabled (Hi-Z). The enable time (ten) indicates the amount of time the user
must allow for the one-shot circuitry to become operational after OE is taken high.
8.3.5 Pullup or Pulldown Resistors on I/O Lines
The device is designed to drive capacitive loads of up to 70 pF. The output drivers of the TXB0104 device have
low dc drive strength. If pullup or pulldown resistors are connected externally to the data I/Os, their values must
be kept higher than 50 kΩ to ensure that they do not contend with the output drivers of the TXB0104 device.
For the same reason, the TXB0104 device must not be used in applications such as I2C or 1-Wire where an
open-drain driver is connected on the bidirectional data I/O. For these applications, use a device from the TI
TXS01xx series of level translators.
8.4 Device Functional Modes
The device has two functional modes, enabled and disabled. To disable the device, set the OE input to low,
which places all I/Os in a high impedance state. Setting the OE input to high will enable the device.
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9 Application and Implementation
Note
Information in the following applications sections is not part of the TI component specification,
and TI does not warrant its accuracy or completeness. TI’s customers are responsible for
determining suitability of components for their purposes, as well as validating and testing their design
implementation to confirm system functionality.
9.1 Application Information
The TXB0104 device can be used in level-translation applications for interfacing devices or systems operating
at different interface voltages with one another. It can only translate push-pull CMOS logic outputs. If for
open-drain signal translation, please refer to TI TXS010X products. Any external pulldown or pullup resistors are
recommended larger than 50 kΩ.
9.2 Typical Application
3.3 V
1.8 V
0.1 …F
VCCA
0.1 …F
VCCB
OE
1.8 V
System Controller
3.3 V
System
TXB0104
Data
Data
GND
9.2.1 Design Requirements
For this design example, use the parameters listed in Table 9-1. And make sure the VCCA ≤ VCCB.
Table 9-1. Design Parameters
DESIGN PARAMETERS
20
EXAMPLE VALUE
Input voltage range
1.2 V to 3.6 V
Output voltage range
1.65 V to 5.5 V
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9.2.2 Detailed Design Procedure
To begin the design process, determine the following:
• Input voltage range
- Use the supply voltage of the device that is driving the TXB0104 device to determine the input voltage range.
For a valid logic high, the value must exceed the VIH of the input port. For a valid logic low, the value must be
less than the VIL of the input port.
• Output voltage range
- Use the supply voltage of the device that the device is driving to determine the output voltage range.
- External pullup or pulldown resistors are not recommended. If mandatory, it is recommended that the value
must be larger than 50 kΩ.
• An external pulldown or pullup resistor decreases the output VOH and VOL. Use the below equations to draft
estimate the VOH and VOL as a result of an external pulldown and pullup resistor.
VOH = VCCx × RPD / (RPD + 4.5 kΩ)
VOL = VCCx × 4.5 kΩ / (RPU + 4.5 kΩ)
Where
• VCCx is the output port supply voltage on either VCCA or VCCB
• RPD is the value of the external pull down resistor
• RPU is the value of the external pull up resistor
• 4.5 kΩ is the counting the variation of the serial resistor 4 kΩ in the I/O line.
9.2.3 Application Curves
Figure 9-1. Level-Translation of a 2.5-MHz Signal
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10 Power Supply Recommendations
During operation, ensure that VCCA ≤ VCCB at all times. During power-up sequencing, VCCA ≥ VCCB does not
damage the device, so any power supply can be ramped up first. The device has circuitry that disables all output
ports when either VCC is switched off (VCCA/B = 0 V). The output-enable (OE) input circuit is designed so that
it is supplied by VCCA and when the (OE) input is low, all outputs are placed in the high-impedance state. To
ensure the high-impedance state of the outputs during power up or power down, the OE input pin must be tied to
GND through a pulldown resistor and must not be enabled until VCCA and VCCB are fully ramped and stable. The
minimum value of the pulldown resistor to ground is determined by the current-sourcing capability of the driver.
11 Layout
11.1 Layout Guidelines
To ensure reliability of the device, following common printed-circuit board layout guidelines is recommended.
• Bypass capacitors must be used on power supplies, and must be placed as close as possible to the VCCA,
VCCB pin and GND pin.
• Short trace-lengths must be used to avoid excessive loading.
• PCB signal trace-lengths must be kept short enough so that the round-trip delay of any reflection is less than
the one-shot duration, approximately 10 ns, ensuring that any reflection encounters low impedance at the
source driver.
11.2 Layout Example
LEGEND
Polygonal
VIA to Power Plane
Copper Pour
VIA to GND Plane (Inner Layer)
TXB0104PWR
Bypass
Capacitor
To Controller
To Controller
0.1 …F
0.1 …F
1
VCCA
2
VCCB
14
A1
B1
13
3
A2
B2
12
4
A3
B3
11
To System
To System
To System
To Controller
To Controller
Bypass
Capacitor
5
A4
B4
10
6
NC
NC
9
7
GND
OE
8
To System
Keep OE low until VCCA and
VCCB are powered up
22
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12 Device and Documentation Support
12.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. Click on
Subscribe to updates to register and receive a weekly digest of any product information that has changed. For
change details, review the revision history included in any revised document.
12.2 Support Resources
TI E2E™ support forums are an engineer's go-to source for fast, verified answers and design help — straight
from the experts. Search existing answers or ask your own question to get the quick design help you need.
Linked content is provided "AS IS" by the respective contributors. They do not constitute TI specifications and do
not necessarily reflect TI's views; see TI's Terms of Use.
12.3 Trademarks
BGA MICROSTAR JUNIOR™ is a trademark of Texas Instruments.
TI E2E™ is a trademark of Texas Instruments.
All trademarks are the property of their respective owners.
12.4 Electrostatic Discharge Caution
This integrated circuit can be damaged by ESD. Texas Instruments recommends that all integrated circuits be handled
with appropriate precautions. Failure to observe proper handling and installation procedures can cause damage.
ESD damage can range from subtle performance degradation to complete device failure. Precision integrated circuits may
be more susceptible to damage because very small parametric changes could cause the device not to meet its published
specifications.
12.5 Glossary
TI Glossary
This glossary lists and explains terms, acronyms, and definitions.
13 Mechanical, Packaging, and Orderable Information
The following pages include mechanical, packaging, and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser-based versions of this data sheet, refer to the left-hand navigation.
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PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
(2)
Lead finish/
Ball material
MSL Peak Temp
Op Temp (°C)
Device Marking
(3)
Samples
(4/5)
(6)
TXB0104D
ACTIVE
SOIC
D
14
50
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
TXB0104
Samples
TXB0104DG4
ACTIVE
SOIC
D
14
50
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
TXB0104
Samples
TXB0104DR
ACTIVE
SOIC
D
14
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
TXB0104
Samples
TXB0104DRG4
ACTIVE
SOIC
D
14
2500
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
TXB0104
Samples
TXB0104NMNR
ACTIVE
NFBGA
NMN
12
2500
RoHS & Green
SNAGCU
Level-2-260C-1 YEAR
-40 to 85
2AQW
Samples
TXB0104PWR
ACTIVE
TSSOP
PW
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
YE04
Samples
TXB0104PWRG4
ACTIVE
TSSOP
PW
14
2000
RoHS & Green
NIPDAU
Level-1-260C-UNLIM
-40 to 85
YE04
Samples
TXB0104RGYR
ACTIVE
VQFN
RGY
14
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
YE04
Samples
TXB0104RGYRG4
ACTIVE
VQFN
RGY
14
3000
RoHS & Green
NIPDAU
Level-2-260C-1 YEAR
-40 to 85
YE04
Samples
TXB0104RUTR
ACTIVE
UQFN
RUT
12
3000
RoHS & Green
NIPDAUAG
Level-1-260C-UNLIM
-40 to 85
(2KR, 2KV)
Samples
TXB0104YZTR
ACTIVE
DSBGA
YZT
12
3000
RoHS & Green
SNAGCU
Level-1-260C-UNLIM
-40 to 85
2K
Samples
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of
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