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1875

1875

  • 厂商:

    ADAFRUIT

  • 封装:

    -

  • 描述:

    FREQ COUNTER 2.5GHZ HANDHELD

  • 数据手册
  • 价格&库存
1875 数据手册
TXB0104 www.ti.com SCES650F – APRIL 2006 – REVISED MAY 2012 4-BIT BIDIRECTIONAL VOLTAGE-LEVEL TRANSLATOR WITH AUTOMATIC DIRECTION SENSING AND ±15-kV ESD PROTECTION Check for Samples: TXB0104 FEATURES 1 • 2 • • • • • 1.2 V to 3.6 V on A Port and 1.65 V to 5.5 V on B Port (VCCA ≤ VCCB) VCC Isolation Feature – If Either VCC Input Is at GND, All Outputs Are in the High-Impedance State OE Input Circuit Referenced to VCCA Low Power Consumption, 5-μA Max ICC Ioff Supports Partial-Power-Down Mode Operation • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II ESD Protection Exceeds JESD 22 – A Port – 2500-V Human-Body Model (A114-B) – 1500-V Charged-Device Model (C101) – B Port – ±15-kV Human-Body Model (A114-B) – 1500-V Charged-Device Model (C101) TERMINAL ASSIGNMENTS (GXU/ZXU Package) GXU/ZXU PACKAGE (TOP VIEW) A B C 4 A4 GND B4 4 3 A3 OE B3 3 2 A2 VCCA B2 2 1 A1 VCCB B1 A B C 1 A1 2 13 B1 A2 3 12 B2 A3 4 11 B3 A4 5 10 B4 NC GND 6 9 7 8 NC OE A1 A2 A3 A4 NC 1 14 OE VCCB RUT PACKAGE (TOP VIEW) VCCA 13 B1 2 3 Exposed Center Pad 4 5 6 12 B2 11 B3 10 B4 9 NC 7 8 1 12 11 VCCB A1 2 10 B1 A2 3 9 B2 A3 4 8 B3 A4 5 6 7 B4 GND 14 OE 1 GND VCCA VCCB D OR PW PACKAGE (TOP VIEW) VCCA RGY PACKAGE (TOP VIEW) A. N.C. − No internal connection B. For RGY, if the exposed center pad is used, it must only be connected as a secondary ground or left electrically open. C. Pull up resistors are not required on both sides for Logic I/O. D. If pull up or pull down resistors are needed, the resistor value must be over 50 kΩ. E. 50 kΩ is a safe recommended value, if the customer can accept higher Vol or lower Voh, smaller pull up or pull down resistor is allowed, the draft estimation is Vol = Vccout × 4.5k/(4.5k + Rpu) and Voh = Vccout × Rdw/(4.5k + Rdw). F. If pull up resistors are needed, please refer to the TXS0104 or contact TI. G. For detailed information, please refer to application note SCEA043. 1 2 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. NanoFree is a trademark of Texas Instruments. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2006–2012, Texas Instruments Incorporated TXB0104 SCES650F – APRIL 2006 – REVISED MAY 2012 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. YZT PACKAGE (TOP VIEW) TERMINAL ASSIGNMENTS (YZT Package) 3 2 1 D A4 GND B4 C A3 OE B3 B A2 VCCA B2 A A1 VCCB B1 3 2 1 D C B A DESCRIPTION/ORDERING INFORMATION This 4-bit noninverting translator uses two separate configurable power-supply rails. The A port is designed to track VCCA. VCCA accepts any supply voltage from 1.2 V to 3.6 V. The B port is designed to track VCCB. VCCB accepts any supply voltage from 1.65 V to 5.5 V. This allows for universal low-voltage bidirectional translation between any of the 1.2-V, 1.5-V, 1.8-V, 2.5-V, 3.3-V, and 5-V voltage nodes. VCCA should not exceed VCCB. When the output-enable (OE) input is low, all outputs are placed in the high-impedance state. To ensure the high-impedance state during power up or power down, OE should be tied to GND through a pulldown resistor; the minimum value of the resistor is determined by the current-sourcing capability of the driver. The TXB0104 is designed so that the OE input circuit is supplied by VCCA. This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down. ORDERING INFORMATION (1) PACKAGE (2) TA –40°C to 85°C ORDERABLE PART NUMBER NanoFree™ — WCSP (DSBGA) 0.23-mm Large Bump – YZT (Pb-free) 0.625-mm max height Reel of 3000 TXB0104YZTR ___2K_ UFBGA – GXU Reel of 2500 TXB0104GXUR YE04 UFBGA – ZXU (Pb-Free) Reel of 2500 TXB0104ZXUR YE04 QFN – RGY Reel of 1000 uQFN – RUT Reel of 3000 Tube of 50 SOIC – D Reel of 2500 TSSOP – PW (1) (2) (3) 2 TOP-SIDE MARKING (3) Reel of 2000 TXB0104RGYR TXB0104RGYRG4 TXB0104RUTR YE04 2KR TXB0104D TXB0104DG4 TXB0104DR TXB0104 TXB0104DRG4 TXB0104PWR TXB0104PWRG4 YE04 For the most current package and ordering information, see the Package Option Addendum at the end of this document, or see the TI web site at www.ti.com. Package drawings, thermal data, and symbolization are available at www.ti.com/packaging. YZT: The actual top-side marking has three preceding characters to denote year, month, and sequence code, and one following character to designate the wafer fab/assembly site. Pin 1 identifier indicates solder-bump composition (1 = SnPb, • = Pb-free). Submit Documentation Feedback Copyright © 2006–2012, Texas Instruments Incorporated Product Folder Links: TXB0104 TXB0104 www.ti.com SCES650F – APRIL 2006 – REVISED MAY 2012 PIN DESCRIPTION PIN NO. BALL NO. NAME FUNCTION D, PW, OR RGY RUT GXU/ ZXU YZT 1 1 B2 B2 VCCA 2 2 A1 A3 A1 Input/output 1. Referenced to VCCA. 3 3 A2 B3 A2 Input/output 2. Referenced to VCCA. 4 4 A3 C3 A3 Input/output 3. Referenced to VCCA. 5 5 A4 D3 A4 Input/output 4. Referenced to VCCA. 6 – – – NC No connection. Not internally connected. 7 6 B4 D2 GND 8 12 B3 C2 OE 3-state output-mode enable. Pull OE low to place all outputs in 3-state mode. Referenced to VCCA. A-port supply voltage 1.2 V ≤ VCCA ≤ 3.6 V and VCCA ≤ VCCB. Ground 9 – – – NC No connection. Not internally connected. 10 7 C4 D1 B4 Input/output 4. Referenced to VCCB. 11 8 C3 C1 B3 Input/output 3. Referenced to VCCB. 12 9 C2 B1 B2 Input/output 2. Referenced to VCCB. 13 10 C1 A1 B1 Input/output 1. Referenced to VCCB. 14 11 B1 A2 VCCB B-port supply voltage 1.65 V ≤ VCCB ≤ 5.5 V. ABSOLUTE MAXIMUM RATINGS (1) over operating free-air temperature range (unless otherwise noted) VCCA VCCB MIN MAX –0.5 4.6 –0.5 6.5 A port –0.5 4.6 B port –0.5 6.5 A port –0.5 4.6 B port -0.5 6.5 A port –0.5 VCCA + 0.5 B port –0.5 VCCB + 0.5 Supply voltage range UNIT V VI Input voltage range VO Voltage range applied to any output in the high-impedance or power-off state VO Voltage range applied to any output in the high or low state (2) IIK Input clamp current VI < 0 –50 mA IOK Output clamp current VO < 0 –50 mA IO Continuous output current Continuous current through VCCA, VCCB, or GND Tstg (1) (2) Storage temperature range –65 V V V ±50 mA ±100 mA 150 °C Stresses beyond those listed under "absolute maximum ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under "recommended operating conditions" is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. The value of VCCA and VCCB are provided in the recommended operating conditions table. Submit Documentation Feedback Copyright © 2006–2012, Texas Instruments Incorporated Product Folder Links: TXB0104 3 TXB0104 SCES650F – APRIL 2006 – REVISED MAY 2012 www.ti.com THERMAL IMPEDANCE RATINGS UNIT D package (1) θJA (1) (2) Package thermal impedance 113 (2) °C/W 47 RUT package TBD YZT package 90 (2) VCCA VCCB VCCB Supply voltage MIN MAX 1.2 3.6 1.65 5.5 Data inputs 1.2 V to 3.6 V 1.65 V to 5.5 V VCCI × 0.65 (3) VCCI OE 1.2 V to 3.6 V 1.65 V to 5.5 V VCCA × 0.65 5.5 Data inputs 1.2 V to 5.5 V 1.65 V to 5.5 V 0 VCCI × 0.35 (3) OE 1.2 V to 3.6 V 1.65 V to 5.5 V 0 VCCA × 0.35 0 3.6 1.2 V to 3.6 V 1.65 V to 5.5 V 0 5.5 1.2 V to 3.6 V 1.65 V to 5.5 V 40 1.65 V to 3.6 V 40 4.5 V to 5.5 V 30 VIH High-level input voltage VIL Low-level input voltage VO Voltage range applied to any A-port output in the high-impedance B-port or power-off state Δt/Δv Input transition rise or fall rate A-port inputs 4 129 PW package (1) The package thermal impedance is calculated in accordance with JESD 51-7. The package thermal impedance is calculated in accordance with JESD 51-5. VCCA (1) (2) (3) GXU/ZXU package (1) RGY package RECOMMENDED OPERATING CONDITIONS (1) TA 86 B-port inputs 1.2 V to 3.6 V Operating free-air temperature –40 85 UNIT V V V V ns/V °C The A and B sides of an unused data I/O pair must be held in the same state, i.e., both at VCCI or both at GND. VCCA must be less than or equal to VCCB and must not exceed 3.6 V. VCCI is the supply voltage associated with the input port. Submit Documentation Feedback Copyright © 2006–2012, Texas Instruments Incorporated Product Folder Links: TXB0104 TXB0104 www.ti.com SCES650F – APRIL 2006 – REVISED MAY 2012 ELECTRICAL CHARACTERISTICS (1) (2) over recommended operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS VCCA VCCB 1.2 V IOH = –20 μA VOLA IOL = 20 μA VOHB IOH = –20 μA 1.65 V to 5.5 V VOLB IOL = 20 μA 1.65 V to 5.5 V Ioff IOZ MIN –40°C to 85°C TYP MAX MIN MAX 1.1 VOHA II TA = 25°C 1.4 V to 3.6 V V VCCA – 0.4 1.2 V 0.9 1.4 V to 3.6 V 0.4 VCCB – 0.4 V V μA VI = VCCI or GND 1.2 V to 3.6 V 1.65 V to 5.5 V ±1 ±2 A port VI or VO = 0 to 3.6 V 0V 0 V to 5.5 V ±1 ±2 B port VI or VO = 0 to 5.5 V 0 V to 3.6 V 0V ±1 ±2 A or B port OE = GND 1.2 V to 3.6 V 1.65 V to 5.5 V ±1 ±2 1.2 V 1.65 V to 5.5 V 1.4 V to 3.6 V 1.65 V to 5.5 V 5 3.6 V 0V 2 VI = VCCI or GND, IO = 0 0V 5.5 V 1.65 V to 5.5 V VI = VCCI or GND, IO = 0 1.4 V to 3.6 V 1.65 V to 5.5 V 5 3.6 V 0V –2 0V 5.5 V ICCA + ICCB VI = VCCI or GND, IO = 0 1.2 V 1.65 V to 5.5 V 1.4 V to 3.6 V 1.65 V to 5.5 V VI = VCCI or GND, IO = 0, OE = GND 1.2 V 1.65 V to 5.5 V ICCZA 1.4 V to 3.6 V 1.65 V to 5.5 V VI = VCCI or GND, IO = 0, OE = GND 1.2 V 1.65 V to 5.5 V ICCZB 1.4 V to 3.6 V 1.65 V to 5.5 V 1.2 V to 3.6 V 1.65 V to 5.5 V 1.2 V to 3.6 V 1.65 V to 5.5 V Ci Cio (1) (2) OE A port B port μA μA 0.06 1.2 V ICCB V 0.4 OE ICCA UNIT μA –2 3.4 μA 2 3.5 10 μA 0.05 5 μA 3.3 5 3 4 5 6 11 14 μA pF pF VCCI is the supply voltage associated with the input port. VCCO is the supply voltage associated with the output port. Submit Documentation Feedback Copyright © 2006–2012, Texas Instruments Incorporated Product Folder Links: TXB0104 5 TXB0104 SCES650F – APRIL 2006 – REVISED MAY 2012 www.ti.com TIMING REQUIREMENTS TA = 25°C, VCCA = 1.2 V Data rate tw Pulse duration Data inputs VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V VCCB = 5 V TYP TYP TYP TYP 20 20 20 20 Mbps 50 50 50 50 ns UNIT TIMING REQUIREMENTS over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (unless otherwise noted) VCCB = 1.8 V ± 0.15 V MIN Data rate tw Pulse duration VCCB = 2.5 V ± 0.2 V MAX MIN MAX 40 Data inputs VCCB = 3.3 V ± 0.3 V MIN MAX 40 25 VCCB = 5 V ± 0.5 V MIN 40 25 40 25 UNIT MAX 25 Mbps ns TIMING REQUIREMENTS over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (unless otherwise noted) VCCB = 1.8 V ± 0.15 V MIN Data rate tw Pulse duration VCCB = 2.5 V ± 0.2 V MAX MIN MAX 60 Data inputs 17 VCCB = 3.3 V ± 0.3 V MIN VCCB = 5 V ± 0.5 V MAX 60 MIN 60 17 60 17 UNIT MAX 17 Mbps ns TIMING REQUIREMENTS over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (unless otherwise noted) VCCB = 2.5 V ± 0.2 V MIN Data rate tw Pulse duration VCCB = 3.3 V ± 0.3 V MAX MIN MAX 100 Data inputs VCCB = 5 V ± 0.5 V MIN 100 10 100 10 UNIT MAX 10 Mbps ns TIMING REQUIREMENTS over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (unless otherwise noted) VCCB = 3.3 V ± 0.3 V MIN Data rate tw 6 Pulse duration VCCB = 5 V ± 0.5 V MAX MIN 100 Data inputs Submit Documentation Feedback 10 UNIT MAX 100 10 Mbps ns Copyright © 2006–2012, Texas Instruments Incorporated Product Folder Links: TXB0104 TXB0104 www.ti.com SCES650F – APRIL 2006 – REVISED MAY 2012 SWITCHING CHARACTERISTICS TA = 25°C, VCCA = 1.2 V FROM (INPUT) TO (OUTPUT) VCCB = 1.8 V VCCB = 2.5 V VCCB = 3.3 V VCCB = 5 V TYP TYP TYP TYP A B 6.9 5.7 5.3 5.5 B A 7.4 6.4 6 5.8 A 1 1 1 1 B 1 1 1 1 A 18 15 14 14 B 20 17 16 16 trA, tfA A-port rise and fall times 4.2 4.2 4.2 4.2 ns trB, tfB B-port rise and fall times 2.1 1.5 1.2 1.1 ns tSK(O) Channel-to-channel skew 0.4 0.5 0.5 1.4 ns 20 20 20 20 Mbps PARAMETER tpd ten OE tdis OE Max data rate UNIT ns μs ns SWITCHING CHARACTERISTICS over recommended operating free-air temperature range, VCCA = 1.5 V ± 0.1 V (unless otherwise noted) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A B ten OE tdis OE VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V VCCB = 5 V ± 0.5 V UNIT MIN MAX MIN MAX MIN MAX MIN MAX B 1.4 12.9 1.2 10.1 1.1 10 0.8 9.9 A 0.9 14.2 0.7 12 0.4 11.7 0.3 13.7 A 1 1 1 1 B 1 1 1 1 ns μs A 5.9 31 5.7 25.9 5.6 23 5.7 22.4 B 5.4 30.3 4.9 22.8 4.8 20 4.9 19.5 A-port rise and fall times 1.4 5.1 1.4 5.1 1.4 5.1 1.4 5.1 ns trB, tfB B-port rise and fall times 0.9 4.5 0.6 3.2 0.5 2.8 0.4 2.7 ns tSK(O) Channel-to-channel skew trA, tfA Max data rate 0.5 0.5 40 40 0.5 40 0.5 40 ns ns Mbps SWITCHING CHARACTERISTICS over recommended operating free-air temperature range, VCCA = 1.8 V ± 0.15 V (unless otherwise noted) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A B ten OE tdis OE VCCB = 1.8 V ± 0.15 V VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V VCCB = 5 V ± 0.5 V UNIT MIN MAX MIN MAX MIN MAX MIN MAX B 1.6 11 1.4 7.7 1.3 6.8 1.2 6.5 A 1.5 12 1.3 8.4 1 7.6 0.9 7.1 A 1 1 1 1 B 1 1 1 1 A 5.9 31 5.1 21.3 5 19.3 5 17.4 B 5.4 30.3 4.4 20.8 4.2 17.9 4.3 16.3 ns μs ns trA, tfA A-port rise and fall times 1 4.2 1.1 4.1 1.1 4.1 1.1 4.1 ns trB, tfB B-port rise and fall times 0.9 3.8 0.6 3.2 0.5 2.8 0.4 2.7 ns tSK(O) Channel-to-channel skew Max data rate 0.5 60 0.5 60 0.5 60 0.5 60 Submit Documentation Feedback Copyright © 2006–2012, Texas Instruments Incorporated Product Folder Links: TXB0104 ns Mbps 7 TXB0104 SCES650F – APRIL 2006 – REVISED MAY 2012 www.ti.com SWITCHING CHARACTERISTICS over recommended operating free-air temperature range, VCCA = 2.5 V ± 0.2 V (unless otherwise noted) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A B ten OE tdis OE VCCB = 2.5 V ± 0.2 V VCCB = 3.3 V ± 0.3 V MIN MAX B 1.1 A 1.2 VCCB = 5 V ± 0.5 V UNIT MIN MAX MIN MAX 6.3 1 5.2 0.9 4.7 6.6 1.1 5.1 0.9 4.4 A 1 1 1 B 1 1 1 A 5.1 21.3 4.6 15.2 4.6 13.2 B 4.4 20.8 3.8 16 3.9 13.9 ns μs ns trA, tfA A-port rise and fall times 0.8 3 0.8 3 0.8 3 ns trB, tfB B-port rise and fall times 0.7 2.6 0.5 2.8 0.4 2.7 ns tSK(O) Channel-to-channel skew 0.5 ns 0.5 Max data rate 0.5 100 100 100 Mbps SWITCHING CHARACTERISTICS over recommended operating free-air temperature range, VCCA = 3.3 V ± 0.3 V (unless otherwise noted) PARAMETER tpd FROM (INPUT) TO (OUTPUT) A B ten OE tdis OE VCCB = 5 V ± 0.5 V UNIT MIN MAX MIN B 0.9 4.7 0.8 4 A 1 4.9 0.9 3.8 MAX A 1 1 B 1 1 A 4.6 15.2 4.3 12.1 B 3.8 16 3.4 13.2 ns μs ns trA, tfA A-port rise and fall times 0.7 2.5 0.7 2.5 ns trB, tfB B-port rise and fall times 0.5 2.1 0.4 2.7 ns tSK(O) Channel-to-channel skew Max data rate 8 VCCB = 3.3 V ± 0.3 V 0.5 100 Submit Documentation Feedback 0.5 100 ns Mbps Copyright © 2006–2012, Texas Instruments Incorporated Product Folder Links: TXB0104 TXB0104 www.ti.com SCES650F – APRIL 2006 – REVISED MAY 2012 OPERATING CHARACTERISTICS TA = 25°C VCCA 1.2 V 1.2 V 1.5 V 1.8 V 2.5 V 2.5 V 3.3 V 2.5 V 5V 3.3 V to 5V VCCB PARAMETER TEST CONDITIONS 5V CpdA CpdB CpdA CpdB A-port input, B-port output B-port input, A-port output A-port input, B-port output B-port input, A-port output A-port input, B-port output B-port input, A-port output A-port input, B-port output B-port input, A-port output CL = 0, f = 10 MHz, tr = tf = 1 ns, OE = VCCA (outputs enabled) CL = 0, f = 10 MHz, tr = tf = 1 ns, OE = GND (outputs disabled) 1.8 V 1.8 V 1.8 V UNIT TYP TYP TYP TYP TYP TYP TYP 7.8 10 9 8 8 8 9 12 11 11 11 11 11 11 38.1 28 28 28 29 29 29 25.4 19 18 18 19 21 22 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.01 0.03 0.01 0.01 0.01 0.01 0.01 0.01 0.04 Submit Documentation Feedback Copyright © 2006–2012, Texas Instruments Incorporated Product Folder Links: TXB0104 pF pF 9 TXB0104 SCES650F – APRIL 2006 – REVISED MAY 2012 www.ti.com PRINCIPLES OF OPERATION Applications The TXB0104 can be used in level-translation applications for interfacing devices or systems operating at different interface voltages with one another. Architecture The TXB0104 architecture (see Figure 1) does not require a direction-control signal to control the direction of data flow from A to B or from B to A. In a dc state, the output drivers of the TXB0104 can maintain a high or low, but are designed to be weak, so that they can be overdriven by an external driver when data on the bus starts flowing the opposite direction. The output one shots detect rising or falling edges on the A or B ports. During a rising edge, the one shot turns on the PMOS transistors (T1, T3) for a short duration, which speeds up the low-to-high transition. Similarly, during a falling edge, the one shot turns on the NMOS transistors (T2, T4) for a short duration, which speeds up the high-to-low transition. The typical output impedance during output transition is 70 Ω at VCCO = 1.2 V to 1.8 V, 50 Ω at VCCO = 1.8 V to 3.3 V, and 40 Ω at VCCO = 3.3 V to 5 V. VCCA VCCB One Shot T1 4k One Shot T2 A B One Shot T3 4k T4 One Shot Figure 1. Architecture of TXB0104 I/O Cell Input Driver Requirements Typical IIN vs VIN characteristics of the TXB0104 are shown in Figure 2. For proper operation, the device driving the data I/Os of the TXB0104 must have drive strength of at least ±2 mA. 10 Submit Documentation Feedback Copyright © 2006–2012, Texas Instruments Incorporated Product Folder Links: TXB0104 TXB0104 www.ti.com SCES650F – APRIL 2006 – REVISED MAY 2012 IIN VT/4 kW VIN –(VD – VT)/4 kW A. VT is the input threshold voltage of the TXB0104 (typically VCCI/2). B. VD is the supply voltage of the external driver. Figure 2. Typical IIN vs VIN Curve Power Up During operation, ensure that VCCA ≤ VCCB at all times. During power-up sequencing, VCCA ≥ VCCB does not damage the device, so any power supply can be ramped up first. The TXB0104 has circuitry that disables all output ports when either VCC is switched off (VCCA/B = 0 V). Enable and Disable The TXB0104 has an OE input that is used to disable the device by setting OE = low, which places all I/Os in the high-impedance (Hi-Z) state. The disable time (tdis) indicates the delay between when OE goes low and when the outputs acutally get disabled (Hi-Z). The enable time (ten) indicates the amount of time the user must allow for the one-shot circuitry to become operational after OE is taken high. Pullup or Pulldown Resistors on I/O Lines The TXB0104 is designed to drive capacitive loads of up to 70 pF. The output drivers of the TXB0104 have low dc drive strength. If pullup or pulldown resistors are connected externally to the data I/Os, their values must be kept higher than 50 kΩ to ensure that they do not contend with the output drivers of the TXB0104. For the same reason, the TXB0104 should not be used in applications such as I2C or 1-Wire where an opendrain driver is connected on the bidirectional data I/O. For these applications, use a device from the TI TXS01xx series of level translators. Submit Documentation Feedback Copyright © 2006–2012, Texas Instruments Incorporated Product Folder Links: TXB0104 11 TXB0104 SCES650F – APRIL 2006 – REVISED MAY 2012 www.ti.com PARAMETER MEASUREMENT INFORMATION 2 × VCCO From Output Under Test 50 kW From Output Under Test 15 pF 15 pF 1 MW Open 50 kW TEST tPZL/tPLZ tPHZ/tPZH LOAD CIRCUIT FOR ENABLE/DISABLE TIME MEASUREMENT LOAD CIRCUIT FOR MAX DATA RATE, PULSE DURATION PROPAGATION DELAY OUTPUT RISE AND FALL TIME MEASUREMENT S1 S1 2 × VCCO Open VCCI Input VCCI/2 VCCI/2 0V tPLH tPHL tw Output VCCO/2 0.9 y VCCO 0.1 y VCCO VOH tf tr VCCI VCCO/2 VOL Input VCCI/2 0V VOLTAGE WAVEFORMS PULSE DURATION VOLTAGE WAVEFORMS PROPAGATION DELAY TIMES A. B. C. D. E. F. G. VCCI/2 CL includes probe and jig capacitance. All input pulses are supplied by generators having the following characteristics: PRRv10 MHz, ZO = 50 Ω, dv/dt ≥ 1 V/ns. The outputs are measured one at a time, with one transition per measurement. tPLH and tPHL are the same as tpd. VCCI is the VCC associated with the input port. VCCO is the VCC associated with the output port. All parameters and waveforms are not applicable to all devices. Figure 3. Load Circuits and Voltage Waveforms 12 Submit Documentation Feedback Copyright © 2006–2012, Texas Instruments Incorporated Product Folder Links: TXB0104 TXB0104 www.ti.com SCES650F – APRIL 2006 – REVISED MAY 2012 REVISION HISTORY Changes from Revision E (February 2010) to Revision F • Page Added notes to pin out graphics. .......................................................................................................................................... 1 Submit Documentation Feedback Copyright © 2006–2012, Texas Instruments Incorporated Product Folder Links: TXB0104 13 PACKAGE OPTION ADDENDUM www.ti.com 26-Oct-2013 PACKAGING INFORMATION Orderable Device Status (1) Package Type Package Pins Package Drawing Qty Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Op Temp (°C) Device Marking (4/5) TXB0104D ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TXB0104 TXB0104DG4 ACTIVE SOIC D 14 50 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TXB0104 TXB0104DR ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TXB0104 TXB0104DRG4 ACTIVE SOIC D 14 2500 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 TXB0104 TXB0104GXUR ACTIVE BGA MICROSTAR JUNIOR GXU 12 2500 TBD SNPB Level-1-240C-UNLIM -40 to 85 YE04 TXB0104PWR ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 YE04 TXB0104PWRG4 ACTIVE TSSOP PW 14 2000 Green (RoHS & no Sb/Br) CU NIPDAU Level-1-260C-UNLIM -40 to 85 YE04 TXB0104RGYR ACTIVE VQFN RGY 14 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 YE04 TXB0104RGYRG4 ACTIVE VQFN RGY 14 3000 Green (RoHS & no Sb/Br) CU NIPDAU Level-2-260C-1 YEAR -40 to 85 YE04 TXB0104RUTR ACTIVE UQFN RUT 12 3000 Green (RoHS & no Sb/Br) CU NIPDAUAG Level-1-260C-UNLIM -40 to 85 2KR TXB0104YZTR ACTIVE DSBGA YZT 12 3000 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 (2K ~ 2K7) TXB0104ZXUR ACTIVE BGA MICROSTAR JUNIOR ZXU 12 2500 Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM -40 to 85 YE04 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 26-Oct-2013 TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. OTHER QUALIFIED VERSIONS OF TXB0104 : • Automotive: TXB0104-Q1 NOTE: Qualified Version Definitions: • Automotive - Q100 devices qualified for high-reliability automotive applications targeting zero defects Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 23-Nov-2013 TAPE AND REEL INFORMATION *All dimensions are nominal Device TXB0104DR Package Package Pins Type Drawing SOIC TXB0104GXUR BGA MI CROSTA R JUNI OR SPQ Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) B0 (mm) K0 (mm) P1 (mm) W Pin1 (mm) Quadrant D 14 2500 330.0 16.4 6.5 9.0 2.1 8.0 16.0 Q1 GXU 12 2500 330.0 8.4 2.3 2.8 1.0 4.0 8.0 Q2 TXB0104PWR TSSOP PW 14 2000 330.0 12.4 6.9 5.6 1.6 8.0 12.0 Q1 TXB0104RGYR VQFN RGY 14 3000 330.0 12.4 3.75 3.75 1.15 8.0 12.0 Q1 TXB0104RUTR UQFN RUT 12 3000 180.0 8.4 1.95 2.3 0.75 4.0 8.0 Q1 TXB0104YZTR DSBGA YZT 12 3000 180.0 8.4 1.49 1.99 0.75 4.0 8.0 Q2 TXB0104ZXUR BGA MI CROSTA R JUNI OR ZXU 12 2500 330.0 8.4 2.3 2.8 1.0 4.0 8.0 Q2 Pack Materials-Page 1 PACKAGE MATERIALS INFORMATION www.ti.com 23-Nov-2013 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) TXB0104DR SOIC D 14 2500 367.0 367.0 38.0 TXB0104GXUR BGA MICROSTAR JUNIOR GXU 12 2500 338.1 338.1 20.6 TXB0104PWR TSSOP PW 14 2000 367.0 367.0 35.0 TXB0104RGYR VQFN RGY 14 3000 367.0 367.0 35.0 TXB0104RUTR UQFN RUT 12 3000 202.0 201.0 28.0 TXB0104YZTR DSBGA YZT 12 3000 182.0 182.0 17.0 TXB0104ZXUR BGA MICROSTAR JUNIOR ZXU 12 2500 338.1 338.1 20.6 Pack Materials-Page 2 D: Max = 1.89 mm, Min = 1.83 mm E: Max = 1.39 mm, Min = 1.33 mm IMPORTANT NOTICE Texas Instruments Incorporated and its subsidiaries (TI) reserve the right to make corrections, enhancements, improvements and other changes to its semiconductor products and services per JESD46, latest issue, and to discontinue any product or service per JESD48, latest issue. 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