P0113

CONTENTS Chapter 1 Introduction ........................................................................................................................ 2 1.1 Features....................................................................................................................................................... 2 1.2 Getting Help ............................................................................................................................................... 3 Chapter 2 Architecture ........................................................................................................................ 4 2.1 Layout and Components ............................................................................................................................. 4 2.2 Block Diagram of the PCA Board .............................................................................................................. 5 Chapter 3 Board Components ............................................................................................................ 7 3.1 PCIe Edge Connector ................................................................................................................................. 7 3.2 PCIe Cable Connector ................................................................................................................................ 9 3.3 Switches.................................................................................................................................................... 12 3.4 LEDs ......................................................................................................................................................... 15 Chapter 4 Appendix ........................................................................................................................... 17 4.1 Revision History ....................................................................................................................................... 17 4.2 Copyright Statement ................................................................................................................................. 17 1 Chapter 1 Introduction The Terasic PCIe x4 Cable Adapter (PCA) is used to connect a PCIe upstream slot with downstream target board via PCIe x4 cable, supporting PCIe x4 & x1 lanes. The PCA can provide programmable equalization, amplification, and de-emphasis for PCIe transceiver signal by using 8 select bits. It is also available to optimize performance over a variety of physical mediums by reducing Inter-symbol interference. 1.1 Features Figure 1-1 shows a photograph of the PCA. Figure 1-1 Exterior View The key features of the card are listed below: 2 • • • • Up to 5.0Gbps PCIe 2.0 Serial Re-Driver PCIe x4 Gen 2 Adjustable receiver equalization Adjustable transmitter amplitude and de-emphasis 1.2 Getting Help Here is information of how to get help if you encounter any problem: Terasic Technologies • • Tel: +886-3-550-8800 Email: support@terasic.com 3 Chapter 2 Architecture This chapter provides information about architecture and block diagram of the PCA board. 2.1 Layout and Components The picture of the Terasic PCIe x4 Cable Adapter (PCA) is shown in Figure 2-1 and Figure 2-2. It depicts the layout of the board and indicates the locations of the connectors and key components. Figure 2-1 The PCA Card PCB and Component Diagram (top view) 4 Figure 2-2 The PCA Card PCB and Component Diagram (bottom view) 2.2 Block Diagram of the PCA Board Figure 2-3 shows the block diagram of the PCA card. 5 Figure 2-3 Block Diagram of PCA 6 Chapter 3 Board Components This chapter describes the specifications of the on board components. 3.1 PCIe Edge Connector This PCIe edge connector is used to connect the PCA with PC motherboard PCIe slot, as show Figure 3-1 and Figure 3-2. Figure 3-1 PCA Edge Connector Figure 3-2 Plug the PCA into the PCIe slot of the Motherboard The pins are numbered as shown in Table 3-1 with side A on the top of the center-line on the solder side of the board and side B on the bottom of the centerline on the component side of the board. 7 The PCIe interface pins PETpx, PETnx, PERpx, and PERnx are named with the following convention: “PE” stands for PCIe high speed, “T” for Transmitter, “R” for Receiver, “p” for positive (+), and “n” for negative (-). Note that adjacent differential pairs are separated by two ground pins to manage the connector crosstalk. Table 3-1 gives the wiring information of the PCIe Edge connector. Table 3-1 Pin Numbers Pin assignments and descriptions on PCIe Edge connector Side B Side A 1 Name NC Description NC Name PRSNT1n 2 3 4 5 6 7 8 9 10 NC NC GND NC NC GND VCC3P3 NC 3.3VAUX NC NC GND NC NC NC NC VCC3P3 VCC3P3 11 WAKE NC NC Ground NC NC Ground 3.3V Power NC 3.3 V Auxiliary Power NC PERSTn 12 13 14 RSVD GND PETp0 15 16 17 PETn0 GND PRSNT2n 18 19 20 GND PETp1 PETn1 21 22 GND GND Mechanical Key Reserved GND Ground REFCLK+ Transmitter REFCLKdifferential pair, Lane 0 GND Ground PERp0 Hot-Plug PERn0 presence detect Ground GND Transmitter differential pair, GND Lane 1 Ground PERp1 Ground PERn1 23 24 PETp2 PETn2 Transmitter differential pair, 8 GND GND Description Hot-Plug presence detect NC NC Ground NC NC NC NC 3.3V Power 3.3V Power Fundamental Reset Ground Reference clock (differential pair) Ground Receiver differential pair, Lane 0 Ground Ground Receiver differential pair, Lane 1 Ground Ground Lane 2 Ground Ground 25 26 GND GND 27 28 PETp3 PETn3 29 30 GND RSVD 31 PRSNT2n 32 GND PERp2 PERn2 Receiver differential pair, Lane 2 Ground Ground Transmitter differential pair, Lane 3 Ground Reserved GND GND Hot-Plug presence detect Ground GND Receiver differential pair, Lane 3 Ground RSVD Reserved PERp3 PERn3 3.2 PCIe Cable Connector A PCIe cable connector is used to connect the PCIe x4 Cable and PCA cable connector, Connect the adapter by using a PCIe x4 Cable, as show Figure 3-3. Figure 3-3 PCIe x4 Cable and PCA To purchase the PCIe x4 Cable, please refer the url: PCIe_Cable.terasic.com. Figure 3-4 as show the PCIe Cable connects PCA connector 9 Figure 3-4 PCIe Cable and PCA connector Connected Table 3-2 gives the wiring information of the PCIe Cable connector. Pin Numbers Name A1 GND A2 PETp0 A3 PETn0 A4 GND A5 PETp1 A6 PETn1 A7 GND A8 PETp2 A9 PETn2 A10 GND Description Ground reference for PCI Express transmitter Lanes Differential PCI Express transmitter Lane 0 Differential PCI Express transmitter Lane 0 Ground reference for PCI Express transmitter Lanes Differential PCI Express transmitter Lane 1 Differential PCI Express transmitter Lane 1 Ground reference for PCI Express transmitter Lanes Differential PCI Express transmitter Lane 2 Differential PCI Express transmitter Lane 2 Ground reference for PCI Express transmitter Lanes 10 A11 A12 A13 A14 A15 A16 A17 A18 A19 B1 B2 B3 B4 B5 B6 B7 B8 B9 B10 B11 B12 B13 PETp3 Differential PCI Express transmitter Lane 3 PETn3 Differential PCI Express transmitter Lane 3 GND Ground reference for PCI Express transmitter Lanes CREFCLK+ Differential 100MHz cable reference clock CREFCLK- Differential 100MHz cable reference clock GND Ground reference for PCI Express transmitter Lanes SB_RTN Signal return for single ended sideband signals CPRSNTn Used for detection of whether a cable is installed and the downstream subsystem is powered CPWRON Turns power on / off to slavetype downstream subsystems GND Ground reference for PCI Express transmitter Lanes PERp0 Differential PCI Express receiver Lane 0 PERn0 Differential PCI Express receiver Lane 0 GND Ground reference for PCI Express transmitter Lanes PERp1 Differential PCI Express receiver Lane 1 PERn1 Differential PCI Express receiver Lane 1 GND Ground reference for PCI Express transmitter Lanes PERp2 Differential PCI Express receiver Lane 2 PERn2 Differential PCI Express receiver Lane 2 GND Ground reference for PCI Express transmitter Lanes PERp3 Differential PCI Express receiver Lane 3 PERn3 Differential PCI Express receiver Lane 3 GND Ground reference for PCI Express transmitter Lanes 11 B14 B15 B16 B17 B18 PWR PWR PWR RTN PWR RTN CWAKEn +3.3VCable power +3.3VCable power Cable power return Cable power return Power management signal for B19 wakeup events (optional) CPERSTn Cable PERSTn 3.3 Switches The PCA contains x2 and x8 switches that allow configuration of the PCA PCIe mode (SW1), equalization and de-emphasis (SW2). The two switches, SW1 and SW2, are located on top of the front side of the PCA card. Figure 3-5 show the location of the board. Figure 3-5 Switches 12 Figure 3-6 show the SW1 settings Table 3-3 SW1 Settings Pin 2 UP UP Down Down Pin 1 UP Down UP Down PCIe Mode (x1/x4) NULL x1 x4(Default mode) NULL Figure 3-7 Show the SW2 Settings 13 The PI2EQX5904 chip located on the PCA has two channels, A and B, which are separately equalization controlled. Figure 3-8 shows the block diagram of the channel A and B. Table 3-4 & Table 3-5 list the SW2 pins settings on Equalizer Configuration for channel A or channel B. Figure 3-8 CH_A and CH_B of PI2EQX5904 Table 3-4 SW2 Settings (Input Equalizer Configuration for Channel A) Pin 1 0 0 0 0 1 1 1 1 SEL0_A Pin 2 0 0 1 1 0 0 1 1 SEL1_A Pin 3 0 1 0 1 0 1 0 1 SEL2_A 14 @1.25GHz 0.5dB 0.6dB 1.0 dB 1.9 dB 2.8 dB 3.6 dB 5.0 dB 7.7 dB(Default Setting) @2.5GHz 1.2 dB 1.5 dB 2.6 dB 4.3 dB 5.8 dB 7.1 dB 9.0 dB 12.3 dB(Default Setting) Table 3-5 SW2 Settings (Input Equalizer Configuration for Channel B) Pin 4 0 0 0 0 1 1 1 1 SEL0_B Pin 5 0 0 1 1 0 0 1 1 SEL1_B Pin 6 0 1 0 1 0 1 0 1 SEL2_B @1.25GHz 0.5dB 0.6dB 1.0 dB 1.9 dB 2.8 dB 3.6 dB 5.0 dB 7.7 dB(Default Setting) @2.5GHz 1.2 dB 1.5 dB 2.6 dB 4.3 dB 5.8 dB 7.1 dB 9.0 dB 12.3 dB(Default Setting) The SW2 pin 7 connects to the PI2EQX5904 RXD_A pin, while SW2 pin 8 connects to PI2EQX5904 RXD_B pin. These 2 pins are used to control channel A & B Receiver Detect Enable function. Automatic Receiver Detection is a feature that can set the number of active channels. By sensing the presence of a load device on the output, the channel can be automatically enabled to operate. When setting the RXD_A or RXD_B to a high level, Automatic Receiver Detection will be enabled. Please refer the datasheet of PI2EQX5904 for more settings. Table 3-6 SW2 Settings (Receiver Detect Function Enable for CH_A & CH_B) Pin 7 RXD_A Pin 8 1 1 1 0 0 1 0 0 RXD_B Receiver Detect Function Enable CH_A & CH_B Receiver Detect Enable (Default Setting) CH_A Receiver Detect Enable CH_B Receiver Detect Disable CH_A Receiver Detect Disable CH_B Receiver Detect Enable CH_A & CH_B Receiver Detect Disable 3.4 LEDs The PCA includes status LEDs, Please refer Table 3-7 for the status of the LED indicator. Board LED name Reference D1 CBL Description Cable PRSNT1n 15 D2 EDGE Edge PRSNT1n D3 POWER Power LED DN1 SIG_A Signal detect output for CH_A DN2 SIG_B Signal detect output for CH_B DN3 RX50_A Receiver Detect Output for CH_A0 DN4 RX50_B Receiver Detect Output for CH_B0 16 Chapter 4 Appendix 4.1 Revision Histor y Version V1.0 V1.1 Change Log Initial Version (Preliminary) Delete the chapter of TR4 demo 4.2 Copyright Statement Copyright © 2012 Terasic Technologies. All rights reserved. 17