XA-SK-UART-8

XA-SK-UART-8 Slice Card Hardware Guide REV A Publication Date: 2012/10/23 XMOS © 2012, All Rights Reserved. XA-SK-UART-8 Slice Card Hardware Guide 2/4 Table of Contents 1 Slice Card Overview 1.1 Pack Contents . . 1.2 RS232 Capability 1.3 Fixed Oscillator . 1.4 DB9 Connector . . . . . . . . . . . . . . . . . . . . . . 2 XA-SK-UART-8 Functional Pins REV A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 3 3 3 3 4 1 Slice Card Overview IN THIS CHAPTER · Pack Contents · RS232 Capability · Fixed Oscillator · DB9 Connector 1.1 Pack Contents · One XA-SK-UART-8 Slice Card 1.2 RS232 Capability 8 Uarts are provided on two 8-bit ports. An RS232 signalling level optn is provided by four SP3222EB RS232 transceivers, each handling 4 tx or 4 rx lines. The EN_N enable pins of the transceivers are controlled by populating a jumper between pins 25 and 26 of header J3. If that jumper is populated then RS232 is disabled and TTL inputs/outputs for all uarts can be accessed via J3, otherwise RS232 inputs/outputs for all uarts can be accessed via J4. 1.3 Fixed Oscillator A 1.8432 MHZ oscillator provides a fixed master reference frequency which is input into the XCore on a 1-bit port to allow the sc_multi_uart transmitter module software to obtain precise timing against standard UART baud rates. 1.4 DB9 Connector Uart channel 0 (RX and TX) can be accessed either via pins 1 and 2 of J3 or J4, or via the DB9 connector. In the latter case, RS232 mode needs to be enabled as above. REV A XA-SK-UART-8 Slice Card Hardware Guide 4/4 2 XA-SK-UART-8 Functional Pins This table shows the port mapping for each of the Slice Card Signal IO, and the Slicekit Slot connector pin it is located on. Function STAR TRIANGLE SQUARE CIRCLE PIN Description CLK_OUT RXD0 RXD1 RXD2 RXD3 RXD4 RXD5 RXD6 RXD7 TXD0 TXD1 TXD2 TXD3 TXD4 TXD5 TXD6 TXD7 1F 8A0 8A1 8A2 8A3 8A4 8A5 8A6 8A7 8B0 8B1 8B2 8B3 8B4 8B5 8B6 8B7 1L 8C0 8C1 8C2 8C3 8C4 8C5 8C6 8C7 8D0 8D1 8D2 8D3 8D4 8D5 8D6 8D7 1F 8A0 8A1 8A2 8A3 8A4 8A5 8A6 8A7 8B0 8B1 8B2 8B3 8B4 8B5 8B6 8B7 1L 8C0 8C1 8C2 8C3 NC NC NC NC 8D0 8D1 8D2 8D3 NC NC NC NC B2 B6 B7 A6 A7 B9 B11 A9 A11 B12 B13 B17 B18 A18 A17 A12 A13 1 Bit port free for GPIO Rx Data for Uart #0 Rx Data for Uart #1 Rx Data for Uart #2 Rx Data for Uart #3 Rx Data for Uart #4 Rx Data for Uart #5 Rx Data for Uart #6 Rx Data for Uart #7 Tx Data for Uart #0 Tx Data for Uart #1 Tx Data for Uart #2 Tx Data for Uart #3 Tx Data for Uart #4 Tx Data for Uart #5 Tx Data for Uart #6 Tx Data for Uart #7 Copyright © 2012, All Rights Reserved. Xmos Ltd. is the owner or licensee of this design, code, or Information (collectively, the “Information”) and is providing it to you “AS IS” with no warranty of any kind, express or implied and shall have no liability in relation to its use. Xmos Ltd. makes no representation that the Information, or any particular implementation thereof, is or will be free from any claims of infringement and again, shall have no liability in relation to any such claims. XMOS and the XMOS logo are registered trademarks of Xmos Ltd. in the United Kingdom and other countries, and may not be used without written permission. All other trademarks are property of their respective owners. Where those designations appear in this book, and XMOS was aware of a trademark claim, the designations have been printed with initial capital letters or in all capitals. REV A