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AS1713-BTDT

AS1713-BTDT

  • 厂商:

    AMSOSRAM(艾迈斯半导体)

  • 封装:

    UFDFN8

  • 描述:

    IC OPAMP DIFF 1 CIRCUIT 8MLPD

  • 数据手册
  • 价格&库存
AS1713-BTDT 数据手册
AS1713 D i f f e r e n c e A m p l i f i e r, 1 0 M H z , 1 0 V / µ s , R a i l - t o - R a i l I / O w i t h S h u td o w n D a ta S he e t 1 General Description The AS1713 is a low cost cmos difference amplifier providing extended common mode voltage range for a single rail 5V supply. Resistor trimming during final test ensures a typical common mode rejection of 60dB. Low input bias currents, 10MHz gain bandwidth, low total harmonic distortion (THD) and a rail-to-rail output drive capability of typically 200mA (@ 5V supply) provide support for a number of signal processing applications such as audio line receivers, ground loop breakers and current sensing. Linearity is suitable for 12bit ADC measurement. A classical single amplifier approach ensures that the differential gain is determined by a simple ratio of two internal resistors. A fixed gain of x1 is available. Single ended input resistance is equalised (10kΩ ±10%) at each input terminal. This feature provides additional common mode rejection when long balanced input cables connect at the input. A EN pin reduces the quiescent current of the device. 2 Key Features ! ! ! ! ! ! ! ! ! ! ! ! ! Constant Output Drive Capability: 50mA Rail-to-Rail Input and Output Supply Current: 1.6mA Single-Supply Operation: 2.7 to 5.5V Voltage Gain: 1 Gain-Bandwidth Product: 10MHz High Slew Rate: 10V/µs Power-Supply Rejection Ratio: -70dB Common Mode Rejection Ratio: -60dB No Phase Reversal for Overdriven Inputs Unity-Gain Stable for Capacitive Loads: Up to 100pF Shutdown Mode Current: 1nA MLPD (2x2mm) 8-pin package 3 Applications The device is ideal for headphone amplifiers with ground interference rejection, infotainment high drive audio line buffers with ground interference rejection, audio differential-to-single-ended conversion and instrumentation amplifier back-end. Figure 1. Block Diagram VDD INN R1 R2 SENSE EN AS1713 – + OUT INP R3 R4 REF VSS www.austriamicrosystems.com Revision 1.01 1 - 15 AS1713 Data Sheet - P i n o u t 4 Pinout Pin Assignments Figure 2. Pin Assignments (Top View) INP 1 INN 2 8 REF 7 SENSE AS1713 EN 3 VDD 4 6 VSS 5 OUT Pin Descriptions Table 1. Pin Descriptions Pin Number 1 2 3 4 5 6 7 8 Pin Name INP INN EN VDD OUT VSS SENSE REF Description Non-inverting Input. Inverting Input. Active-Low Enable Input. A logic low on this pin shuts down the device. VSS: device in shutdown. VDD: normal operation. Positive Supply Input. Amplifier Output. Negative Supply Input. This pin must be connected to ground in single-supply applications. Sense Input. Ground this pin when external inverting gain control is required. Reference Input. Reference to non-inverting input resistor network. www.austriamicrosystems.com Revision 1.01 2 - 15 AS1713 Data Sheet - A b s o l u t e M a x i m u m R a t i n g s 5 Absolute Maximum Ratings Stresses beyond those listed in Table 2 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Electrical Characteristics on page 4 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 2. Absolute Maximum Ratings Parameter Supply Voltage (VDD to VSS) Supply Voltage (All Other Pins) Output Short-Circuit Duration to VDD or VSS Thermal Resistance ΘJA ESD Operating Temperature Range Storage Temperature Range Junction Temperature -40 -65 33 1 +85 +150 +150 VSS - 0.3 Min Max +7 VDD + 0.3 1 Units V V s ºC/W kV ºC ºC ºC The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/JEDEC J-STD-020C “Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices”. The lead finish for Pb-free leaded packages is matte tin (100% Sn). on PCB HBM MIL-Std. 883E 3015.7 methods Comments Package Body Temperature +260 ºC www.austriamicrosystems.com Revision 1.01 3 - 15 AS1713 Data Sheet - E l e c t r i c a l C h a r a c t e r i s t i c s 6 Electrical Characteristics DC Electrical Characteristics VDD = 2.7V, VSS = 0V, VCM = VDD/2, VOUT = VDD/2, RLOAD = Infinite, VEN = VDD, TAMB = -40 to +85ºC. Typical values at TAMB = 25°C. Table 3. DC Electrical Characteristics Symbol VDD VOFFSET RSEIN VCM CMRR PSRR ROUT VOUT-SHDNN Parameter Supply Voltage Range Input Offset Voltage Single-Ended Input Resistance Common Mode Input Voltage Range Common Mode Rejection Ratio Power Supply Rejection Ratio Shutdown Output Impedance Shutdown Output Voltage Output Voltage Swing Inferred from Common Mode 1 Rejection Ratio VSS < VCM < VDD VDD = 2.7 to 5.5V VEN = 0V VEN = 0V, RLOAD = 2kΩ to VDD RLOAD = 32Ω VDD - VOH or VOL - VSS RLOAD = 200Ω RLOAD = 2kΩ ILOAD = 10mA, VDD = 2.7V ILOAD = 50mA, VDD = 5V Condition Inferred from Power Supply Rejection Ratio Test Min 2.7 -1.5 9 VSS -45 -60 -60 -70 130 170 350 70 9 55 100 100 mA 200 1.6 2.3 1 VSS + 0.3 VDD 0.3 50 3.2 4.6 2000 1 Typ Max 5.5 +1.5 Unit V mV kΩ V dB dB Ω 10 11 VDD 400 650 120 20 100 mV mV VOUT Output Voltage VDD - VOH or VOL - VSS mV 200 IOUT Output Source/Sink Current VDD = 2.7V, V- = VCM, V+ = VCM±100mV VDD = 5.0V, V- = VCM, V+ = VCM±100mV VDD = 2.7V, VCM = VDD/2 VDD = 5.0V, VCM = VDD/2 VEN = 0V, VDD = 2.7V Shutdown Mode IDD IDD-SHDNN Quiescent Supply Current Shutdown Supply Current mA nA EN Logic Threshold Normal Operation EN Input Bias Current 1. Guaranteed by design. VSS < VEN < VDD V pA www.austriamicrosystems.com Revision 1.01 4 - 15 AS1713 Data Sheet - E l e c t r i c a l C h a r a c t e r i s t i c s AC Electrical Characteristics VDD = 2.7V, VSS = 0V, VCM = VDD/2, VOUT = VDD/2, RLOAD = Infinite, VEN = VDD, TAMB = -40 to +85ºC. Typical values at TAMB = 25°C. Table 4. AC Electrical Characteristics Symbol GBWP fC SR PM GM THD+N CIN en Parameter Gain-Bandwidth Product Cut-off Frequency Slew Rate Phase Margin Gain Margin 1 Conditions VCM = VDD/2 Min Typ 4 8.5 5 60 10 Max Units MHz MHz V/µs deg dB dBc pF Total Harmonic Distortion Plus Noise Input Capacitance Voltage-Noise Density 1 f = 10kHz, VOUT = 2VP-P, AVCL = 1V/V 60 2 f = 1kHz f = 10kHz AVCL = 1V/V, no sustained oscillations 40 30 100 1 7 20 √Hz pF µs µs ns nV/ Capacitive-Load Stability tSHDN tENABLE tON Shutdown Time Enable Time from Shutdown Power-Up Time 1. Guaranteed by design. www.austriamicrosystems.com Revision 1.01 5 - 15 AS1713 Data Sheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s 7 Typical Operating Characteristics VDD = 2.7V; VSS = 0V, VCM = VDD/2, VOUT = VDD/2, RLOAD = ∞, VEN = VDD TAMB = +25ºC (unless otherwise specified). Figure 3. Gain and Phase vs. Frequency 100 Gain Figure 4. Gaind and Phase vs. freq.; CLOAD = 100pF 210 180 150 100 Gain 210 180 150 120 90 60 30 0 1000 100000 80 60 80 60 Phase (deg) 40 20 0 120 90 60 30 0 1000 100000 40 20 0 -20 - 40 1E-05 -20 -40 1E-05 0.001 0.1 10 0.001 0.1 10 Frequency (kHz) Figure 5. PSRR vs. Frequency 0 -10 -20 -30 -40 -50 -60 -70 -80 -90 -100 1 100 10000 1000000 Frequency (kHz) Figure 6. CMRR vs. Frequency 100 90 80 70 CMRR (dB) PSRR (dB) 60 50 40 30 20 10 0 0.00001 0.001 0.1 10 1000 Frequency (kHz) Figure 7. Supply Current vs. Temperature 3 2.5 Frequency (kHz) Figure 8. Shutdown Current vs. Temperature 100 Supply Current (mA) 2 1.5 1 0.5 Vdd = 2.7V Vdd = 5.0V Supply Current (nA) 10 1 Vdd = 2.7V Vdd = 5.0V 0 -40 -15 10 35 60 85 0.1 -40 -15 10 35 60 85 Temperature (°C) www.austriamicrosystems.com Revision 1.01 Temperature (°C) 6 - 15 Phase (deg) Phase Gain (dB) Gain (dB) Phase AS1713 Data Sheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s Figure 9. Supply Current vs. CMRR 3 2.5 Figure 10. Input Voltage Noise vs. Frequency 10000 Input Voltage Noise (nV/√Hz) Vdd = 2.7V Vdd = 5.0V Supply Current (mA) 1000 2 1.5 1 0.5 0 0 1 2 3 4 5 100 10 1 0.0001 0.01 1 100 10000 Common-Mode Voltage (V) Frequency (kHz) Figure 11. Output Swing High vs. Temp.; VDD = 2.7V 200 180 160 Figure 12. Output Swing Low vs. Temp.; VDD = 2.7V 200 180 160 VOUT - VSS (mV) 140 120 100 80 60 40 20 -40 10mA 200Ohm VOUT - VSS (mV) 140 120 100 80 60 40 20 -40 10mA 200Ohm -15 10 35 60 85 -15 10 35 60 85 Temperature (°C) Temperature (°C) Figure 13. Output Swing High vs. Temp.; VDD = 5.5V 200 180 160 Figure 14. Output Swing Low vs. Temp.; VDD = 5.5V 200 180 160 VOUT - VSS (mV) 140 120 100 80 60 40 20 -40 50mA 200Ohm VOUT - VSS (mV) 140 120 100 80 60 40 20 -40 50mA 200Ohm -15 10 35 60 85 -15 10 35 60 85 Temperature (°C) Temperature (°C) www.austriamicrosystems.com Revision 1.01 7 - 15 AS1713 Data Sheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s Figure 15. VOUT vs. IOUT, sourcing 6 5 5.0V Figure 16. VOUT vs. IOUT, sinking 2 Output Voltage (V) 4 3 2 1 0 0 50 100 150 200 250 300 t > 10s t < 1s t > 10s t < 1s Output Voltage (V) 1.5 2.7V 1 0.5 t > 10s 2.7V 5.0V t < 1s t > 10s t < 1s 0 350 0 50 100 150 200 250 300 Output Current (mA) Output Current (mA) Figure 17. Transient Response; VIN = 100mV, CLOAD = 10pF Figure 18. Transient Response; VIN = 100mV, CLOAD = 100pF IN 50mV/DIV IN 500ns/Div OUT OUT 500ns/Div Figure 19. Transient Response; VIN = 1V, CLOAD = 10pF Figure 20. Transient Response; VIN = 1V, CLOAD = 100pF IN 50mV/DIV IN OUT 500ns/Div OUT 500ns/Div www.austriamicrosystems.com Revision 1.01 50mV/DIV 50mV/DIV 8 - 15 AS1713 Data Sheet - Ty p i c a l O p e r a t i n g C h a r a c t e r i s t i c s Figure 21. Transient Response; VIN = 2V, CLOAD = 10pF Figure 22. Transient Response; VIN = 2V, CLOAD = 100pF IN 50mV/DIV IN OUT 500ns/Div OUT 500ns/Div www.austriamicrosystems.com Revision 1.01 50mV/DIV 9 - 15 AS1713 Data Sheet - A p p l i c a t i o n I n f o r m a t i o n 8 Application Information Ground Loop Interference Suppression: In real life situations the signal source and the amplifier are often located a distance apart, but still share the same ground arrangement with a number of other circuits. The ground system is never perfect as it has a small distributed resistance, capacitance and inductance. Thus, the ground appears as a distributed impedance. As a various current flow into and out of the ground system exists, a small voltage drop will inevitably occur, causing different voltages within the ground. In Figure 23 and Figure 24, RGND denotes the ground resistance between the input signal ground and the output signal ground. The voltage drop across RGND should ideally have no effect on individual circuit performance. In the single ended inverting amplifier shown in Figure 23, the amplifier sees VIN and VGND in series, so the amplifier output is: VOUT = - [R2/R1] [VIN+VGND] Figure 23. Single Ended Inverting Amplifier R1 R2 (EQ 1) – VIN + + RGND + VGND + VOUT - VGND is part of the output expression and is known as ground loop interference, ground bounce or even common impedance crosstalk. In some situations this interference signal can be close to or the same value as the wanted input signal such as in sensor applications. A difference amplifier is a simple method used to reduce the effect of ground interference. VIN is regarded as a differential input signal, and VGND a common mode signal. From Figure 24, the amplifier output is: VOUT = - [R2/R1] VIN Figure 24. Difference Amplifier R1 (EQ 2) INN R2 SENSE VIN + EN AS1713 – + OUT R4 REF + VOUT - INP R3 RGND + VGND - The additional cost of extra matched resistors is offset by the rejection of the unwanted common mode ground interference. www.austriamicrosystems.com Revision 1.01 10 - 15 AS1713 Data Sheet - A p p l i c a t i o n I n f o r m a t i o n Differential Input / Output Buffer Figure 25. Differential Input / Output Buffer VDD INN VIN Differential Input EN INP R1 AS1713 R2 SENSE – + R4 OUT REF R3 VSS VDD INN EN INP R1 AS1713 R2 SENSE VOUT Differential Output – + R4 OUT REF VDD/2 R3 VSS Rail-to-Rail Input Stage The AS1713 CMOS op amps have parallel connected n- and p-channel differential input stages that combine to accept a common-mode range extending to both supply rails. The n-channel stage is active for common-mode input voltages typically greater than (VSS + 1.2V), and the p-channel stage is active for common-mode input voltages typically less than (VDD - 1.2V). Rail-to-Rail Output Stage The minimum output is within millivolts of ground for single- supply operation, where the load is referenced to ground (VSS). Figure 26 shows the input voltage range and the output voltage swing of an AS1713 connected as a voltage follower. The maximum output voltage swing is load dependent although it is guaranteed to be within 500mV of the positive rail (VDD = 2.7V) even with maximum load (32Ω to ground) as shown in Figure 27. www.austriamicrosystems.com Revision 1.01 11 - 15 AS1713 Data Sheet - A p p l i c a t i o n I n f o r m a t i o n Figure 26. Rail-to-Rail Input / Output Range; VIN = VDD = 3.0V, RLOAD = 100kΩ Figure 27. Rail-to-Rail Input / Output Range; VIN = VDD = 3.0V, RLOAD = 32Ω IN 1V/DIV IN OUT 2µs/Div OUT 2µs/Div Note: The absolute maximum ratings (see page 3) for power dissipation and output short-circuit duration (10s, max) must be adhered since the output current can exceed 200mA (see Typical Operating Characteristics on page 6). Shutdown When EN is pulled to low, the supply current drops to 0.5µA, the amplifier is disabled and the output is driven to VSS. Pulling EN to high enables the amplifier. When exiting shutdown, there is a 6µs delay before the amplifier output becomes active. Note: Because the output is actively driven to VSS in shutdown, any pullup resistor on the output causes a current drain from the supply. Power-Up The AS1713 typically settle within 5µs after power-up. Power Supplies and Layout The AS1713 can operate from a single 2.7V to 5.5V supply or from dual ±1.35V to ±2.5V supplies. Good design improves device performance by decreasing the amount of stray capacitance at the op amp inputs/outputs. ! ! ! For single-supply operation, bypass the power supply with a 0.1µF ceramic capacitor. For dual-supply operation, bypass each supply to ground. Decrease stray capacitance by placing external components close to the op amp pins, minimizing trace and lead lengths. www.austriamicrosystems.com Revision 1.01 1V/DIV 12 - 15 AS1713 Data Sheet - P a c k a g e D r a w i n g s a n d M a r k i n g s 9 Package Drawings and Markings Figure 28. MLPD (2x2mm) 8-pin Package Table 5. MLPD (2x2mm) 8-pin package Dimensions Symbol Min Typ Max A 0.51 0.55 0.60 A1 0.00 0.02 0.05 A3 0.15 ref aaa 0.15 bbb 0.10 ccc 0.10 k 0.20 b 0.20 0.25 0.30 e 0.50 Notes: Symbol D E D2 E2 L N ND NE Min 1.45 0.75 0.225 Typ 2.00 2.00 1.60 0.90 0.325 8 4 -- Max 1.70 1.00 0.425 1. Dimensioning and tolerancing conform to ASME Y14.5M-1994. 2. All dimensions are in millimeters, angle is in degrees. 3. Terminal #1 identifier and terminal numbering convention shall conform to JESD 95-1 SPP-012. Details of terminal #1 identifier are optional, but must be located within the area indicated. The terminal #1 identifier may be either a mold, embedded metal or mark feature. 4. Dimension b applies to metallized terminal and is measured between 0.15 and 0.30mm from terminal tip. www.austriamicrosystems.com Revision 1.01 13 - 15 AS1713 Data Sheet - O r d e r i n g I n f o r m a t i o n 10 Ordering Information The device is available as the standard products shown in Table 6. Table 6. Ordering Information Model Marking Description Delivery Form Package AS1713-BTDT ABB Difference Amplifier, 10MHz, 10V/µs, Rail-to-Rail I/O with Shutdown Tape and Reel MLPD (2x2mm) 8-pin All devices are RoHS compliant and free of halogene substances. www.austriamicrosystems.com Revision 1.01 14 - 15 AS1713 Data Sheet Copyrights Copyright © 1997-2009, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. Disclaimer Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or lifesustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. For shipments of less than 100 parts the manufacturing flow might show deviations from the standard production flow, such as test flow or test location. The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. Contact Information Headquarters austriamicrosystems AG A-8141 Schloss Premstaetten, Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com/contact-us www.austriamicrosystems.com Revision 1.01 15 - 15
AS1713-BTDT 价格&库存

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