AS1753V-T

a u s t ri a m i c r o s y s t e m s AS1751 , AS1752, AS1753 H i g h - Sp e e d , L o w - Vo l ta g e , S i n g l e - S u p p l y, 0 . 9 Ω, Q u a d S P S T A n a l o g S w i t c h e s D a ta S he e t 1 General Description The AS1751/AS1752/AS1753 are high-speed, low-voltage, quad single-pole/single-throw (SPST) analog switches. Fast switching speeds, low ON-resistance, and low power consumption make these devices ideal for singlecell battery powered applications. These highly-reliable devices operate from a single +1.6 to +3.6V supply, and are differentiated by the type and number of switches: ! ! ! 2 Key Features ! ON-Resistance: - 0.9Ω (+3V supply) - 2.5Ω (+1.8V supply) RON Matching: - 0.12Ω (+3V supply) - 0.25Ω (+1.8V supply) RON Flatness: 0.1Ω (+3V Supply) Supply Voltage Range: +1.6 to +3.6V Switching Speed: tON = 22ns, tOFF = 14ns Current-Handling: 250mA Continuous Break-Before-Make Switching (AS1753) Rail-to-Rail Signal Handling 1.8V CMOS Logic Compatible (+3V Supply) Operating Temperature Range: -40 to +85ºC Package Types: - 16-pin QFN (3mm x 3mm) - 14-pin TSSOP ! ! ! ! ! ! ! ! ! ! AS1751 – Four normally open (NO) switches AS1752 – Four normally closed (NC) switches AS1753 – Two NO switches and Two NC switches The AS1753 supports break-before-make switching. With very low ON-resistance (RON), RON matching and RON flatness, the devices can accurately switch signals for sample and hold circuits, digital filters, and op-amp gain switching networks. The AS1751/AS1752/AS1753 digital logic input is 1.8V CMOS-compatible when using a +3V supply, and all devices can handle Rail-to-Rail signals. The devices are available in a 3mm x 3mm 16-pin QFN package and a 14-pin TSSOP package. Figure 1. 14-pin TSSOP Block Diagrams AS1751 1 NO1 2 COM1 3 NO2 4 COM2 5 IN2 6 IN3 7 GND 14 V+ 13 IN1 12 IN4 11 NO4 10 COM4 9 COM3 8 NO3 1 NC1 2 COM1 3 NC2 4 COM2 5 IN2 6 IN3 7 GND 3 Applications The devices are ideal for use in power routing systems, cordless and mobile phones, MP3 players, CD and DVD players, PDAs, handheld computers, digital cameras, hard drives, and any other application where high-speed signal switching is required. AS1753 14 V+ 13 IN1 12 IN4 11 NC4 10 COM4 9 COM3 8 NC3 1 NO1 2 COM1 3 NC2 4 COM2 5 IN2 6 IN3 7 GND 14 V+ 13 IN1 12 IN4 11 NC4 10 COM4 9 COM3 8 NO3 AS1752 Device AS1751 AS1752 AS1753 Input Low High Low High Low High Switch State Off On On Off Switches 1, 3 = Off Switches 2, 4 = On Switches 1, 3 = On Switches 2, 4 = Off www.austriamicrosystems.com Revision 1.4 1 - 16 A S1751, AS1752, AS1753 Data Sheet austria m i c r o systems 4 Absolute Maximum Ratings Stresses beyond those listed in Table 1 may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in Section 5 Electrical Characteristics on page 3 is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Table 1. Absolute Maximum Ratings Parameter V+, INx to GND COMx, NOx, NCx to GND † Min -0.3 -0.3 -250 -350 Max +5 V+ + 0.3 +250 +350 727 1349 Units V V mA mA mW ºC V mA ºC ºC Comments COMx, NOx, NCx Continuous Current COMx, NOx, NCx Peak Current 16-pin QFN Continuous Power Dissipation (TAMB = +70ºC) 14-pin TSSOP Operating Temperature Range Electro-Static Discharge Latch Up Immunity Junction Temperature Storage Temperature Range Pulsed at 1ms 10% duty cycle Derate at 9.1W/ºC above +70ºC Derate at 16.9W/ºC above +70ºC HBM Mil-Std883E 3015.7 methods Norm: JEDEC 17 -40 +85 2500 250 +150 -65 +150 Package Body Temperature +260 ºC The reflow peak soldering temperature (body temperature) specified is in accordance with IPC/JEDEC J-STD-020C “Moisture/Reflow Sensitivity Classification for Non-Hermetic Solid State Surface Mount Devices” † Signals on pins COM1, COM3, NO1, NO2, NC1, or NC2 that exceed V+ or GND are clamped by internal diodes. Forward-diode current should be limited to the maximum current rating. - www.austriamicrosystems.com Revision 1.4 2 - 16 A S1751, AS1752, AS1753 Data Sheet austria m i c r o systems 5 Electrical Characteristics Table 2. Power Supply Characteristics Symbol V+ I+ Parameter Power Supply Range Positive Supply Current Conditions TAMB = TMIN to TMAX V+ = 3.6V, VINx = 0 or V+, TAMB = +25ºC Min 1.6 Typ Max Unit 3.6 0.1 V µA V+ = +2.7 to +3.6V, VIH = +1.4V, VIL = +0.5V, TAMB = TMIN to TMAX (unless otherwise specified). Typ values @ V+ = +3.0V, TAMB = +25ºC. Table 3. +3V Supply Electrical Characteristics Symbol Analog Switch VCOMx, VNOx, VNCx RON Analog Signal Range ON-Resistance ON-Resistance Match 1 Between Channels ON-Resistance 2 Flatness NOx or NCx Off-Leakage Current COMx Off-Leakage Current COMx On-Leakage Current V+ = 2.7V, ICOMx = 100mA, VNOx or VNCx = 1.5V V+ = 2.7V, ICOMx = 100mA, VNOx or VNCx = 1.5V V+ = 2.7V, ICOMx = 100mA, VNOx or VNCx = 1, 1.5, or 2V V+ = 3.6V, VCOMx = 0.3 or 3.6V, VNOx or VNCx = 3.6 or 0.3V V+ = 3.6V, VCOMx = 0.3 or 3.6V, VNOx or VNCx = 3.6 or 0.3V V+ = 3.6V, VCOMx = 0.3 or 3.6V, VNOx or VNCx = 0.3 or 3.6V TAMB = +25ºC TAMB = TMIN to TMAX TAMB = +25ºC TAMB = TMIN to TMAX TAMB = +25ºC TAMB = TMIN to TMAX TAMB = +25ºC TAMB = TMIN to TMAX TAMB = +25ºC TAMB = TMIN to TMAX TAMB = +25ºC TAMB = TMIN to TMAX -2.5 -10 -2.5 -10 -2.5 -10 0.02 0.03 0 0.4 V+ 0.9 1 0.12 0.15 0.1 0.12 +2.5 +10 +2.5 +10 +2.5 +10 V Ω Parameter Conditions Min Typ Max Unit ΔRON Ω RFLAT(ON) INOx(OFF), INCx(OFF) ICOMx(OFF) Ω nA nA ICOMx(ON) nA Switch Dynamic Characteristics tON Turn On Time 3 VNOx or VNCx = 1.5V, RLOAD = 50Ω, CLOAD = 35pF, Figures 11, 12 VNOx or VNCx = 1.5V, RLOAD = 50Ω, CLOAD = 35pF, Figures 11, 12 3 TAMB = +25ºC TAMB = TMIN to TMAX TAMB = +25ºC TAMB = TMIN to TMAX TAMB = +25ºC TAMB = TMIN to TMAX 2 16 22 24 ns tOFF Turn Off Time 3 5 14 15 ns tBBM Q COFF CCOMx(OFF) CCOMx(ON) Break-Before-Make Charge Injection NOx, NCx Off-Capacitance COMx Off-Capacitance COMx On-Capacitance VNOx or VNCx = 1.5V, RLOAD = 50Ω, CLOAD = 35pF, Figure 13 (AS1753) 11 ns pC pF pF pF VGEN = V+, RGEN = 0, CLOAD = 1.0nF, Figure 14 f = 1MHz, Figure 15 f = 1MHz, Figure 15 f = 1MHz, Figure 15 2 45 49 85 www.austriamicrosystems.com Revision 1.4 3 - 16 A S1751, AS1752, AS1753 Data Sheet austria m i c r o systems Table 3. +3V Supply Electrical Characteristics (Continued) Symbol VISO Parameter Off-Isolation 5 4 Conditions f = 10MHz, RLOAD = 50Ω, CLOAD = 5pF, Figure 16 f = 1MHz, RLOAD = 50Ω, CLOAD = 5pF, Figure 16 f = 10MHz, RLOAD = 50Ω, CLOAD = 5pF, Figure 16 f = 1MHz, RLOAD = 50Ω, CLOAD = 5pF, Figure 16 f = 20Hz to 20kHz, VCOMx = 2Vp-p, RLOAD = 32Ω Min Typ -40 -55 -70 -80 0.033 Max Unit dB Crosstalk THD Logic Input VIH VIL IIN dB % Total Harmonic Distortion Input Logic High Input Logic Low Input Leakage Current VINx = 0 or V+ 1.4 0.5 -1 0.0001 +1 V V µA V+ = +1.8V, VIH = +1.0V, VIL = 0.4V, TAMB = TMIN to TMAX (unless otherwise specified). Typ values @ TAMB = +25ºC. Table 4. +1.8V Supply Electrical Characteristics Symbol Analog Switch VCOMx, VNOx, VNCx RON Analog Signal Range ON-Resistance ON-Resistance Match Between 1 Channels V+ = 1.8V, ICOMx = 10mA, VNOx or VNCx = 0.9V V+ = 1.8V, ICOMx = 10mA, VNOx or VNCx = 0.9V TAMB = +25ºC TAMB = TMIN to TMAX TAMB = +25ºC TAMB = TMIN to TMAX 0.05 0 0.9 V+ 2.5 3 0.25 0.25 Ω V Ω Parameter Conditions Min Typ Max Unit ΔRON Switch Dynamic Characteristics tON Turn On Time 3 VNOx or VNCx = 1.0V, TAMB = +25ºC RLOAD = 50Ω, CLOAD = 35pF, TAMB = TMIN to TMAX Figures 11, 12 VNOx or VNCx = 1.0V, TAMB = +25ºC RLOAD = 50Ω, CLOAD = 35pF, TAMB = TMIN to TMAX Figures 11, 12 VGEN = V+, RGEN = 0, CLOAD = 1.0nF, Figure 14 1.0 22 30 35 ns tOFF Q Logic Input VIH VIL IIN Turn Off Time 3 12 20 25 ns pC V Charge Injection Input Logic High Input Logic Low Input Leakage Current 1 0.4 VINx = 0 or V+ -1 0.0001 +1 V µA 1. ΔRON = RON(MAX) - RON(MIN). 2. Flatness is defined as the difference between the maximum and the minimum value of ON-resistance as measured over the specified analog signal ranges. 3. Guaranteed by design. 4. Off-Isolation = 20log10(VCOMx/VNOx), VCOMx = output, VNOx = input to off switch. 5. Between two switches. www.austriamicrosystems.com Revision 1.4 4 - 16 A S1751, AS1752, AS1753 Data Sheet austria m i c r o systems 6 Typical Operating Characteristics Figure 2. Frequency Response 10 0 -10 -20 -40 -50 -60 -70 -80 -90 -100 0.01 0.1 1 10 100 1000 Bandwidth Figure 3. Total Harmonic Distortion vs. Frequency 0.04 0.035 0.03 VDD = 3V Response (dB) THD (%) -30 0.025 0.02 0.015 0.01 0.005 0 1 10 100 1000 10000 100000 Frequency (MHz) Figure 4. Turn On/Turn Off Time vs. Temperature 20 18 16 14 12 10 8 6 4 2 0 -40 -15 10 35 60 85 tOFF tON Frequency (Hz) Figure 5. Turn On/Off Time vs. Supply Voltage 26 24 22 20 18 16 14 12 10 8 6 4 2 0 1.6 2 2.4 tON Time (ns) Time (ns) tOFF 2.8 3.2 3.6 Temperature (°C) Figure 6. RON vs. VCOM and Temperature; VDD = 2.7V 0.50 0.45 0.40 Temp = +85ºC Supply Voltage (V) Figure 7. RON vs. VCOM 1.0 0.9 0.8 VDD = 1.8V RON (Ω ) 0.35 0.30 0.25 0.20 0 0.5 Temp = +25ºC RON (Ω ) 0.7 0.6 0.5 VDD = 2V VDD = 2.7V VDD = 3V VDD = 2.5V VDD = 3.3V Temp = -40ºC 0.4 0.3 VDD = 3.6V 1 1.5 2 2.5 3 0 0.5 1 1.5 2 2.5 3 3.5 VCOM (V) VCOM (V) www.austriamicrosystems.com Revision 1.4 5 - 16 A S1751, AS1752, AS1753 austria m i c r o systems Data Sheet Figure 8. Charge Injection vs. VCOM 60 50 40 Q (pC) 30 20 VDD = 3V VDD = 1.8V 10 0 0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7 3 VCOM (V) www.austriamicrosystems.com Revision 1.4 6 - 16 A S1751, AS1752, AS1753 austria m i c r o systems ON-Resistance Data Sheet 7 Detailed Description The AS1751/AS1752/AS1753 are low ON-resistance, low-voltage, quad analog SPST switches that operate from a single +1.6 to +3.6V supply. CMOS process technology allows switching of analog signals that are within the supply voltage range (GND to V+). Figure 9. 16-pin QFN Block Diagrams 16 COM1 15 NO1 14 V+ 13 IN1 16 COM1 15 NC1 14 V+ 13 IN1 16 COM1 15 NO1 14 V+ 13 IN1 12 IN4 11 NC4 10 N/C 9 COM4 1 NO2 2 COM2 3 N/C 4 IN2 AS1751 12 IN4 11 NO4 10 N/C 9 COM4 1 NC2 2 COM2 3 N/C 4 IN2 AS1752 1 NC2 2 COM2 3 N/C 4 IN2 AS1753 12 IN4 11 NC4 10 N/C 9 COM4 5 IN3 6 GND 7 NO3 8 COM3 5 IN3 6 GND 7 NC3 8 COM3 Table 5. Truth Tables Device Input Switch State AS1751 AS1752 AS1753 Low High Low High Low High Switches 1, 3 = Off Switches 1, 3 = On Off On On Off Switches 2, 4 = On Switches 2, 4 = Off ON-Resistance When powered from a +3V supply, the low (0.9Ω, max) ON-resistance allows high-speed, continuous signals to be switched in a variety of applications. Bi-Directional Switching Pins NOx, NCx, and COMx are bi-directional, thus they can be used as inputs to- or outputs from other components. Analog Signal Levels Analog signals ranging over the entire supply voltage range (V+ to GND) can be switched with very little change in ONresistance (see Typical Operating Characteristics on page 5). Logic Inputs The devices’ logic inputs can be driven up to +3.6V regardless of the supply voltage value. For example, with a +1.8V supply, INx may be driven low to GND and high to +3.6V. This allows the devices to interface with +3V systems using a supply of less than 3V. www.austriamicrosystems.com Revision 1.4 5 IN3 6 GND 7 NO3 8 COM3 7 - 16 A S1751, AS1752, AS1753 austria m i c r o systems Power Supply Sequencing Data Sheet 8 Application Information Power Supply Sequencing Proper power-supply sequencing is critical for proper switch operation. The power supplies should be started up in the following sequence: 1. V+ 2. NOx, NCx, COMx Note: Do not exceed the absolute maximum ratings (see page 2). Overvoltage Protection ON-resistance increases slightly at lower supply voltages. Figure 10. Overvoltage Protection using 2 External Blocking Diodes AS1751/AS1752/AS1753 D1 V+ V+ COMx VGEN NOx GND D2 Adding diode D2 to the circuit shown in Figure 10 causes the logic threshold to be shifted relative to GND. Diodes D1 and D2 also protect against overvoltage conditions. For example, in the circuit shown in Figure 10, if the supply voltage goes below the absolute maximum rating, and if a fault voltage up to the absolute maximum rating is applied to an analog signal pin, no damage will result. Power Supply Bypass Power supply connections to the devices must maintain a low impedance to ground. This can be done using a bypass capacitor, which will also improve noise margin and prevent switching noise propagation from the V+ supply to other components. A 0.1µF bypass capacitor, connected from V+ to GND (see Figure 16 on page 10), is adequate for most applications. Logic Inputs Driving INx Rail-to-Rail will help minimize power consumption. Layout Considerations High-speed switches require proper layout and design procedures for optimum performance. ! ! ! Short, wide traces should be used to reduce stray inductance and capacitance. Bypass capacitors should be as close to the device as possible. Large ground planes should be used wherever possible. www.austriamicrosystems.com Revision 1.4 8 - 16 A S1751, AS1752, AS1753 austria m i c r o systems Timing Diagrams and Test Setups Data Sheet Timing Diagrams and Test Setups Figure 11. AS1751/AS1753 Test Circuit and Timing Diagram V+ VNOx VIH + 0.5V INx 0 VCOMx 50Ω 35pF VNOx VCOMx 0 90% 90% V+ NOx tR < 5ns tF < 5ns 50% 50% AS1751/ AS1753 50Ω INx COMx GND tON tOFF Figure 12. AS1752/AS1753 Test Circuit and Timing Diagram V+ NCx VNCx VIH + 0.5V INx 0 VCOMx 50Ω 35pF VNCx VCOMx 0 90% 90% 50% 50% tR < 5ns tF < 5ns V+ AS1752/ AS1753 50Ω INx COMx GND tOFF tON Figure 13. AS1753 Test Circuit and Timing Diagram VS V+ VS VIH + 0.5V INx 0 VS VCOMx 50Ω GND 35pF VCOMx 0 tBBM tBBM 90% 90% tR < 5ns tF < 5ns NC2 V+ NO1 AS1753 COM1 COM2 50Ω INx tBBM = tON(NOx) - tOFF(NCx) or tBBM = tON(NCx) - tOFF(NOx) Figure 14. Charge Injection V+ NCx or NOx V+ RGEN VGEN VOUT CLOAD 1000pF VOUT ΔVOUT VIN 0 AS1751 AS1752 V+ AS175x INx VIN 50Ω GND COMx ΔVOUT is the measured voltage due to charge transfer error Q when the channel turns off. Q = ΔVOUT x CLOAD www.austriamicrosystems.com Revision 1.4 9 - 16 A S1751, AS1752, AS1753 austria m i c r o systems Timing Diagrams and Test Setups Data Sheet Figure 15. NOx, NCx, and COMx Capacitance AS1751/ AS1752/ AS1753 V+ V+ COMx 1MHz Capacitance Analyzer As Required INx GND NCx or NOx Figure 16. Off-Isolation, On-Loss, and Crosstalk Network Analyzer NOx or NCx † VIN 50Ω 50Ω V+ 0.1µF V+ AS1751/ AS1752/ AS1753 INx COMx GND Measure VOUT Reference 50Ω 50Ω † Use 50Ω termination for off-isolation Notes: 1. Measurements are standardized against short-circuit at socket terminals. 2. Off-isolation is measured between COMx and the off NCx/NOx terminal on each switch. Off-isolation = 20log (VOUT/ VIN). 3. On-loss is measured between COMx and the on NCx/NOx terminal on each switch. On-loss = 20log (VOUT/VIN). 4. Signal direction through the switch is reversed; worst values are recorded. www.austriamicrosystems.com Revision 1.4 10 - 16 A S1751, AS1752, AS1753 austria m i c r o systems Pin Assignments Data Sheet 9 Pinout and Packaging Pin Assignments Figure 17. QFN Pin Assignments (Top View) 16 COM1 16 COM1 16 COM1 15 NO1 15 NO1 15 NC1 13 IN1 13 IN1 NO2 1 COM2 2 12 IN4 NC2 1 COM2 2 12 IN4 NC2 1 COM2 2 13 IN1 12 IN4 11 NC4 10 14 V+ 14 V+ – 3 AS1751 11 NO4 10 – – 3 AS1752 11 NC4 10 – – 3 AS1753 14 V+ – IN2 4 IN3 5 GND 6 NO3 7 COM3 8 9 COM4 IN2 4 IN3 5 GND 6 NC3 7 COM3 8 9 COM4 IN2 4 IN3 5 GND 6 NO3 7 COM3 8 9 COM4 Figure 18. TSSOP Pin Assignments (Top View) NO1 1 COM1 2 NO2 3 COM2 4 IN2 5 IN3 6 GND 7 14 V+ 13 IN1 12 IN4 NC1 1 COM1 2 NC2 3 COM2 4 IN2 5 IN3 6 GND 7 14 V+ 13 IN1 12 IN4 NO1 1 COM1 2 NC2 3 COM2 4 IN2 5 IN3 6 GND 7 14 V+ 13 IN1 12 IN4 AS1751 11 NO4 10 COM4 9 COM3 8 NO3 AS1752 11 NC4 10 COM4 9 COM3 8 NC3 AS1753 11 NC4 10 COM4 9 COM3 8 NO3 Pin Descriptions Table 6. Pin Descriptions Pin Number Pin Name Description COM1: COM4 GND (see Figure 17 and Figure 18) IN1:IN4 NC1:NC4 NO1:NO4 V+ Analog Switch 1, 2, 3, 4 Common Ground Analog Switch 1, 2, 3, 4 Logic Control Input Analog Switch 1, 2, 3, 4 Normally Closed Terminal Analog Switch 1, 2, 3, 4 Normally Open Terminal Input Supply Voltage, +1.6 to +3.6V www.austriamicrosystems.com Revision 1.4 11 - 16 A S1751, AS1752, AS1753 austria m i c r o systems Package Drawings and Markings Data Sheet Package Drawings and Markings The devices are available in an 16-pin QFN package and an 14-pin TSSOP package. Figure 19. 16-pin QFN Package D D/2 INDEX AREA (D/2 xE/2) 4 -BNXL E2/2 -A- D2 D2/2 E/2 e -B- aaa C 2x SEE DETAIL B PIN 1 MARKER E 2 1 N N-1 INDEX AREA (D/2 xE/2) NXb -Abbb ddd BTM VIEW 5 CAB C 6 SEE DETAIL B aaa C 2x TOP VIEW 4 ccc C 11 NX 0.08 C A SIDE VIEW A1 SEATING PLANE -C- 8 9 A3 Symbol Common Dimensions Min Nom Max Notes aaa Datum A or B 0.15 0.10 0.10 0.05 0.70 0.00 0.75 0.02 0.20 Ref 0.03 3.00 3.00 1.30 1.30 0.30 1.45 1.45 0.40 16 4 4 1.55 1.55 0.50 0.15 0.80 0.05 bbb ccc 12 L1 ddd A A1 A3 DETAIL B e/2 e EVEN TERMINAL SIDE Terminal Tip 5 L1 D BSC E BSC D2 E2 L N ND NE 1, 2, 10 1, 2, 10 1, 2, 10 1, 2, 10 1, 2, 10 1, 2, 10 1, 2, 10 1, 2, 10 www.austriamicrosystems.com Revision 1.4 E2 1, 2 1, 2 1, 2 1, 2 12 - 16 A S1751, AS1752, AS1753 austria m i c r o systems Package Drawings and Markings Data Sheet Notes: Dimensioning and tolerancing conform to ASME Y14.5M-1994. All dimensions are in millimeters; angles in degrees. N is the total number of terminals. The terminal #1 identifier and terminal numbering convention shall conform to JEDEC 95 SPP-012. Details of terminal #1 identifier are optional but must be located within the zone indicated. The terminal #1 identifier may be either a mold or marked feature. 5. Dimension b applies to metallized terminal and is measured between 0.15 and 0.30mm from terminal tip. If one end of the terminal has the optional radius, the b dimension should not be measured in that radius area. 6. Dimensions ND and NE refer to the number of terminals on each D and E side, respectively. 7. Depopulation is possible in a symmetrical fashion. 8. Figure 19 is shown for illustration only and does not represent any specific variation. 9. All variations may be constructed per Figure 19, however variations may alternately be constructed between square or rectangle shape per dimensions D and E. 10. Refer to the Dimensions Table for a complete set of dimensions. 11. Bilateral coplanarity zone applies to the exposed heat sink slug as well as the terminals. 12. Depending on the method of lead termination at the edge of the package, pullback (L1) may be present. L minus L1 to be ≥ 0.33mm. 13. For variations with more than one lead count for a given body size and terminal pitch, each lead count for that variation is denoted by a dash number (e.g., -1 or -2). 14. NJR designates non-JEDEC registered package. 1. 2. 3. 4. www.austriamicrosystems.com Revision 1.4 13 - 16 A S1751, AS1752, AS1753 austria m i c r o systems Package Drawings and Markings Data Sheet Figure 20. 14-pin TSSOP Package Symbol A A1 A2 L R R1 b b1 c c1 D E1 E Notes: 0.65mm Lead Pitch Min Nom Max 1.10 0.05 0.15 0.85 0.90 0.95 0.50 0.60 0.75 0.09 0.09 0.19 0.30 0.19 0.22 0.25 0.09 0.20 0.09 0.16 1, 2 Note Symbol θ1 L1 aaa bbb ccc ddd e θ2 θ3 5 0.65mm Lead Pitch Min Nom Max 0º 8º 1.0 Ref 0.10 0.10 0.05 0.20 0.65 BSC 12º Ref 12º Ref 1, 2 Note 4.90 4.30 5.00 4.40 6.4 BSC 5.10 4.50 Variations 3, 8 e 4, 8 N 0.65 BSC 14 6 1. All dimensions are in millimeters; angles in degrees. 2. Dimensions and tolerancing per ASME Y14.5M-1994. 3. Dimension D does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not exceed 0.15mm per side. 4. Dimension E1 does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25mm per side. 5. Dimension b does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm total in excess of dimension b at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum space between protrusion and adjacent lead is 0.07mm for 0.5mm pitch packages. 6. Terminal numbers shown are for reference only. 7. Datums A and B to be determined at datum plane H. 8. Dimensions D and E1 to be determined at datum plane H. 9. This dimension applies only to variations with an even number of leads per side. For variations with an odd number of leads per package, the center lead must be coincident with the package centerline, datum A. 10. Cross section A-A to be determined at 0.10 to 0.25mm from the leadtip. www.austriamicrosystems.com Revision 1.4 14 - 16 A S1751, AS1752, AS1753 austria m i c r o systems Data Sheet 10 Ordering Information The devices are available as the standard products shown in Table 7. Table 7. Ordering Information Part Description Delivery Form Package AS1751S AS1751S-T AS1751V † † SPST Switch Quad SPST Switch Quad SPST Switch Quad SPST Switch Quad SPST Switch Quad SPST Switch Quad SPST Switch Quad SPST Switch Quad SPST Switch Quad SPST Switch Quad SPST Switch Quad SPST Switch Tube Tape and Reel Tray Tape and Reel Tube Tape and Reel Tray Tape and Reel Tube Tape and Reel Tray Tape and Reel 14-TSSOP 14-TSSOP 16-QFN 3mmx3mm 16-QFN 3mmx3mm 14-TSSOP 14-TSSOP 16-QFN 3mmx3mm 16-QFN 3mmx3mm 14-TSSOP 14-TSSOP 16-QFN 3mmx3mm 16-QFN 3mmx3mm AS1751V-T AS1752S AS1752S-T AS1752V † † AS1752V-T AS1753S AS1753S-T AS1753V † † AS1753V-T † Future Product www.austriamicrosystems.com Revision 1.4 15 - 16 A S1751, AS1752, AS1753 austria m i c r o systems Data Sheet Copyrights Copyright © 1997-2005, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe. Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. All products and companies mentioned are trademarks or registered trademarks of their respective companies. Disclaimer Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information. This product is intended for use in normal commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or lifesustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for each application. The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However, austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of austriamicrosystems AG rendering of technical or other services. Contact Information Headquarters austriamicrosystems AG A-8141 Schloss Premstaetten, Austria Tel: +43 (0) 3136 500 0 Fax: +43 (0) 3136 525 01 e-mail: info@austriamicrosystems.com For Sales Offices, Distributors and Representatives, please visit: http://www.austriamicrosystems.com austriamicrosystems www.austriamicrosystems.com Revision 1.4 – a leap ahead 16 - 16