NANO100SD3BN

NuMicro Nano100 (B) Product Brief NuMicro™ Family Nano100 Series Product Brief Nuvoton is providing this document only for reference purposes of NuMicro microcontroller based system design. Nuvoton assumes no responsibility for errors or omissions. All data and specifications are subject to change without notice. For additional information or questions, please contact: Nuvoton Technology Corporation. www.nuvoton.com NUMICRO™ NANO100 SERIES PRODUCT BRIEF The information described in this document is the exclusive intellectual property of Nuvoton Technology Corporation and shall not be reproduced without permission from Nuvoton. NuMicro Nano100 (B) Product Brief NUMICRO™ NANO100 SERIES PRODUCT BRIEF Table of Contents LIST OF FIGURES ........................................................................................................................... 3 LIST OF TABLES ............................................................................................................................. 4 1 GENERAL DESCRIPTION ..................................................................................................... 5 2 FEATURES ............................................................................................................................. 7 2.1 Nano100 Features – Base Line ................................................................................... 7 3 2.2 Nano110 Features – LCD Line .................................................................................. 13 2.3 Nano120 Features – USB Connectivity Line ............................................................. 19 2.4 Nano130 Features – Advanced Line.......................................................................... 25 PARTS INFORMATION LIST AND PIN CONFIGURATION ................................................ 31 3.1 NuMicro Nano100 Series Selection Code ............................................................... 31 3.2 NuMicro Nano100 Products Selection Guide .......................................................... 32 3.3 3.4 4 5 3.2.1 NuMicro Nano100 Base Line Selection Guide............................................................. 32 3.2.2 NuMicro Nano110 LCD Line Selection Guide.............................................................. 32 3.2.3 NuMicro Nano120 USB Connectivity Line Selection Guide ......................................... 32 3.2.4 NuMicro Nano130 Advanced Line Selection Guide ..................................................... 33 Pin Configuration ........................................................................................................ 34 3.3.1 NuMicro Nano100 Pin Diagrams ................................................................................. 34 3.3.2 NuMicro Nano110 Pin Diagrams ................................................................................. 37 3.3.3 NuMicro Nano120 Pin Diagrams ................................................................................. 39 3.3.4 NuMicro Nano130 Pin Diagrams ................................................................................. 42 Pin Description ........................................................................................................... 44 3.4.1 NuMicro Nano100 Pin Description ............................................................................... 44 3.4.2 NuMicro Nano110 Pin Description ............................................................................... 55 3.4.3 NuMicro Nano120 Pin Description ............................................................................... 70 3.4.4 NuMicro Nano130 Pin Description ............................................................................... 81 3.5 Nano100 Block Diagram ............................................................................................ 95 3.6 Nano110 Block Diagram ............................................................................................ 96 3.7 Nano120 Block Diagram ............................................................................................ 97 3.8 Nano130 Block Diagram ............................................................................................ 98 PACKAGE DIMENSIONS ..................................................................................................... 99 4.1 LQFP128 (14x14x1.4 mm footprint 2.0 mm) .............................................................. 99 4.2 LQFP64 (10x10x1.4 mm footprint 2.0 mm) .............................................................. 100 4.3 LQFP64 (7x7x1.4 mm footprint 2.0 mm) .................................................................. 101 4.4 LQFP48 (7x7x1.4 mm footprint 2.0 mm) .................................................................. 103 4.5 QFN48 (7x7x0.85 mm) ............................................................................................. 104 REVISION HISTORY .......................................................................................................... 105 Jun 17, 2014 Page 2 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief LIST OF FIGURES TM Nano100 Series Selection Code ................................................................ 31 TM Nano100 LQFP 128-pin Diagram............................................................... 34 TM Nano100 LQFP 64-pin Diagram................................................................. 35 TM Nano100 LQFP 48-pin Diagram ................................................................. 36 TM Nano110 LQFP 128-pin Diagram ............................................................... 37 TM Nano110 LQFP 64-pin Diagram ................................................................. 38 TM Nano120 LQFP 128-pin Diagram ............................................................... 39 TM Nano120 LQFP 64-pin Diagram ................................................................. 40 TM Nano120 LQFP 48-pin Diagram ................................................................. 41 Figure 3‑1 NuMicro Figure 3‑2 NuMicro Figure 3‑3 NuMicro Figure 3‑4 NuMicro Figure 3‑5 NuMicro Figure 3‑6 NuMicro Figure 3‑7 NuMicro Figure 3‑8 NuMicro Figure 3‑9 NuMicro TM Nano130 LQFP 128-pin Diagram ............................................................. 42 TM Nano130 LQFP 64-pin Diagram ............................................................... 43 Figure 3‑10 NuMicro Figure 3‑11 NuMicro TM Nano100 Block Diagram............................................................................. 95 TM Nano110 Block Diagram............................................................................. 96 TM Nano120 Block Diagram............................................................................. 97 TM Nano130 Block Diagram............................................................................. 98 Figure 4‑1 NuMicro Figure 4‑2 NuMicro Figure 4‑3 NuMicro Figure 4‑4 NuMicro NUMICRO™ NANO100 SERIES PRODUCT BRIEF Jun 17, 2014 Page 3 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief LIST OF TABLES Table 1‑1 Connectivity Support Table ............................................................................................. 6 Table 3‑1 Nano100 Base Line Selection Table ............................................................................. 32 NUMICRO™ NANO100 SERIES PRODUCT BRIEF Table 3‑2 Nano110 LCD Line Selection Table .............................................................................. 32 Table 3‑3 Nano120 USB Connectivity Line Selection Table ......................................................... 32 Table 3‑4 Nano130 Advanced Line Selection Table ..................................................................... 33 Jun 17, 2014 Page 4 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief 1 GENERAL DESCRIPTION ® The Nano100 series ultra-low power 32-bit microcontroller is embedded with ARM Cortex™-M0 core operated at a wide voltage range from 1.8V to 3.6V and runs up to 42 MHz frequency with 32K/64K/128K bytes embedded Flash and 8K/16K-byte embedded SRAM. Integrating LCD 4x40 or 6x38 (COM/Segment), USB 2.0 full-speed function, RTC, 12-bit SAR ADC, 12-bit DAC and 2 2 provides high performance connectivity peripheral interfaces such as UART, SPI, I C, I S, GPIOs, EBI (External Bus Interface) for external memory-mapped device access and ISO-7816-3 for Smart card, the Nano100 series supports Brown-out Detector, Power-down mode with RAM retention and fast wake-up via many peripheral interfaces. The Nano100 series provides low power voltage, low power consumption, low standby current, high integration peripherals, high-efficiency operation, fast wake-up function and the lowest cost 32-bit microcontrollers. The Nano100 series is suitable for a wide range of battery device applications such as: Portable Data Collector  Portable Medical Monitor  Portable RFID Reader  Portable Barcode Scanner  Security Alarm System  System Supervisors  Power Metering  USB Accessories  Smart Card Reader  Wireless Game Control Device  IPTV Remote Smart Keyboard  Wireless Sensors Node Device (WSN)  Wireless RF4CE Remote Control  Wireless Audio  Wireless Automatic Meter Reader (AMR)  Electronic Toll Collection (ETC) ® The Nano100 Base line, an ultra-low power 32-bit microcontroller with the embedded ARM Cortex™-M0 core, operates at wide voltage range from 1.8V to 3.6V and runs up to 42 MHz frequency with 32K/64K/128K bytes embedded flash and 8K/16K bytes embedded SRAM. It integrates RTC, 12- channels 12-bit SAR ADC, 2-channels 12-bit DAC and provides high 2 2 performance connectivity peripheral interfaces such as 2xUART, 3xSPI, 2xI C, I S, GPIOs, EBI (External Bus Interface) for external memory-mapped device access and 3xISO-7816-3 for Smart card. The Nano100 Base line supports Brown-out Detector, Power-down mode with RAM retention and fast wake-up via many peripheral interfaces. ® The Nano110 LCD line, an ultra-low power 32-bit microcontroller with the embedded ARM Cortex™-M0 core, operates at wide voltage range from 1.8V to 3.6V and runs up to 42 MHz frequency with 32K/64K/128K bytes embedded flash and 8K/16K bytes embedded SRAM. It integrates LCD 4x40 or 6x38 (COM/Segment). RTC, 12-channels 12-bit SAR ADC, 2-channels 12-bit DAC and provides high performance connectivity peripheral interfaces such as 2xUART, 2 2 2xSPI, 2xI C, I S, GPIOs, EBI (External Bus Interface) for external memory-mapped device access and 3xISO-7816-3 for Smart card. The Nano110 LCD line supports Brown-out Detector, Jun 17, 2014 Page 5 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF  NuMicro Nano100 (B) Product Brief NUMICRO™ NANO100 SERIES PRODUCT BRIEF Power-down mode with RAM retention and fast wake-up via many peripheral interfaces. The Nano120 USB Connectivity line, an ultra-low power 32-bit microcontroller with the embedded ® ARM Cortex™-M0 core, operates at wide voltage range from 1.8V to 3.6V and runs up to 42 MHz frequency with 32K/64K/128K bytes embedded flash and 8K/16K bytes embedded SRAM. It integrates USB 2.0 full-speed device function, RTC, 12-channels12-bit SAR ADC, 2-channels 12bit DAC and provides high performance connectivity peripheral interfaces such as 2xUART, 3xSPI, 2xI2C, I2S, GPIOs, EBI (External Bus Interface) for external memory-mapped device access and 3xISO-7816-3 for Smart card. The Nano120 USB Connectivity line supports Brownout Detector, Power-down mode with RAM retention and fast wake-up via many peripheral interfaces. ® The Nano130 Advanced line, an ultra-low power 32-bit microcontroller with the embedded ARM Cortex™-M0 core, operates at wide voltage range from 1.8V to 3.6V and runs up to 42 MHz frequency with 32K/64K/128K bytes embedded flash and 8K/16K bytes embedded SRAM. It integrated LCD 4x40 or 6x38 (COM/Segment), USB 2.0 full-speed device function, RTC, 8channels 12-bit SAR ADC, 2-channels 12-bit DAC and provides high performance connectivity 2 2 peripheral interfaces such as 2xUART, 2xSPI, 2xI C, I S, GPIOs, EBI (External Bus Interface) for external memory-mapped device access and 3xISO-7816-3 for Smart card. The Nano130 Advanced line supports Brown-out Detector, Power-down mode with RAM retention and fast wake-up via many peripheral interfaces. I C I S USB LCD ADC DAC RTC EBI 2 2 SC Timer ● ● ● ● ● ● ● Nano120 ● ● ● ● ● Nano130 ● ● ● ● ● Product Line UART SPI Nano100 ● Nano110 ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● ● Table 1‑1 Connectivity Support Table Jun 17, 2014 Page 6 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief 2 FEATURES The equipped features are dependent on the product line and their sub products. 2.1 Nano100 Features – Base Line   Core ARM Cortex™-M0 core running up to 42 MHz  One 24-bit system timer  Supports Low Power Sleep mode  Single-cycle 32-bit hardware multiplier  NVIC for the 32 interrupt inputs, each with 4-levels of priority  Serial Wire Debug supports with 2 watchpoints/4 breakpoints Brown-out    Flash EPROM Memory  Runs up to 42 MHz with zero wait state for discontinuous address read access  64K/32K/123K bytes application program memory (APROM)  4 KB in system programming (ISP) loader program memory (LDROM)  Programmable data flash start address and memory size with 512 bytes page erase unit  In System Program (ISP)/In Application Program (IAP) to update on-chip Flash EPROM SRAM Memory  16K/8K bytes embedded SRAM  Supports DMA mode DMA: Supports 8 channels: one VDMA channel, 6 PDMA channels and one CRC channel   Jun 17, 2014 Built-in 2.5V/2.0V/1.7V BOD for wide operating voltage range operation VDMA  Memory-to-memory transfer  Supports block transfer with stride  Supports word/half-word/byte boundary address  Supports address direction: increment and decrement PDMA  Peripheral-to-memory, transfer  Supports word boundary address  Supports word alignment transfer length in memory-to-memory mode  Supports word/half-word/byte alignment transfer length in peripheral-tomemory and memory-to-peripheral mode memory-to-peripheral, Page 7 of 106 and memory-to-memory Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF  ®  NuMicro Nano100 (B) Product Brief   Supports word/half-word/byte transfer data width from/to peripheral  Supports address direction: increment, fixed, and wrap around CRC NUMICRO™ NANO100 SERIES PRODUCT BRIEF    Jun 17, 2014 16 12 5  CRC-CCITT: X  CRC-8: X + X + X + 1  CRC-16: X  CRC-32: X + X 4 2 X +X +X+1 8 +X +X +1 2 16 32 +X 15 +X +1 2 26 +X 23 +X 22 +X 16 +X 12 +X 11 +X 10 8 7 5 +X +X +X + Clock Control  Flexible selection for different applications  Built-in 12 MHz OSC, can be trimmed to 0.25% deviation within all temperature range when turning on auto-trim function (system must have external 32.768 kHz crystal input) otherwise 12 MHz OSC has 2 % deviation within all temperarure range.  Low power 10 kHz OSC for watchdog and low power system operation  Supports one PLL, up to 120 MHz, for high performance system operation and USB application (48 MHz).  External 4~24 MHz crystal input for precise timing operation  External 32.768 kHz crystal input for RTC function and low power system operation GPIO   Supports four common polynomials CRC-CCITT, CRC-8, CRC-16, and CRC-32 Three I/O modes:  Push-Pull output  Open-Drain output  Input only with high impendence  All inputs with Schmitt trigger  I/O pin configured as interrupt source with edge/level setting  Supports High Driver and High Sink I/O mode  Supports input 5V tolerance, except PA.0 ~ PA.7, PD.0 ~ PD.1 and PC.6 ~ PC.7 Timer  Supports 4 sets of 32-bit timers, each with 24-bit up-counting timer and one 8-bit pre-scale counter  Independent Clock Source for each timer  Provides one-shot,periodic, output toggle and continuous operation modes  Internal trigger event to ADC, DAC and PDMA  Supports PDMA mode  Wake system up from Power-down mode Page 8 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief     Jun 17, 2014  Clock Source from LIRC (Internal 10 kHz Low Speed Oscillator Clock)  Selectable time-out period from 1.6 ms ~ 26 sec (depending on clock source)  Interrupt or reset selectable when watchdog time-out  Wake system up from Power-down mode Window Watchdog Timer(WWDT)  6-bit down counter and 6-bit compare value to make the window period flexible  Selectable WWDT clock pre-scale counter to make WWDT time-out interval variable. RTC  Supports software compensation by setting frequency compensate register (FCR)  Supports RTC counter (second, minute, hour) and calendar counter (day, month, year)  Supports Alarm registers (second, minute, hour, day, month, year)  Selectable 12-hour or 24-hour mode  Automatic leap year recognition  Supports periodic time tick interrupt with 8 periodic options 1/128, 1/64, 1/32, 1/16, 1/8, 1/4, 1/2 and 1 second  Wake system up from Power-down mode  Supports 80 bytes spare registers and a snoop pin to clear the content of these spare registers PWM/Capture  Supports 2 PWM modules, each has two 16-bit PWM generators  Provides eight PWM outputs or four complementary paired PWM outputs  Each PWM generator equipped with one clock divider, one 8-bit prescaler, two clock selectors, and one Dead-zone generator for complementary paired PWM  (Shared with PWM timers) with eight 16-bit digital capture timers provides eight rising/ falling/both capture inputs.  Supports One-shot and Continuous mode  Supports Capture interrupt UART  Up to two 16-byte FIFO UART controllers  UART ports with flow control (TX, RX, CTSn and RTSn)  Supports IrDA (SIR) function  Supports LIN function  Supports RS-485 9 bit mode and direction control.  Programmable baud rate generator  Supports PDMA mode Page 9 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF  Watchdog Timer NuMicro Nano100 (B) Product Brief  NUMICRO™ NANO100 SERIES PRODUCT BRIEF    Jun 17, 2014 Wake system up from Power-down mode SPI  Up to three sets of SPI controller  Master up to 32 MHz, and Slave up to 16 MHz  Supports SPI/MICROWIRE Master/Slave mode  Full duplex synchronous serial data transfer  Variable length of transfer data from 4 to 32 bits  MSB or LSB first data transfer  RX and TX on both rising or falling edge of serial clock independently  Two slave/device select lines when SPI controller is used as the master, and 1 slave/device select line when SPI controller is used as the slave  Supports byte suspend mode in 32-bit transmission  Supports two channel PDMA requests, one for transmit and another for receive  Supports three wire mode, no slave select signal, bi-direction interface  Wake system up from Power-down mode 2 IC 2  Up to two sets of I C device  Master/Slave up to 1 Mbit/s  Bi-directional data transfer between masters and slaves  Multi-master bus (no central master)  Arbitration between simultaneously transmitting masters without corruption of serial data on the bus  Serial clock synchronization allows devices with different bit rates to communicate via one serial bus  Serial clock synchronization used as a handshake mechanism to suspend and resume serial transfer  Built-in 14-bit time-out counter requesting the I C interrupt if the I C bus hangs up and timer-out counter overflows  Programmable clocks allowing for versatile rate control  Supports 7-bit addressing mode  Supports multiple address recognition (four slave addresses with mask option) 2 2 2 IS  Interface with external audio CODEC  Operated as either Master or Slave mode  Capable of handling 8, 16, 24 and 32 bit word sizes  Supports Mono and stereo audio data  Supports I S and MSB justified data format  Provides two 8 word FIFO data buffers: one for transmitting and the other for 2 Page 10 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief receiving   Jun 17, 2014 Generates interrupt requests when buffer levels cross a programmable boundary  Supports two PDMA requests: one for transmitting and the other for receiving ADC  12-bit SAR ADC up to 2Msps conversion rate  Up to 12-ch single-ended input from external pin (PA.0 ~ PA.7 and PD.0 ~ PD.3)  Six internal channels from DAC0, DAC1, internal reference voltage (Int_VREF), Temperature sensor, AVDD, and AVSS.  Supports three reference voltage sources from VREF pin, internal reference voltage (Int_VREF), and AVDD.  Supports Single Scan, Single Cycle Scan, and Continuous Scan mode  Each channel with individual result register  Only scan on enabled channels  Threshold voltage detection (comparator function)  Conversion started by software programming or external input  Supports PDMA mode  Supports up to four timer time-out events (TMR0, TMR1, TMR2 and TMR3) to enable ADC DAC  12-bit monotonic output with 400K conversion rate  Supports three reference voltage sources from VREF pin, internal reference voltage (Int_VREF), and AVDD.  Synchronized update capability for two DACs (group function)  Supports up to four timer time-out events (TMR0, TMR1, TMR2 and TMR3), software or PDMA to trigger DAC to conversion SmartCard (SC)  Compliant to ISO-7816-3 T=0, T=1  Supports up to three ISO-7816-3 ports  Separates receive/transmit 4 bytes entry FIFO for data payloads  Programmable transmission clock frequency  Programmable receiver buffer trigger level  Programmable guard time selection (11 ETU ~ 266 ETU)  A 24-bit and two 8-bit time-out counters for Answer to Reset (ATR) and waiting times processing  Supports auto inverse convention function  Supports stop clock level and clock stop (clock keep) function  Supports transmitter and receiver error retry and error limit function  Supports hardware activation sequence process Page 11 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF   NUMICRO™ NANO100 SERIES PRODUCT BRIEF NuMicro Nano100 (B) Product Brief   Supports hardware warm reset sequence process  Supports hardware deactivation sequence process  Supports hardware auto deactivation sequence when detect the card is removal  Supports UART mode (Half Duplex) EBI (External bus interface) support  Accessible space: 64 KB in 8-bit mode or 128 KB in 16-bit mode  Supports 8bit/16bit data width  Supports byte write in 16-bit Data Width mode  One built-in temperature sensor with 1℃ resolution  96-bit unique ID  128-bit unique customer ID  Operating Temperature: -40℃~85℃  Packages: Jun 17, 2014  All Green package (RoHS)  LQFP 128-pin(14x14) / 64-pin(7x7) / 48-pin(7x7) / QFN 48-pin(7x7) Page 12 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief 2.2 Nano110 Features – LCD Line   Core ARM Cortex™-M0 core running up to 42 MHz  One 24-bit system timer  Supports Low Power Sleep mode  Single-cycle 32-bit hardware multiplier  NVIC for the 32 interrupt inputs, each with 4-levels of priority  Serial Wire Debug supports with 2 watchpoints/4 breakpoints Brown-out    Flash EPROM Memory  Runs up to 42 MHz with zero wait state for discontinuous address read access.  64K/32K/123K bytes application program memory (APROM)  4 KB In System Programming (ISP) loader program memory (LDROM)  Programmable data flash start address and memory size with 512 bytes page erase unit  In System Program (ISP)/In Application Program (IAP) to update on chip Flash EPROM SRAM Memory  16K/8K bytes embedded SRAM  Supports DMA mode DMA : Supports 8 channels: one VDMA channel,6 PDMA channels, and one CRC channel    Jun 17, 2014 Built-in 2.5V/2.0V/1.7V BOD for wide operating voltage range operation VDMA  Memory-to-memory transfer  Supports block transfer with stride  Supports word/half-word/byte boundary address  Supports address direction: increment and decrement PDMA  Peripheral-to-memory, memory-to-peripheral, and memory-to-memory transfer  Supports word boundary address  Supports word alignment transfer length in memory-to-memory mode  Supports word/half-word/byte alignment transfer length in peripheral-tomemory and memory-to-peripheral mode  Supports word/half-word/byte transfer data width from/to peripheral  Supports address direction: increment, fixed, and wrap around CRC Page 13 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF  ®  NuMicro Nano100 (B) Product Brief NUMICRO™ NANO100 SERIES PRODUCT BRIEF     12 5 CRC-CCITT: X  CRC-8: X + X + X + 1  CRC-16: X  CRC-32: X + X 4 2 X +X +X+1 8 +X +X +1 2 16 32 +X 15 +X +1 2 26 +X 23 +X 22 +X 16 +X 12 +X 11 +X 10 8 7 5 +X +X +X +  Flexible selection for different applications  Built-in 12 MHz OSC, can be trimmed to 0.25% deviation within all temperature range when turning on auto-trim function (system must have external 32.768 kHz crystal input) otherwise 12 MHz OSC has 2 % deviation within all temperarure range.  Low power 10 kHz OSC for watchdog and low power system operation  Supports one PLL, up to 120 MHz, for high performance system operation and USB application (48 MHz).  External 4~24 MHz crystal input for precise timing operation  External 32.768 kHz crystal input for RTC function and low power system operation GPIO Three I/O modes:  Push-Pull output  Open-Drain output  Input only with high impendence  All inputs with Schmitt trigger  I/O pin configured as interrupt source with edge/level setting  Supports High Driver and High Sink I/O mode  Supports input 5V tolerance, except PA.0 ~ PA.7, PD.0 ~ PD.1 and PC.6 ~ PC.7) Timer  Supports 4 sets of 32-bit timers, each with 24-bit up-timer and one 8-bit prescale counter  Independent Clock Source for each timer  Provides one-shot,periodic, output toggle and continuous operation modes  Internal trigger event to ADC, DAC and PDMA module  Supports PDMA mode  Wake system up from Power-down mode Watchdog Timer  Jun 17, 2014 16  Clock Control   Supports four common polynomials CRC-CCITT, CRC-8, CRC-16, and CRC-32 Clock Source from LIRC (Internal 10 kHz Low Speed Oscillator Clock) Page 14 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief     Selectable time-out period from 1.6 ms ~ 26 sec (depending on clock source)  Interrupt or reset selectable when watchdog time-out  Wake system up from Power-down mode Window Watchdog Timer(WWDT)  6-bit down counter and 6-bit compare value to make the window period flexible  Selectable WWDT clock pre-scale counter to make WWDT time-out interval variable. RTC  Supports software compensation by setting frequency compensate register (FCR)  Supports RTC counter (second, minute, hour) and calendar counter (day, month, year)  Supports Alarm registers (second, minute, hour, day, month, year)  Selectable 12-hour or 24-hour mode  Automatic leap year recognition  Supports periodic time tick interrupt with 8 periodic options 1/128, 1/64, 1/32, 1/16, 1/8, 1/4, 1/2 and 1 second  Wake system up from Power-down mode  Supports 80 bytes spare registers and a snoop pin to clear the content of these spare registers PWM/Capture  Supports 2 PWM modules, each has two 16-bit PWM generators  Provides eight PWM outputs or four complementary paired PWM outputs  Each PWM generator equipped with one clock divider, one 8-bit prescaler, two clock selectors, and one Dead-zone generator for complementary paired PWM  (Shared with PWM timers) with eight 16-bit digital capture timers provides eight rising/ falling/both capture inputs.  Supports Capture interrupt UART  Up to two 16-byte FIFO UART controllers  UART ports with flow control (TX, RX, CTSn and RTSn)  Supports IrDA (SIR) function  Supports LIN function  Supports RS-485 9 bit mode and direction control (Low Density Only)  Programmable baud rate generator  Supports PDMA mode  Wake system up from Power-down mode SPI  Jun 17, 2014 Up to three sets of SPI controller Page 15 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF   NUMICRO™ NANO100 SERIES PRODUCT BRIEF NuMicro Nano100 (B) Product Brief   Jun 17, 2014  Master up to 32 MHz, and Slave up to 16 MHz  Supports SPI/MICROWIRE Master/Slave mode  Full duplex synchronous serial data transfer  Variable length of transfer data from 4 to 32 bits  MSB or LSB first data transfer  RX and TX on both rising or falling edge of serial clock independently  Two slave/device select lines when SPI controller is as the master, and 1 slave/device select line when SPI controller is as the slave  Supports byte suspend mode in 32-bit transmission  Supports two channel PDMA requests, one for transmit and another for receive  Supports three wire mode, no slave select signal, bi-direction interface  Wake system up from Power-down mode 2 IC 2  Up to two sets of I C device  Master/Slave up to 1Mbit/s  Bidirectional data transfer between masters and slaves  Multi-master bus (no central master)  Arbitration between simultaneously transmitting masters without corruption of serial data on the bus  Serial clock synchronization allowing devices with different bit rates to communicate via one serial bus  Serial clock synchronization used as a handshake mechanism to suspend and resume serial transfer  Built-in 14-bit time-out counter requestING the I C interrupt if the I C bus hangs up and timer-out counter overflows  Programmable clocks allow versatile rate control  Supports 7-bit addressing mode  Supports multiple address recognition (four slave address with mask option) 2 2 2 IS  Interface with external audio CODEC  Operated as either Master or Slave mode  Capable of handling 8, 16, 24 and 32 bit word sizes  Supports Mono and stereo audio data  Supports I S and MSB justified data format  Provides two 8 word FIFO data buffers: one for transmitting and the other for receiving  Generates interrupt requests when buffer levels cross a programmable boundary  Supports two PDMA requests: one for transmitting and the other for receiving 2 Page 16 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief   Jun 17, 2014  12-bit SAR ADC up to 2Msps conversion rate  Up to 12-ch single-ended input from external pin (PA.0 ~ PA.7 and PD.0 ~ PD.3)  Six internal channels from DAC0, DAC1, internal reference voltage (Int_VREF), Temperature sensor, AVDD, and AVSS  Supports three reference voltage sources from VREF pin, internal reference voltage (Int_VREF), and AVDD.  Single scan/single cycle scan/continuous scan  Each channel with individual result register  Only scan on enabled channels  Threshold voltage detection (comparator function)  Conversion start by software programming or external input  Supports PDMA mode  Supports up to four timer time-out events (TMR0, TMR1, TMR2, and TMR3) to enable ADC DAC  12-bit monotonic output with 400K conversion rate  Supports three reference voltage sources from VREF pin, internal reference voltage (Int_VREF), and AVDD.  Synchronized update capability for two DACs (group function)  Supports up to four timer time-out events (TMR0, TMR1, TMR2 and TMR3), software or PDMA to trigger DAC to conversion SmartCard (SC)  Compliant to ISO-7816-3 T=0, T=1  Supports up to three ISO-7816-3 ports  Separates receive / transmit 4 bytes entry FIFO for data payloads  Programmable transmission clock frequency  Programmable receiver buffer trigger level  Programmable guard time selection (11 ETU ~ 266 ETU)  A 24-bit and two 8-bit time-out counter for Answer to Reset (ATR) and waiting times processing  Supports auto inverse convention function  Supports stop clock level and clock stop (clock keep) function  Supports transmitter and receiver error retry and error limit function  Supports hardware activation sequence process  Supports hardware warm reset sequence process  Supports hardware deactivation sequence process  Supports hardware auto deactivation sequence when detect the card is removal Page 17 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF  ADC NuMicro Nano100 (B) Product Brief  NUMICRO™ NANO100 SERIES PRODUCT BRIEF  Supports UART mode (Half Duplex) LCD  LCD driver for up to 4 COM x 40 SEG or 6 COM x 38 SEG  Supports Static,1/2 bias and 1/3 bias voltage  Four display modes; Static, 1/2 duty, 1/3 duty,1/4 duty, 1/5 duty and 1/6 duty.  Selectable LCD frequency by frequency divider  Configurable frame frequency  Internal Charge pump, adjustable contrast adjustment  Configurable Charge pump frequency  Blinking capability  Supports R-type/C-type method  LCD frame interrupt  One built-in temperature sensor with 1℃ resolution  96-bit unique ID  128-bit unique customer ID  Operating Temperature: -40℃~85℃  Packages: Jun 17, 2014  All Green package (RoHS)  LQFP 128-pin(14x14) / 64-pin(10x10) / 64-pin(7x7) Page 18 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief 2.3 Nano120 Features – USB Connectivity Line   Core ARM Cortex™-M0 core running up to 42 MHz  One 24-bit system timer  Supports Low Power Sleep mode  Single-cycle 32-bit hardware multiplier  NVIC for the 32 interrupt inputs, each with 4-levels of priority  Serial Wire Debug supports with 2 watchpoints/4 breakpoints Brown-out    Flash EPROM Memory  Runs up to 42 MHz with zero wait state for discontinuous address read access.  64K/32K/123K bytes application program memory (APROM)  4KB in system programming (ISP) loader program memory (LDROM)  Programmable data flash start address and memory size with 512 bytes page erase unit  In System Program (ISP)/In Application Program (IAP) to update on chip Flash EPROM SRAM Memory  16K/8K bytes embedded SRAM  Supports PDMA mode DMA: Support 8 channels: one VDMA channel, 6 PDMA channels, and one CRC channel    Jun 17, 2014 Built-in 2.5V/2.0V/1.7V BOD for wide operating voltage range operation VDMA  Memory-to-memory transfer  Supports block transfer with stride  Supports word/half-word/byte boundary address  Supports address direction: increment and decrement PDMA  Peripheral-to-memory, transfer  Supports word boundary address  Supports word alignment transfer length in memory-to-memory mode  Supports word/half-word/byte alignment transfer length in peripheral-tomemory and memory-to-peripheral mode  Supports word/half-word/byte transfer data width from/to peripheral  Supports address: increment, fixed, and wrap around memory-to-peripheral, and memory-to-memory CRC Page 19 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF  ®  NuMicro Nano100 (B) Product Brief NUMICRO™ NANO100 SERIES PRODUCT BRIEF     Jun 17, 2014 16 12 5  CRC-CCITT: X  CRC-8: X + X + X + 1  CRC-16: X  CRC-32: X + X 4 2 X +X +X+1 8 +X +X +1 2 16 32 +X 15 +X +1 2 26 +X 23 +X 22 +X 16 +X 12 +X 11 +X 10 8 7 5 +X +X +X + Clock Control  Flexible selection for different applications  Built-in 12MHz OSC, can be trimmed to 0.25% deviation within all temperature range when turning on auto-trim function (system must have external 32.768 kHz crystal input) otherwise 12 MHz OSC has 2 % deviation within all temperarure range  Low power 10 kHz OSC for watchdog and low power system operatin  Supports one PLL, up to 120 MHz, for high performance system operation and USB application (48 MHz).  External 4~24 MHz crystal input for precise timing operation  External 32.768 kHz crystal input for RTC function and low power system operation GPIO   Supports four common polynomials CRC-CCITT, CRC-8, CRC-16, and CRC-32 Three I/O modes:  Push-Pull output  Open-Drain output  Input only with high impendence  All inputs with Schmitt trigger  I/O pin can be configured as interrupt source with edge/level setting  High driver and high sink IO mode support  Supports input 5V tolerance (except ADC and DAC shared pins) Timer  Supports 4 sets of 32-bit timers, each with 24-bit up-timer and one 8-bit prescale counter  Independent Clock Source for each timer  Provides one-shot,periodic, output toggle and continuous operation modes  Internal trigger event to ADC, DAC and PDMA module  Supports PDMA mode  Wake system up from Power-down mode Watchdog Timer  Clock Source from LIRC. (Internal 10 kHz Low Speed Oscillator Clock)  Selectable time-out period from 1.6 ms ~ 26 sec (depending on clock source) Page 20 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief     Interrupt or reset selectable on watchdog time-out  Wake system up from Power-down mode Window Watchdog Timer(WWDT)  6-bit down counter and 6-bit compare value to make the window period flexible  Selectable WWDT clock pre-scale counter to make WWDT time-out interval variable. RTC  Supports software compensation by setting frequency compensate register (FCR)  Supports RTC counter (second, minute, hour) and calendar counter (day, month, year)  Supports Alarm registers (second, minute, hour, day, month, year)  Selectable 12-hour or 24-hour mode  Automatic leap year recognition  Supports periodic time tick interrupt with 8 periodic options 1/128, 1/64, 1/32, 1/16, 1/8, 1/4, 1/2 and 1 second  Wake system up from Power-down or Idle mode  Support 80 bytes spare registers and a snoop pin to clear the content of these spare registers PWM/Capture  Supports 2 PWM module, each has two 16-bit PWM generators  Provide eight PWM outputs or four complementary paired PWM outputs  Each PWM generator equipped with one clock divider, one 8-bit prescaler, two clock selectors, and one Dead-Zone generator for complementary paired PWM  (Shared with PWM timers) with eight 16-bit digital capture timers provides eight rising/ falling/both capture inputs.  Supports one shot and continuous mode  Supports Capture interrupt UART  Up to two 16-byte FIFO UART controllers  UART ports with flow control (TX, RX, CTSn and RTSn)  Supports IrDA (SIR) function  Supports LIN function  Supports RS-485 9 bit mode and direction control. (Low Density Only)  Programmable baud rate generator  Supports PDMA mode  Wake system up from Power-down mode SPI  Jun 17, 2014 Up to three sets of SPI controller Page 21 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF   NUMICRO™ NANO100 SERIES PRODUCT BRIEF NuMicro Nano100 (B) Product Brief   Jun 17, 2014  Master up to 32 MHz, and Slave up to 16 MHz  Supports SPI/MICROWIRE Master/Slave mode  Full duplex synchronous serial data transfer  Variable length of transfer data from 4 to 32 bits  MSB or LSB first data transfer  RX and TX on both rising or falling edge of serial clock independently  Two slave/device select lines when SPI controller is as the master, and 1 slave/device select line when SPI controller is as the slave  Supports byte suspend mode in 32-bit transmission  Supports two channel PDMA requests, one for transmit and another for receive  Supports three wire, no slave select signal, bi-direction interface  Wake system up from Power-down mode 2 IC 2  Up to two sets of I C device  Master/Slave up to 1Mbit/s  Bi-directional data transfer between masters and slaves  Multi-master bus (no central master)  Arbitration between simultaneously transmitting masters without corruption of serial data on the bus  Serial clock synchronization allowing devices with different bit rates to communicate via one serial bus  Serial clock synchronization used as a handshake mechanism to suspend and resume serial transfer  Built-in 14-bit time-out counter requesting the I C interrupt if the I C bus hangs up and timer-out counter overflows  Programmable clocks allow versatile rate control  Supports 7-bit addressing mode  Supports multiple address recognition (four slave addresses with mask option) 2 2 2 IS  Interface with external audio CODEC  Operated as either Master or Slave mode  Capable of handling 8, 16, 24 and 32 bit word sizes  Supports Mono and stereo audio data  Supports I S and MSB justified data format  Provides two 8 word FIFO data buffers: one for transmitting and the other for receiving  Generates interrupt requests when buffer levels cross a programmable boundary  Supports two PDMA requests: one for transmitting and the other for receiving 2 Page 22 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief   Jun 17, 2014  12-bit SAR ADC up to 2Msps conversion rate  Up to 12-ch single-ended input from external pin (PA.0 ~ PA.7 and PD.0 ~ PD.3).  Six internal channels from DAC0, DAC1, internal reference voltage (Int_VREF), Temperature sensor, AVDD, and AVSS.  Supports three reference voltage sources from VREF pin, internal reference voltage (Int_VREF), and AVDD  Supports single scan, single cycle scan, and continuous scan modes  Each channel with individual result register  Only scan on enabled channels  Threshold voltage detection (comparator function)  Conversion start by software programming or external input  Supports PDMA mode  Supports up to four timer time-out events (TMR0, TMR1, TMR2 and TMR3) to enable ADC DAC  12-bit monotonic output with 400K conversion rate  Supports three reference voltage sources from VREF pin, internal reference voltage (Int_VREF), and AVDD.  Synchronized update capability for two DACs (group function)  Supports up to four timer time-out event (TMR0, TMR1, TMR2 and TMR3), software or PDMA to trigger DAC to conversion SmartCard (SC)  Compliant to ISO-7816-3 T=0, T=1  Supports up to three ISO-7816-3 ports  Separates receive / transmit 4 bytes entry FIFO for data payloads  Programmable transmission clock frequency  Programmable receiver buffer trigger level  Programmable guard time selection (11 ETU ~ 266 ETU)  A 24-bit and two 8-bit time-out counter for Answer to Reset (ATR) and waiting times processing  Supports auto inverse convention function  Supports stop clock level and clock stop (clock keep) function  Supports transmitter and receiver error retry and error limit function  Supports hardware activation sequence process  Supports hardware warm reset sequence process  Supports hardware deactivation sequence process  Supports hardware auto deactivation sequence when detect the card is removal Page 23 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF  ADC NuMicro Nano100 (B) Product Brief  NUMICRO™ NANO100 SERIES PRODUCT BRIEF   Supports UART mode (Half Duplex) USB 2.0 Full-Speed Device  One set of USB 2.0 FS Device 12 Mbps  On-chip USB Transceiver  Provides 1 interrupt source with 4 interrupt events  Supports Control, Bulk In/Out, Interrupt and Isochronous transfers  Auto suspend function when no bus signaling for 3 ms  Provides 8 programmable endpoints  Includes 512 Bytes internal SRAM as USB buffer  Provides remote wake-up capability EBI (External bus interface) support  Accessible space: 64 KB in 8-bit mode or 128 KB in 16-bit mode  Supports 8bit/16bit data width  Supports byte write in 16-bit Data Width mode  One built-in temperature sensor with 1℃ resolution  96-bit unique ID  128-bit unique customer ID  Operating Temperature: -40℃~85℃  Packages: Jun 17, 2014  All Green package (RoHS)  LQFP 128-pin(14x14) / 64-pin(7x7) / 48-pin(7x7) Page 24 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief 2.4 Nano130 Features – Advanced Line   Core ARM Cortex™-M0 core running up to 42 MHz  One 24-bit system timer  Supports Low Power Sleep mode  Single-cycle 32-bit hardware multiplier  NVIC for the 32 interrupt inputs, each with 4-levels of priority  Serial Wire Debug supports with 2 watchpoints/4 breakpoints Brown-out    Flash EPROM Memory  Runs up to 42 MHz with zero wait state for discontinuous address read access.  64K/32K/123K bytes application program memory (APROM)  4KB in system programming (ISP) loader program memory (LDROM)  Programmable data flash start address and memory size with 512 bytes page erase unit  In System Program (ISP)/In Application Program (IAP) to update on chip Flash EPROM SRAM Memory  16K/8K bytes embedded SRAM  Supports DMA mode DMA : Supports 8 channels: one VDMA channel,6 PDMA channels, and one CRC 25egiste    Jun 17, 2014 Built-in 2.5V/2.0V/1.7V BOD for wide operating voltage range operation VDMA  Memory-to-memory transfer  Supports block transfer with stride  Supports word/half-word/byte boundary address  Supports address direction: increment and decrement PDMA  Peripheral-to-memory, transfer  Supports word boundary address  Supports word alignment transfer length in memory-to-memory mode  Supports word/half-word/byte alignment transfer length in peripheral-tomemory and memory-to-peripheral mode  Supports word/half-word/byte transfer data width from/to peripheral  Supports address direction: increment, fixed, and wrap around memory-to-peripheral, and memory-to-memory CRC Page 25 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF  ®  NuMicro Nano100 (B) Product Brief NUMICRO™ NANO100 SERIES PRODUCT BRIEF     Jun 17, 2014 16 12 5  CRC-CCITT: X  CRC-8: X + X + X + 1  CRC-16: X  CRC-32: X + X 4 2 X +X +X+1 8 +X +X +1 2 16 32 +X 15 +X +1 2 26 +X 23 +X 22 +X 16 +X 12 +X 11 +X 10 8 7 5 +X +X +X + Clock Control  Flexible selection for different applications  Built-in 12MHz OSC, can be trimmed to 0.25% deviation within all temperature range when turning on auto-trim function (system must have external 32.768 kHz crystal input) otherwise 12 MHz OSC has 2 % deviation within all temperarure range.  Low power 10 kHz OSC for watchdog and low power system operation  Supports one PLL, up to 120 MHz, for high performance system operation and USB application (48 MHz).  External 4~24 MHz crystal input for precise timing operation  External 32.768 kHz crystal input for RTC function and low power system operation GPIO   Supports four common polynomials CRC-CCITT, CRC-8, CRC-16, and CRC-32 Three I/O modes:  Push-Pull output  Open-Drain output  Input only with high impendence  All inputs with Schmitt trigger  I/O pin configured as interrupt source with edge/level setting  Supports High Driver and High Sink I/O mode  Supports input 5V tolerance (except ADC and DAC shared pins) Timer  Supports 4 sets of 32-bit timers with 24-bit up-timer and one 8-bit pre-scale counter  Independent Clock Source for each timer  Provides one-shot,periodic, output toggle and continuous operation modes  Supports internal trigger event to ADC, DAC and PDMA module  Wake system up from Power-down mode Watchdog Timer  Clock Source is from LIRC. (Internal 10 kHz Low Speed Oscillator Clock)  Selectable time-out period from 1.6ms ~ 26sec (depends on clock source)  Interrupt or reset selectable on watchdog time-out Page 26 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief      Jun 17, 2014 Window Watchdog Timer(WWDT)  6-bit down counter and 6-bit compare value to make the window period flexible  Selectable WWDT clock pre-scale counter to make WWDT time-out interval variable. RTC  Supports software compensation by setting frequency compensate register (FCR)  Supports RTC counter (second, minute, hour) and calendar counter (day, month, year)  Supports Alarm registers (second, minute, hour, day, month, year)  Selectable 12-hour or 24-hour mode  Automatic leap year recognition  Supports periodic time tick interrupt with 8 periodic options 1/128, 1/64, 1/32, 1/16, 1/8, 1/4, 1/2 and 1 second  Wake system up from Power-down or Idle mode  Supports 80 bytes spare registers and a snoop pin to clear the content of these spare registers PWM/Capture  Supports 2 PWM module, each with two 16-bit PWM generators  Provides eight PWM outputs or four complementary paired PWM outputs  Each PWM generator equipped with one clock divider, one 8-bit prescaler, two clock selectors, and one Dead-Zone generator for complementary paired PWM  (Shared with PWM timers) with eight 16-bit digital capture timers provides eight rising/ falling/both capture inputs.  Supports Capture interrupt UART  Up to two 16-byte FIFO UART controllers  UART ports with flow control (TX, RX, CTSn and RTSn)  Supports IrDA (SIR) function  Supports LIN function  Supports RS-485 9 bit mode and direction control (Low Density Only)  Programmable baud rate generator  Supports PDMA mode  Wake system up from Power-down or Idle mode SPI  Up to 3 sets of SPI controller  Master up to 32 MHz, and Slave up to 16 MHz  Supports SPI/MICROWIRE Master/Slave mode Page 27 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF  WDT can wake system up from Power-down mode NUMICRO™ NANO100 SERIES PRODUCT BRIEF NuMicro Nano100 (B) Product Brief     Full duplex synchronous serial data transfer  Variable length of transfer data from 4 to 32 bits  MSB or LSB first data transfer  RX and TX on both rising or falling edge of serial clock independently  Two slave/device select lines when used as the master, and 1 slave/device select line when used as the slave  Supports byte suspend mode in 32-bit transmission  Supports two channel PDMA request, one for transmit and another for receive  Supports three wire, no slave select signal, bi-direction interface  Wake system up from Power-down or Idle mode 2 IC Up to two sets of I C device  Master/Slave up to 1Mbit/s  Bi-directional data transfer between masters and slaves  Multi-master bus (no central master)  Arbitration between simultaneously transmitting masters without corruption of serial data on the bus  Serial clock synchronization allowing devices with different bit rates to communicate via one serial bus  Serial clock synchronization can be used as a handshake mechanism to suspend and resume serial transfer  Built-in 14-bit time-out counter will request the I C interrupt if the I C bus hangs up and timer-out counter overflows  Programmable clocks allowing for versatile rate control  Supports 7-bit addressing mode  Supports multiple address recognition (four slave addresses with mask option) 2 2 2 IS  Interface with external audio CODEC  Operate as either Master or Slave mode  Capable of handling 8, 16, 24 and 32 bit word sizes  Supports Mono and stereo audio data  Supports I S and MSB justified data format  Provides two 8 word FIFO data buffers: one for transmitting and the other for receiving  Generates interrupt requests when buffer levels cross a programmable boundary  Supports two PDMA requests: one for transmitting and the other for receiving 2 ADC  Jun 17, 2014 2  12-bit SAR ADC up to 2Msps conversion rate Page 28 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief   Jun 17, 2014 Up to 12-ch single-ended input from external pin (PA.0 ~ PA.7 and PD.0 ~ PD.3)  Six internal channels from DAC0, DAC1, internal reference voltage (Int_VREF), Temperature sensor, AVDD, and AVSS.  Supports three reference voltage sources from VREF pin, internal reference voltage (Int_VREF), and AVDD  Single scan/single cycle scan/continuous scan  Each channel with individual result register  Scan on enabled channels  Threshold voltage detection (comparator function)  Conversion start by software programming or external input  Supports PDMA mode  Supports up to four timer time-out events (TMR0, TMR1, TMR2 and TMR3) to enable ADC DAC  12-bit monotonic output with 400K conversion rate  Supports three reference voltage sources from VREF pin, internal reference voltage (Int_VREF), and AVDD.  Synchronized update capability for two DACs (group function)  Supports up to four timer time-out events (TMR0, TMR1, TMR2 and TMR3), software or PDMA to trigger DAC to conversion SmartCard (SC)  Compliant to ISO-7816-3 T=0, T=1  Supports up to three ISO-7816-3 ports  Separates receive/transmit 4 bytes entry FIFO for data payloads  Programmable transmission clock frequency  Programmable receiver buffer trigger level  Programmable guard time selection (11 ETU ~ 266 ETU)  A 24-bit and two 8-bit time-out counter for Answer to Reset (ATR) and waiting times processing  Supports auto inverse convention function  Supports stop clock level and clock stop (clock keep) function  Supports transmitter and receiver error retry and error limit function  Supports hardware activation sequence process  Supports hardware warm reset sequence process  Supports hardware deactivation sequence process  Supports hardware auto deactivation sequence when detecting the card is removed  Support UART mode (Half Duplex) LCD Page 29 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF   NUMICRO™ NANO100 SERIES PRODUCT BRIEF NuMicro Nano100 (B) Product Brief    LCD driver for up to 4 COM x 40 SEG or 6 COM x 38 SEG  Supports Static,1/2 bias and 1/3 bias voltage  Four display modes: Static, 1/2 duty, 1/3 duty, 1/4 duty, 1/5 duty and 1/6 duty.  Selectable LCD frequency by frequency divider  Configurable frame frequency  Internal Charge pump, adjustable contrast adjustment  Configurable Charge pump frequency  Blinking capability  Supports R-type/C-type method  LCD frame interrupt USB 2.0 Full-speed Device  One set of USB 2.0 FS Device 12 Mbps  On-chip USB Transceiver  Provides 1 interrupt source with 4 interrupt events  Supports Control, Bulk In/Out, Interrupt and Isochronous transfers  Auto suspend function when no bus signaling for 3 ms  Provides 8 programmable endpoints  Includes 512 Bytes internal SRAM as USB buffer  Provides remote wake-up capability EBI (External bus interface)  Accessible space: 64 KB in 8-bit mode or 128 KB in 16-bit mode  Supports 8bit/16bit data width  Supports byte write in 16-bit data width mode  One built-in temperature sensor with 1℃ resolution  96-bit unique ID  128-bit unique customer ID  Operating Temperature: -40℃~85℃  Packages: Jun 17, 2014  All Green package (RoHS)  LQFP 128-pin(14x14) / 64-pin (7x7) Page 30 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief 3 3.1 PARTS INFORMATION LIST AND PIN CONFIGURATION NuMicro Nano100 Series Selection Code NANO 1 X X - X X X B N Ultra-Low Power MCU Temperature CPU core N: -40℃ ~ +85℃ E: -40℃ ~ +105℃ C: -40℃ ~ +125℃ 1: Cortex-M0 5/7: ARM7 9: ARM9 Version A : Version B : Version Product Line Function 0: 1: 2: 3: SRAM Size Base Line LCD Line USB Connectivity Line LCD + USB Connectivity Line 0 1 2 3 Flash ROM Reserved A: 8KB B: 16KB C: 32KB D: 64KB E: 128KB 0 ~ 9 Sub Product Line Package Type TM Figure 3‑1 NuMicro NUMICRO™ NANO100 SERIES PRODUCT BRIEF N : QFN48 (7x7 mm) L : LQFP 48 (7x7 mm) R : LQFP 64 (10x10 mm) S : LQFP 64 (7x7 mm) K : LQFP 128 (14x14 mm) Jun 17, 2014 : 2KB : 4KB : 8KB : 16KB Nano100 Series Selection Code Page 31 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief 3.2 NuMicro Nano100 Products Selection Guide 3.2.1 NuMicro Nano100 Base Line Selection Guide I/O Timer (32-bit) UART SPI I2C USB Configurable ISP ROM (Kbytes) 4K up to 38 4x32-bit 4 3 2 8K Configurable 4K up to 38 4x32-bit 4 3 16K Configurable 4K up to 38 4x32-bit 4 3 16K Configurable 4K up to 38 4x32-bit 4 8K Configurable 4K up to 38 4x32-bit 4 64K 8K Configurable 4K up to 38 4x32-bit 4 NANO100LD3BN 64K 16K Configurable 4K up to 38 4x32-bit 4 3 2 - 1 6 7 V - V 8 - 2 2 V LQFP48 NANO100LE3BN 128K 16K Configurable 4K up to 38 4x32-bit 4 3 2 - 1 6 7 V - V 8 - 2 2 V LQFP48 NANO100SC2BN 32K 8K Configurable 4K up to 52 4x32-bit 5 3 2 - 1 8 7 V - V 8 - 2 3 V LQFP64 Flash (Kbytes) SRAM (Kbytes) Data Flash NANO100NC2BN 32K 8K NANO100ND2BN 64K NANO100ND3BN 64K NANO100NE3BN 128K NANO100LC2BN 32K NANO100LD2BN NUMICRO™ NANO100 SERIES PRODUCT BRIEF Part No. NANO100SD2BN I2S PWM (16-bit ADC (12-bit) RTC EBI - 1 0 7 V - IRC 10KHz 12MHz V 2 - 1 6 7 V - 2 - 1 6 7 V - 3 2 - 1 6 7 V 3 2 - 1 6 7 V 3 2 - 1 6 7 V Connectivity PDMA LCD DAC (12-bit) ISO7816-3 ISP ICP Package 8 - 2 2 V QFN48* V 8 - 2 2 V QFN48* V 8 - 2 2 V QFN48* - V 8 - 2 2 V QFN48* - V 8 - 2 2 V LQFP48 - V 8 - 2 2 V LQFP48 64K 8K Configurable 4K up to 52 4x32-bit 5 3 2 - 1 8 7 V - V 8 - 2 3 V LQFP64 NANO100SD3BN 64K 16K Configurable 4K up to 52 4x32-bit 5 3 2 - 1 8 7 V - V 8 - 2 3 V LQFP64 NANO100SE3BN 128K 16K Configurable 4K up to 52 4x32-bit 5 3 2 - 1 8 7 V - V 8 - 2 3 V LQFP64 NANO100KD3BN 64K 16K Configurable 4K up to 86 4x32-bit 5 3 2 - 1 8 12 V V V 8 - 2 3 V LQFP128 NANO100KE3BN 128K 16K Configurable 4K up to 86 4x32-bit 5 3 2 - 1 8 12 V V V 8 - 2 3 V LQFP128 PDMA LCD DAC (12-bit) ISO7816-3 ISP ICP Package 8 4x31, 6x29 2 3 V LQFP64 QFN*48* : 7x7, pitch 0.5 mm ; LQFP48 : 7x7, pitch 0.5 mm ; LQFP64 : 7x7, pitch 0.4 mm ; LQFP128 : 14x14, pitch 0.4 mm Table 3‑1 Nano100 Base Line Selection Table 3.2.2 NuMicro Nano110 LCD Line Selection Guide I/O Timer (32-bit) UART SPI I2C USB Configurable ISP ROM (Kbytes) 4K up to 51 4x32-bit 5 3 2 8K Configurable 4K up to 51 4x32-bit 5 3 16K Configurable 4K up to 51 4x32-bit 5 3 16K Configurable 4K up to 51 4x32-bit 5 32K 8K Configurable 4K up to 51 4x32-bit 64K 8K Configurable 4K up to 51 4x32-bit NANO110RD3BN 64K 16K Configurable 4K up to 51 NANO110RE3BN 128K 16K Configurable 4K up to 51 NANO110KC2BN 32K 8K Configurable 4K up to 86 NANO110KD2BN 64K 8K Configurable 4K NANO110KD3BN 64K 16K Configurable NANO110KE3BN 128K 16K Configurable Flash (Kbytes) SRAM (Kbytes) Data Flash NANO110SC2BN 32K 8K NANO110SD2BN 64K NANO110SD3BN 64K NANO110SE3BN 128K NANO110RC2BN NANO110RD2BN Part No. I2S PWM (16-bit ADC (12-bit) RTC EBI - 1 7 7 V - IRC 10KHz 12MHz V 2 - 1 7 7 V - V 8 4x31, 6x29 2 3 V LQFP64 2 - 1 7 7 V - V 8 4x31, 6x29 2 3 V LQFP64 3 2 - 1 7 7 V - V 8 4x31, 6x29 2 3 V LQFP64 5 3 2 - 1 7 7 V - V 8 4x31, 6x29 2 3 V LQFP64* 5 3 2 - 1 7 7 V - V 8 4x31, 6x29 2 3 V LQFP64* 4x32-bit 5 3 2 - 1 7 7 V - V 8 4x31, 6x29 2 3 V LQFP64* 4x32-bit 5 3 2 - 1 7 7 V - V 8 4x31, 6x29 2 3 V LQFP64* 4x32-bit 5 3 2 - 1 8 12 V V V 8 4x40, 6x38 2 3 V LQFP128 up to 86 4x32-bit 5 3 2 - 1 8 12 V V V 8 4x40, 6x38 2 3 V LQFP128 4K up to 86 4x32-bit 5 3 2 - 1 8 12 V V V 8 4x40, 6x38 2 3 V LQFP128 4K up to 86 4x32-bit 5 3 2 - 1 8 12 V V V 8 4x40, 6x38 2 3 V LQFP128 PDMA LCD DAC (12-bit) ISO7816-3 ISP ICP Package 8 - 2 2 V LQFP48 Connectivity LQFP64 : 7x7, pitch 0.4 mm ; LQFP64* : 10x10, pitch 0.5 mm ; LQFP128 : 14x14, pitch 0.4 mm Table 3‑2 Nano110 LCD Line Selection Table 3.2.3 NuMicro Nano120 USB Connectivity Line Selection Guide I2S PWM (16-bit ADC (12-bit) RTC EBI 1 1 4 7 V - IRC 10KHz 12MHz V 2 1 1 4 7 V - V 8 - 2 2 V LQFP48 2 1 1 4 7 V - V 8 - 2 2 V LQFP48 3 2 1 1 4 7 V - V 8 - 2 2 V LQFP48 5 3 2 1 1 8 7 V - V 8 - 2 3 V LQFP64 4x32-bit 5 3 2 1 1 8 7 V - V 8 - 2 3 V LQFP64 up to 48 4x32-bit 5 3 2 1 1 8 7 V - V 8 - 2 3 V 4K up to 48 4x32-bit 5 3 2 1 1 8 7 V - V 8 - 2 3 V LQFP64 Configurable 4K up to 86 4x32-bit 5 3 2 1 1 8 8 V V V 8 - 2 3 V LQFP128 Configurable 4K up to 86 4x32-bit 5 3 2 1 1 8 8 V V V 8 - 2 3 V LQFP128 Flash (Kbytes) SRAM (Kbytes) Data Flash NANO120LC2BN 32K 8K Configurable NANO120LD2BN 64K 8K Configurable NANO120LD3BN 64K 16K Configurable NANO120LE3BN 128K 16K Configurable NANO120SC2BN 32K 8K NANO120SD2BN 64K NANO120SD3BN ISP ROM (Kbytes) 4K Connectivity I/O Timer (32-bit) UART SPI I2C USB up to 34 4x32-bit 4 3 2 4K up to 34 4x32-bit 4 3 4K up to 34 4x32-bit 4 3 4K up to 34 4x32-bit 4 Configurable 4K up to 48 4x32-bit 8K Configurable 4K up to 48 64K 16K Configurable 4K NANO120SE3BN 128K 16K Configurable NANO120KD3BN 64K 16K NANO120KE3BN 128K 16K Part No. LQFP64 LQFP48 : 7x7, pitch 0.5 mm ; LQFP64 : 7x7, pitch 0.4 mm ; LQFP128 : 14x14, pitch 0.4 mm Table 3‑3 Nano120 USB Connectivity Line Selection Table Jun 17, 2014 Page 32 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief 3.2.4 NuMicro Nano130 Advanced Line Selection Guide Flash (Kbytes) SRAM (Kbytes) Data Flash NANO130SC2BN 32K 8K Configurable NANO130SD2BN 64K 8K Configurable NANO130SD3BN 64K 16K Configurable NANO130SE3BN 128K 16K Configurable NANO130KC2BN 32K 8K Configurable NANO130KD2BN 64K 8K NANO130KD3BN 64K NANO130KE3BN 128K Part No. ISP ROM (Kbytes) 4K I2S PWM (16-bit ADC (12-bit) RTC EBI 1 1 7 7 V - IRC 10KHz 12MHz V 2 1 1 7 7 V - 2 1 1 7 7 V - 3 2 1 1 7 7 V 3 2 1 1 8 8 V 5 3 2 1 1 8 8 V 4x32-bit 5 3 2 1 1 8 8 4x32-bit 5 3 2 1 1 8 8 Connectivity I/O Timer (32-bit) UART SPI I2C USB up to 47 4x32-bit 5 3 2 4K up to 47 4x32-bit 5 3 4K up to 47 4x32-bit 5 3 4K up to 47 4x32-bit 5 4K up to 86 4x32-bit 5 Configurable 4K up to 86 4x32-bit 16K Configurable 4K up to 86 16K Configurable 4K up to 86 PDMA LCD DAC (12-bit) ISO7816-3 ISP ICP Package 8 4x31, 6x29 2 3 V LQFP64 V 8 4x31, 6x29 2 3 V LQFP64 V 8 4x31, 6x29 2 3 V - V 8 4x31, 6x29 2 3 V LQFP64 V V 8 4x40, 6x38 2 3 V LQFP128 V V 8 4x40, 6x38 2 3 V LQFP128 V V V 8 4x40, 6x38 2 3 V LQFP128 V V V 8 4x40, 6x38 2 3 V LQFP128 LQFP64 LQFP64 : 7x7, pitch 0.4 mm ; LQFP128 : 14x14, pitch 0.4 mm Table 3‑4 Nano130 Advanced Line Selection Table NUMICRO™ NANO100 SERIES PRODUCT BRIEF Jun 17, 2014 Page 33 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin Configuration PE.3 PE.4 PC.10 65 PC.9 73 PE.2 PC.8 74 66 PA.15 75 PE.1 PA.14 76 67 PA.13 77 PE.0 PA.12 78 68 ICE_DAT/PF.0 79 PC.13 ICE_CLK/PF.1 80 69 NC 81 70 VDD 82 PC.11 NC 83 PC.12 VSS 84 71 VSS 85 72 AVSS PA.1/AD1 90 86 PA.2/AD2 91 87 PA.3/AD3 92 PA.0/AD0 PA.4/AD4 93 AVSS PA.5/AD5 94 88 PA.6/AD6 95 89 PA.7/AD7 96 NuMicro Nano100 LQFP 128-pin VREF 97 64 PB.9 NC 98 63 PB.10 AVDD 99 62 PB.11 AD8/PD.0 100 61 PE.5 AD9/PD.1 101 60 NC AD10/PD.2 102 59 NC AD11/PD.3 103 58 PE.6 NC 104 57 PC.0 PD.4 105 56 PC.1 PD.5 106 55 PC.2 PC.7 107 54 PC.3 PC.6 108 53 PC.4 PC.15 109 52 PC.5 PC.14 110 51 PD.15 PB.15 111 50 PD.14 NC 112 49 PD.7 XT1_IN 113 48 PD.6 XT1_OUT 114 47 PB.3 NC 115 46 PB.2 nRESET 116 45 PB.1 VSS 117 44 PB.0 VSS 118 43 NC NC 119 42 NC VDD 120 41 NC NC 121 40 NC PF.4 122 39 NC PF.5 123 38 PE.7 VSS 124 37 PE.8 PVSS 125 36 PE.9 PB.8 126 35 PE.10 PE.15 127 34 PE.11 PE.14 128 33 PE.12 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 PB.13 PB.12 NC X32O X32I NC PA.11 PA.10 PA.9 PA.8 PD.8 PD.9 PD.10 PD.11 PD.12 PD.13 PB.4 PB.5 PB.6 PB.7 NC LDO_CAP NC NC VDD NC VSS VSS VSS VSS NANO100 LQFP 128-pin 1 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 3.3.1.1 NuMicro Nano100 Pin Diagrams PB.14 3.3.1 PE.13 3.3 TM Figure 3‑2 NuMicro Jun 17, 2014 Nano100 LQFP 128-pin Diagram Page 34 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief ICE_CLK/PF.1 ICE_DAT/PF.0 PA.12 PA.13 PA.14 PA.15 PC.8 42 41 40 39 38 37 36 PC.11 AVSS 43 33 PA.0/AD0 44 PC.9 PA.1/AD1 45 PC.10 PA.2/AD2 46 34 PA.3/AD3 47 35 PA.4/AD4 48 NuMicro Nano100 LQFP 64-pin AD5/PA.5 49 32 PB.9 AD6/PA.6 50 31 PB.10 VREF 51 30 PB.11 AVDD 52 29 PE.5 PC.7 53 28 PC.0 PC.6 54 27 PC.1 PC.15 55 26 PC.2 PC.14 56 PB.15 57 XT1_IN NANO100 LQFP 64-pin 25 PC.3 24 PD.15 58 23 PD.14 XT1_OUT 59 22 PD.7 nRESET 60 21 PD.6 VSS 61 20 PB.3 7 8 9 10 11 12 13 14 15 16 PA.8 PB.4 PB.5 PB.6 PB.7 LDO_CAP VDD VSS 6 PA.9 5 X32I PA.11 PA.10 4 PB.0 X32O 17 3 64 2 PB.1 PB.8 PB.12 PB.2 18 PB.13 19 63 1 62 TM Figure 3‑3 NuMicro Jun 17, 2014 NUMICRO™ NANO100 SERIES PRODUCT BRIEF VDD PVSS PB.14 3.3.1.2 Nano100 LQFP 64-pin Diagram Page 35 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief PA.4/AD4 PA.3/AD3 PA.2/AD2 PA.1/AD1 PA.0/AD0 AVSS ICE_CLK/PF.1 ICE_DAT/PF.0 PA.12 PA.13 PA.14 PA.15 36 35 34 33 32 31 30 29 28 27 26 25 NuMicro Nano100 LQFP/QFN 48-pin AD5/PA.5 37 24 PB.9 AD6/PA.6 38 23 PB.10 VREF 39 22 PB.11 AVDD 40 21 PE.5 PC.7 41 20 PC.0 PC.6 42 19 PC.1 PB.15 43 18 PC.2 NANO100 LQFP/QFN 48-pin TM Figure 3‑4 NuMicro Jun 17, 2014 10 11 12 VDD VSS PB.5 9 PB.0 LDO_CAP 13 8 48 PB.4 PB.8 7 PB.1 PA.8 14 6 47 PA.9 PVSS 5 PB.2 4 15 PA.10 46 PA.11 nRESET 3 PB.3 X32I PC.3 16 2 17 45 X32O 44 1 XT1_IN XT1_OUT PB.12 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 3.3.1.3 Nano100 LQFP 48-pin Diagram Page 36 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief NuMicro Nano110 Pin Diagrams PE.3 PE.4 PC.10 65 PC.9 73 PE.2 PC.8 74 66 PA.15 75 PE.1 PA.14 76 67 PA.13 77 PE.0 PA.12 78 68 ICE_DAT/PF.0 79 PC.13 ICE_CK/PF.1 80 69 NC 81 70 VDD 82 PC.11 NC 83 PC.12 VSS 84 71 VSS 85 72 AVSS PA.1 86 PA.2 90 87 PA.3 91 PA.0 PA.4/AD4/LCD_SEG39 92 AVSS PA.5/AD5/LCD_SEG38 93 88 PA.6/AD6/LCD_SEG37 94 89 PA.7/AD7/LCD_SEG36 NuMicro Nano110 LQFP 128-pin 95 3.3.2.1 96 3.3.2 VREF 97 64 PB.9/LCD_V3 NC 98 63 PB.10/LCD_V2 AVDD 99 62 PB.11/LCD_V1 AD8/PD.0 100 61 PE.5 AD9/PD.1 101 60 NC AD10/PD.2 102 59 VLCD 103 58 PE.6 NC 104 57 PC.0/LCD_DH1 LCD_SEG35/PD.4 105 56 PC.1/LCD_DH2 LCD_SEG34/PD.5 106 55 PC.2/LCD_COM0 PC.7 107 54 PC.3/LCD_COM1 PC.6 108 53 PC.4/LCD_COM2 LCD_SEG33/PC.15 109 52 PC.5/LCD_COM3 LCD_SEG32/PC.14 110 51 PD.15/LCD_SEG0(COM4) LCD_SEG31/PB.15 111 50 PD.14/LCD_SEG1(COM5) NC 112 49 PD.7/LCD_SEG2 XT1_IN 113 48 PD.6/LCD_SEG3 XT1_OUT 114 47 PB.3/LCD_SEG4 NC 115 46 PB.2/LCD_SEG5 nRESET 116 45 PB.1/LCD_SEG6 VSS 117 44 PB.0/LCD_SEG7 VSS 118 43 NC NC 119 42 NC VDD 120 41 NC NC 121 40 NC PF.4 122 39 NC PF.5 123 38 PE.7/LCD_SEG8 VSS 124 37 PE.8/LCD_SEG9 PVSS 125 36 PE.9 LCD_SEG30/PB.8 126 35 PE.10 LCD_SEG29/PE.15 127 34 PE.11 LCD_SEG28/PE.14 128 33 PE.12 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 LCD_SEG27/PE.13 LCD_SEG26//PB.14 LCD_SEG25/PB.13 LCD_SEG24/PB.12 NC X32O X32I NC LCD_SEG23/PA.11 LCD_SEG22/PA.10 LCD_SEG21/PA.9 LCD_SEG20/PA.8 LCD_SEG19/PD.8 LCD_SEG18/PD.9 LCD_SEG17/PD.10 LCD_SEG16/PD.11 LCD_SEG15/PD.12 LCD_SEG14/PD.13 LCD_SEG13/PB.4 LCD_SEG12/PB.5 LCD_SEG11/PB.6 LCD_SEG10/PB.7 NC LDO_CAP NC NC VDD NC VSS VSS VSS VSS NANO110 LQFP 128-pin TM Figure 3‑5 NuMicro Jun 17, 2014 Nano110 LQFP 128-pin Diagram Page 37 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF AD11/PD.3 NuMicro Nano100 (B) Product Brief PA.4/AD4/LCD_SEG21 PA.3/AD3/LCD_SEG22 PA.2/AD2/LCD_SEG23 PA.1/AD1 PA.0/AD0 AVSS ICE_CLK/PF.1 ICE_DAT/PF.0 PA.12/LCD_SEG24 PA.13/LCD_SEG25 PA.14/LCD_SEG26 PA.15/LCD_SEG27 PC.8/LCD_SEG28 PC.9/LCD_SEG29 PC.10/LCD_SEG30 PC.11/LCD_SEG31 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 NuMicro Nano110 LQFP 64-pin LCD_SEG20/AD5/PA.5 49 32 PB.9/LCD_V3 LCD_SEG19/AD6/PA.6 50 31 PB.10/LCD_V2 VREF 51 30 PB.11/LCD_V1 AVDD 52 29 LCD_VLCD LCD_SEG17/PC.7 53 28 PC.0/LCD_DH1 PC.6 54 27 PC.1/LCD_DH2 LCD_SEG16/PC.15 55 26 PC.2/LCD_COM0 LCD_SEG15/PC.14 56 25 PC.3/LCD_COM1 LCD_SEG14/PB.15 57 24 PD.15 Nano110 LQFP 64-pin XT1_IN 58 23 PD.14 XT1_OUT 59 22 PD.7 nRESET 60 21 PD.6 VSS 61 20 PB.3/LCD_COM2 PB.2/LCD_COM3 TM Figure 3‑6 NuMicro Jun 17, 2014 7 8 9 10 11 12 13 14 15 16 LCD_SGE8/PA.10 LCD_SGE7/PA.9 LCD_SGE6/PA.8 LCD_SGE5/PB.4 LCD_SGE4/PB.5 LCD_SGE3/PB.6 LCD_SGE2/PB.7 LDO_CAP VDD VSS 6 5 LCD_SGE9/PA.11 4 PB.0/LCD_SEG1(COM5) X32I 17 X32O 64 3 PB.1/LCD_SEG0(COM4) LCD_SEG13/PB.8 LCD_SGE10/PB.12 18 2 19 63 1 62 LCD_SEG11/PB.13 VDD PVSS LCD_SEG12/PB.14 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 3.3.2.2 Nano110 LQFP 64-pin Diagram Page 38 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief PE.3 PE.4 PC.10 65 PC.9 73 PE.2 PC.8 74 66 PA.15 75 PE.1 PA.14 76 67 PA.13 77 PE.0 PA.12 78 68 ICE_DAT/PF.0 79 PC.13 ICE_CLK/PF.1 80 69 NC 81 70 VDD 82 PC.11 NC 83 PC.12 VSS 84 71 VSS 85 72 AVSS PA.1 90 86 PA.2 91 87 PA.3 92 PA.0 PA.4 93 AVSS PA.5 94 88 PA.6 95 89 PA.7 96 NuMicro Nano120 LQFP 128-pin 97 64 PB.9 NC 98 63 PB.10 AVDD 99 62 PB.11 PD.0 100 61 PE.5 PD.1 101 60 NC PD.2 102 59 NC PD.3 103 58 PE.6 NC 104 57 PC.0 PD.4 105 56 PC.1 PD.5 106 55 PC.2 PC.7 107 54 PC.3 PC.6 108 53 PC.4 PC.15 109 52 PC.5 PC.14 110 51 PD.15 PB.15 111 50 PD.14 NC 112 49 PD.7 XT1_IN 113 48 PD.6 XT1_OUT 114 47 PB.3 NC 115 46 PB.2 nRESET 116 45 PB.1 VSS 117 44 PB.0 VSS 118 43 USB_D+ NC 119 42 USB_D- VDD 120 41 USB_VDD33_CAP NC 121 40 USB_VBUS PF.4 122 39 NC PF.5 123 38 PE.7 VSS 124 37 PE.8 PVSS 125 36 PE.9 PB.8 126 35 PE.10 PE.15 127 34 PE.11 PE.14 128 33 PE.12 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 PB.13 PB.12 NC X32O X32I NC PA.11 PA.10 PA.9 PA.8 PD.8 PD.9 PD.10 PD.11 PD.12 PD.13 PB.4 PB.5 PB.6 PB.7 NC LDO_CAP NC NC VDD NC VSS VSS VSS VSS NANO120 LQFP 128-pin TM Figure 3‑7 NuMicro Jun 17, 2014 Nano120 LQFP 128-pin Diagram Page 39 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF VREF PB.14 3.3.3.1 NuMicro Nano120 Pin Diagrams PE.13 3.3.3 NuMicro Nano100 (B) Product Brief ICE_CLK/PF.1 ICE_DAT/PF.0 PA.12 PA.13 PA.14 PA.15 PC.8 42 41 40 39 38 37 36 PC.11 AVSS 43 33 PA.0 44 PC.9 PA.1 45 PC.10 PA.2 46 34 PA.3 47 35 PA.4 48 NuMicro Nano120 LQFP 64-pin PA.5 49 32 PB.9 PA.6 50 31 PB.10 VREF 51 30 PB.11 AVDD 52 29 PE.5 PC.7 53 28 PC.0 PC.6 54 27 PC.1 PC.15 55 26 PC.2 PC.14 56 25 PC.3 NANO120 LQFP 64-pin 11 12 13 14 15 16 PB.6 PB.7 LDO VDD VSS USB_VBUS 10 USB_VDD33_CAP 17 PB.5 18 64 PB.4 63 PB.8 9 PVSS PA.8 USB_D- 8 19 7 62 PA.9 USB_D+ VDD PA.10 PB.0 20 6 21 61 5 60 VSS X32I nRESET PA.11 PB.1 4 22 X32O 59 3 PB.2 XT1_OUT 2 PB.3 23 PB.12 24 58 PB.13 57 1 PB.15 XT1_IN PB.14 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 3.3.3.2 TM Figure 3‑8 NuMicro Jun 17, 2014 Nano120 LQFP 64-pin Diagram Page 40 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief PA.4 PA.3 PA.2 PA.1 PA.0 AVSS ICE_CLK/PF.1 ICE_DAT/PF.0 PA.12 PA.13 PA.14 PA.15 36 35 34 33 32 31 30 29 28 27 26 25 NuMicro Nano120 LQFP 48-pin PA.5 37 24 PC.0 PA.6 38 23 PC.1 VREF 39 22 PC.2 AVDD 40 21 PC.3 PC.7 41 20 PB.3 PC.6 42 19 PB.2 PB.15 43 18 PB.1 XT1_IN 44 17 PB.0 XT1_OUT 45 16 USB_D+ nRESET 46 15 USB_D- PVSS 47 14 USB_VDD33_CAP PB.8 48 13 USB_VBUS Jun 17, 2014 10 11 12 VSS 9 PB.5 VDD 8 PB.4 LDO_CAP 7 5 PA.10 PA.8 4 PA.11 6 3 X32I PA.9 2 X32O TM Figure 3‑9 NuMicro NUMICRO™ NANO100 SERIES PRODUCT BRIEF 1 NANO120 LQFP 48-pin PB.12 3.3.3.3 Nano120 LQFP 48-pin Diagram Page 41 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief NuMicro Nano130 Pin Diagrams PE.3 PE.4 PC.10 65 PC.9 73 PE.2 PC.8 74 66 PA.15 75 PE.1 PA.14 76 67 PA.13 77 PE.0 PA.12 78 68 ICE_DAT/PF.0 79 PC.13 ICE_CLK/PF.1 80 69 NC 81 70 VDD 82 PC.11 NC 83 PC.12 VSS 84 71 VSS 85 72 AVSS PA.1/AD1 86 PA.2/AD2 90 87 PA.3/AD3 91 PA.0/AD0 PA.4/AD4/LCD_SEG39 92 AVSS PA.5/AD5/LCD_SEG38 93 88 PA.6/AD6/LCD_SEG37 94 89 PA.7/AD7/LCD_SEG36 95 NuMicro Nano130 LQFP 128-pin VREF 97 64 PB.9/LCD_V3 NC 98 63 PB.10/LCD_V2 AVDD 99 62 PB.11/LCD_V1 AD8/PD.0 100 61 PE.5 AD9/PD.1 101 60 NC AD10/PD.2 102 59 VLCD AD11/PD.3 103 58 PE.6 NC 104 57 PC.0/LCD_DH1 LCD_SEG35/PD.4 105 56 PC.1/LCD_DH2 LCD_SEG34/PD.5 106 55 PC.2/LCD_COM0 PC.7 107 54 PC.3/LCD_COM1 PC.6 108 53 PC.4/LCD_COM2 LCD_SEG33/PC.15 109 52 PC.5/LCD_COM3 LCD_SEG32/PC.14 110 51 PD.15/LCD_SEG0(COM4) LCD_SEG31/PB.15 111 50 PD.14/LCD_SEG1(COM5) NC 112 49 PD.7/LCD_SEG2 48 PD.6/LCD_SEG3 NANO130 LQFP 128-pin TM Figure 3‑10 NuMicro Jun 17, 2014 24 25 26 27 28 29 30 31 32 LDO NC NC VDD NC VSS VSS VSS VSS PE.12 23 33 NC 128 22 PE.11 LCD_SEG28/PE.14 LCD_SEG10/PB.7 34 21 127 LCD_SEG11/PB.6 PE.10 LCD_SEG29/PE.15 20 35 LCD_SEG12/PB.5 126 19 PE.9 LCD_SEG30/PB.8 LCD_SET13/PB.4 36 18 125 LCD_SEG14/PD.13 PE.8/LCD_SEG9 PVSS 17 37 LCD_SEG15/PD.12 124 16 PE.7/LCD_SEG8 VSS LCD_SEG16/PD.11 38 15 123 LCD_SEG17/PD.10 NC PF.5 14 39 LCD_SEG18/PD.9 122 13 USB_VBUS PF.4 LCD_SEG19/PD.8 40 12 121 LCD_SEG20/PA.8 USB_VDD33_CAP NC 11 41 10 120 LCD_SEG21/PA.9 USB_D- VDD LCD_SEG22/PA.10 42 9 119 LCD_SEG23/PA.11 USB_D+ NC 8 43 NC 118 7 PB.0/LCD_SEG7 VSS X32I PB.1/LCD_SEG6 44 6 45 117 X32O 116 VSS 5 nRESET NC PB.2/LCD_SEG5 4 46 LCD_SEG24/PB.12 115 3 PB.3/LCD_SEG4 NC LCD_SEG25/PB.13 47 2 114 1 113 LCD_SEG26/PB.14 XT1_IN XT1_OUT LCD_SEG27/PE.13 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 3.3.4.1 96 3.3.4 Nano130 LQFP 128-pin Diagram Page 42 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief PA.4/AD4/LCD_SEG21 PA.3/AD3/LCD_SEG22 PA.2/AD2/LCD_SEG23 PA.1/AD1 PA.0/AD0 AVSS ICE_CLK/PF.1 ICE_DAT/PF.0 PA.12/LCD_SEG24 PA.13/LCD_SEG25 PA.14/LCD_SEG26 PA.15/LCD_SEG27 PC.8/LCD_SEG28 PC.9/LCD_SEG29 PC.10/LCD_SEG30 PC.11/LCD_SEG31 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 NuMicro Nano130 LQFP 64-pin 48 3.3.4.2 LCD_SEG20/AD5/PA.5 49 32 PB.9/LCD_V3 LCD_SEG19/AD6/PA.6 50 31 PB.10/LCD_V2 PB.11/LCD_V1 VREF 51 30 AVDD 52 29 VLCD LCD_SEG17/PC.7 53 28 PC.0/LCD_DH1 54 27 PC.1/LCD_DH2 55 26 PC.2/LCD_COM0 LCD_SEG15/PC.14 56 25 PC.3/LCD_COM1 LCD_SEG14/PB.15 57 24 PB.3/LCD_COM2 XT1_IN 58 23 PB.2/LCD_COM3 XT1_OUT 59 22 PB.1/LCD_SEG0(COM4) nRESET 60 21 PB.0/LCD_SEG1(COM5) VSS 61 20 USB_D+ VDD 62 19 USB_D- PVSS 63 18 USB_VDD33_CAP LCD_SEG13/PB.8 64 17 USB_VBUS Jun 17, 2014 7 8 9 10 11 12 13 14 15 16 LCD_SGE6/PA.8 LCD_SGE5/PB.4 LCD_SGE4/PB.5 LCD_SGE3/PB.6 LCD_SGE2/PB.7 LDO_CAP VDD VSS 5 X32I LCD_SGE7/PA.9 4 X32O TM Figure 3‑11 NuMicro LCD_SGE8/PA.10 3 LCD_SGE10/PB.12 6 2 LCD_SEG11/PB.13 LCD_SGE9/PA.11 1 LCD_SEG12/PB.14 Nano130 LQFP 64-pin Nano130 LQFP 64-pin Diagram Page 43 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF PC.6 LCD_SEG16/PC.15 NuMicro Nano100 (B) Product Brief 3.4 Pin Description 3.4.1 NuMicro Nano100 Pin Description NUMICRO™ NANO100 SERIES PRODUCT BRIEF Pin No. LQFP LQFP LQFP/QFN 128-pin 64-pin 48-pin 1 2 3 4 Pin Type Pin Name Description PE.13 I/O General purpose digital I/O pin PB.14 I/O General purpose digital I/O pin INT0 I External interrupt0 input pin SC2_CD I SmartCard2 card detect pin 1 nd SPI2_SS1 I/O SPI2 2 PB.13 I/O General purpose digital I/O pin EBI_AD1 I/O EBI Address/Data bus bit1 PB.12 I/O General purpose digital I/O pin EBI_AD0 I/O EBI Address/Data bus bit0 FCLKO O Frequency Divider output pin slave select pin 2 3 1 5 NC 6 4 2 X32O O External 32.768 kHz crystal output pin 7 5 3 X32I I External 32.768 kHz crystal input pin 8 9 10 11 Jun 17, 2014 NC 6 7 8 4 5 6 PA.11 I/O General purpose digital I/O pin I2C1_SCL I/O I C1 clock pin EBI_nRD O EBI read enable output pin SC0_RST O SmartCard0 RST pin SPI2_MOSI0 I/O SPI2 1 MOSI (Master Out, Slave In) pin PA.10 I/O General purpose digital I/O pin I2C1_SDA I/O I C1 data I/O pin EBI_nWR O EBI write enable output pin SC0_PWR O SmartCard0 Power pin SPI2_MISO0 I/O SPI2 1 MISO (Master In, Slave Out) pin PA.9 I/O General purpose digital I/O pin I2C0_SCL I/O I C0 clock pin SC0_DAT I/O SmartCard0 DATA pin(SC0_UART_RXD) Page 44 of 106 2 st 2 st 2 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. Pin Name Pin Type SPI2_CLK I/O SPI2 serial clock pin PA.8 I/O General purpose digital I/O pin I2C0_SDA I/O I C0 data I/O pin SC0_CLK O SmartCard0 clock pin(SC0_UART_TXD) SPI2_SS0 I/O SPI2 1 slave select pin 13 PD.8 I/O General purpose digital I/O pin 14 PD.9 I/O General purpose digital I/O pin 15 PD.10 I/O General purpose digital I/O pin 16 PD.11 I/O General purpose digital I/O pin 17 PD.12 I/O General purpose digital I/O pin 18 PD.13 I/O General purpose digital I/O pin PB.4 I/O General purpose digital I/O pin UART1_RXD I UART1 Data receiver input pin SC0_CD I SmartCard0 card detect pin LQFP LQFP LQFP/QFN 128-pin 64-pin 48-pin 12 19 21 22 10 11 7 st SPI2_SS0 I/O SPI2 1 slave select pin PB.5 I/O General purpose digital I/O pin UART1_TXD O UART1 Data transmitter output pin SC0_RST O SmartCard0 RST pin SPI2_CLK I/O SPI2 serial clock pin PB.6 I/O General purpose digital I/O pin UART1_RTSn O UART1 Request to Send output pin EBI_ALE O EBI address latch enable output pin SPI2_MISO0 I/O SPI2 1 MISO (Master In, Slave Out) pin PB.7 I/O General purpose digital I/O pin UART1_CTSn I UART1 Clear to Send input pin EBI_nCS O EBI chip select enable output pin SPI2_MOSI0 I/O SPI2 1 MOSI (Master Out, Slave In) pin 9 12 st 13 st NC 14 10 LDO_CAP P 25 Jun 17, 2014 st 8 23 24 2 LDO output pin NC Page 45 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 20 9 Description NuMicro Nano100 (B) Product Brief Pin No. LQFP LQFP LQFP/QFN 128-pin 64-pin 48-pin Pin Type Pin Name 26 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 27 Description NC 15 11 P VDD 28 Power supply for I/O ports and LDO source NC VSS P Ground 30 VSS P Ground 31 VSS P Ground 32 VSS P Ground 33 PE.12 I/O General purpose digital I/O pin 34 PE.11 I/O General purpose digital I/O pin 35 PE.10 I/O General purpose digital I/O pin 36 PE.9 I/O General purpose digital I/O pin 37 PE.8 I/O General purpose digital I/O pin 38 PE.7 I/O General purpose digital I/O pin 29 16 12 39 NC 40 NC 41 NC 42 NC 43 NC I/O General purpose digital I/O pin UART0_RXD I UART0 Data receiver input pin SPI1_MOSI0 I/O SPI1 1 MOSI (Master Out, Slave In) pin PB.1 I/O General purpose digital I/O pin UART0_TXD O UART0 Data transmitter output pin SPI1_MISO0 I/O SPI1 1 MISO (Master In, Slave Out) pin PB.2 I/O General purpose digital I/O pin UART0_RTSn O UART0 Request to Send output pin EBI_nWRL O EBI low byte write enable output pin SPI1_CLK I/O SPI1 serial clock pin PB.3 I/O General purpose digital I/O pin I UART0 Clear to Send input pin PB.0 44 45 46 47 17 18 19 20 13 14 st 15 16 UART0_CTSn Jun 17, 2014 st Page 46 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. LQFP LQFP LQFP/QFN 128-pin 64-pin 48-pin Pin Name Pin Type EBI_nWRH O EBI high byte write enable output pin SPI1_SS0 I/O SPI1 1 slave select pin Description st 48 21 PD.6 I/O General purpose digital I/O pin 49 22 PD.7 I/O General purpose digital I/O pin 50 23 PD.14 I/O General purpose digital I/O pin 51 24 PD.15 I/O General purpose digital I/O pin PC.5 I/O General purpose digital I/O pin SPI0_MOSI1 I/O SPI0 2 PC.4 I/O General purpose digital I/O pin SPI0_MISO1 I/O SPI0 2 PC.3 I/O General purpose digital I/O pin SPI0_MOSI0 I/O SPI0 1 MOSI (Master Out, Slave In) pin I2S_DO O I S data output SC1_RST O SmartCard1 RST pin PC.2 I/O General purpose digital I/O pin SPI0_MISO0 I/O SPI0 1 MISO (Master In, Slave Out) pin 52 53 54 56 57 58 26 27 28 17 18 st 2 st 2 I I S data input SC1_PWR O SmartCard1 PWR pin PC.1 I/O General purpose digital I/O pin SPI0_CLK I/O SPI0 serial clock pin I2S_BCLK I/O I S bit clock pin SC1_DAT I/O SmartCard1 DATA pin(SC1_UART_RXD) PC.0 / MCLKO I/O General purpose digital I/O pin / Module clock output pin SPI0_SS0 I/O SPI0 1 slave select pin I2S_LRCLK I/O I S left right channel clock SC1_CLK O SmartCard1 clock pin(SC1_UART_TXD) PE.6 I/O General purpose digital I/O pin 2 st 2 59 NC 60 NC Jun 17, 2014 MISO (Master In, Slave Out) pin I2S_DI 19 20 nd MOSI (Master Out, Slave In) pin Page 47 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 55 25 nd NuMicro Nano100 (B) Product Brief Pin No. LQFP LQFP LQFP/QFN 128-pin 64-pin 48-pin NUMICRO™ NANO100 SERIES PRODUCT BRIEF 61 62 63 64 29 30 31 32 Pin Type Pin Name Description PE.5 I/O General purpose digital I/O pin PWM1_CH1 I/O PWM1 Channel1 output PB.11 I/O General purpose digital I/O pin PWM1_CH0 I/O PWM1 Channel0 output TM3 O Timer3 external counter input SC2_DAT I/O SmartCard2 DATA pin(SC2_UART_RXD) SPI0_MISO0 I/O SPI0 1 MISO (Master In, Slave Out) pin PB.10 I/O General purpose digital I/O pin SPI0_SS1 I/O SPI0 2 TM2 O Timer2 external counter input SC2_CLK O SmartCard2 clock pin(SC2_UART_TXD) SPI0_MOSI0 I/O SPI0 1 MOSI (Master Out, Slave In) pin PB.9 I/O General purpose digital I/O pin SPI1_SS1 I/O SPI1 2 TM1 O Timer1 external counter input SC2_RST O SmartCard2 RST pin INT0 I External interrupt0 input pin PE.4 I/O General purpose digital I/O pin SPI0_MOSI0 I/O SPI0 1 MOSI (Master Out, Slave In) pin PE.3 I/O General purpose digital I/O pin SPI0_MISO0 I/O SPI0 1 MISO (Master In, Slave Out) pin PE.2 I/O General purpose digital I/O pin SPI0_CLK I/O SPI0 serial clock pin PE.1 I/O General purpose digital I/O pin. PWM1_CH3 I/O PWM1 Channel3 output SPI0_SS0 I/O SPI0 1 slave select pin PE.0 I/O General purpose digital I/O pin PWM1_CH2 I/O PWM1 Channel2 output I2S_MCLK O I S master clock output pin PC.13 I/O General purpose digital I/O pin 21 22 23 24 st nd slave select pin st 65 nd slave select pin st 66 st 67 68 69 70 Jun 17, 2014 Page 48 of 106 st 2 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. LQFP LQFP LQFP/QFN 128-pin 64-pin 48-pin 71 72 73 75 76 77 Jun 17, 2014 34 35 Description nd SPI1_MOSI1 I/O SPI1 2 PWM1_CH1 O PWM1 Channel1 output SNOOPER I Snooper pin INT1 I External interrupt 1 I2C0_SCL O I C0 clock pin PC.12 I/O General purpose digital I/O pin SPI1_MISO1 I/O SPI1 2 PWM1_CH0 O PWM1 Channel0 output INT0 I External interrupt0 input pin MOSI (Master Out, Slave In) pin 2 nd MISO (Master In, Slave Out) pin 2 I2C0_SDA I/O I C0 data I/O pin PC.11 I/O General purpose digital I/O pin SPI1_MOSI0 I/O SPI1 1 MOSI (Master Out, Slave In) pin UART1_TXD O UART1 Data transmitter output pin PC.10 I/O General purpose digital I/O pin SPI1_MISO0 I/O SPI1 1 MISO (Master In, Slave Out) pin UART1_RXD I UART1 Data receiver input pin PC.9 I/O General purpose digital I/O pin SPI1_CLK I/O SPI1 serial clock pin I2C1_SCL I/O I C1 clock pin PC.8 I/O General purpose digital I/O pin SPI1_SS0 I/O SPI1 1 slave select pin EBI_MCLK O EBI external clock output pin I2C1_SDA I/O I C1 data I/O pin PA.15 I/O General purpose digital I/O pin PWM0_CH3 I/O PWM0 Channel3 output I2S_MCLK O I S master clock output pin TC3 I Timer3 capture input SC0_PWR O SmartCard0 Power pin UART0_TXD O UART0 Data transmitter output pin PA.14 I/O General purpose digital I/O pin st st 2 st 36 37 38 2 2 25 26 Page 49 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 74 33 Pin Type Pin Name NuMicro Nano100 (B) Product Brief Pin No. NUMICRO™ NANO100 SERIES PRODUCT BRIEF LQFP LQFP LQFP/QFN 128-pin 64-pin 48-pin 78 39 27 Pin Type Pin Name PWM0_CH2 I/O PWM0 Channel2 output EBI_AD15 I/O EBI Address/Data bus bit15 TC2 I Timer2 capture input UART0_RXD I UART0 Data receiver input pin PA.13 I/O General purpose digital I/O pin PWM0_CH1 I/O PWM0 Channel1 output EBI_AD14 I/O EBI Address/Data bus bit14 I TC1 79 40 28 81 41 42 29 Timer1 capture input 2 I2C0_SCL I/O I C0 clock pin PA.12 I/O General purpose digital I/O pin PWM0_CH0 I/O PWM0 Channel0 output EBI_AD13 I/O EBI Address/Data bus bit13 TC0 80 Description I Timer0 capture input 2 I2C0_SDA I/O I C0 data I/O pin ICE_DAT I/O Serial Wired Debugger Data pin PF.0 I/O General purpose digital I/O pin INT0 I External interrupt0 input pin ICE_CLK I Serial Wired Debugger Clock pin PF.1 I/O General purpose digital I/O pin FCLKO O Frequency Divider output pin INT1 I External interrupt1 input pin 30 82 NC 83 VDD P 84 Power supply for I/O ports and LDO source for internal PLL and digital circuit NC 85 VSS P Ground 86 VSS P Ground 87 43 31 88 89 Jun 17, 2014 44 32 AVSS AP Ground Pin for analog circuit AVSS AP Ground Pin for analog circuit PA.0 I/O General purpose digital I/O pin Page 50 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. LQFP LQFP LQFP/QFN 128-pin 64-pin 48-pin Pin Type Pin Name AI AD0 I SC2_CD 90 91 45 46 33 94 95 96 Jun 17, 2014 48 49 50 SmartCard2 card detect I/O General purpose digital I/O pin AD1 AI ADC analog input1 EBI_AD12 I/O EBI Address/Data bus bit12 PA.2 I/O General purpose digital I/O pin AD2 AI ADC analog input2 EBI_AD11 I/O EBI Address/Data bus bit11 34 I UART1 Data receiver input pin PA.3 I/O General purpose digital I/O pin AD3 AI ADC analog input3 EBI_AD10 I/O EBI Address/Data bus bit10 UART1_TXD O UART1 Data transmitter output pin PA.4 I/O General purpose digital I/O pin AD4 AI ADC analog input4 EBI_AD9 I/O EBI Address/Data bus bit9 SC2_PWR O SmartCard2 Power pin I2C0_SDA I/O I C0 data I/O pin PA.5 I/O General purpose digital I/O pin AD5 AI ADC analog input5 EBI_AD8 I/O EBI Address/Data bus bit8 SC2_RST O SmartCard2 RST pin I2C0_SCL I/O I C0 clock pin PA.6 I/O General purpose digital I/O pin AD6 AI ADC analog input6 EBI_AD7 I/O EBI Address/Data bus bit7 35 36 37 2 2 38 TC3 I Timer3 capture input SC2_CLK O SmartCard2 clock pin(SC2_UART_TXD) PWM0_CH3 O PWM0 Channel3 output PA.7 I/O General purpose digital I/O pin Page 51 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 93 47 ADC analog input0 PA.1 UART1_RXD 92 Description NuMicro Nano100 (B) Product Brief Pin No. NUMICRO™ NANO100 SERIES PRODUCT BRIEF LQFP LQFP LQFP/QFN 128-pin 64-pin 48-pin Pin Type Pin Name AD7 AI ADC analog input7 EBI_AD6 I/O EBI Address/Data bus bit6 I TC2 97 51 39 I/O SmartCard2 DATA pin(SC2_UART_RXD) PWM0_CH2 O PWM0 Channel2 output AP VREF 101 Voltage reference input for ADC NC 52 40 AVDD AP Power supply for internal analog circuit PD.0 I/O General purpose digital I/O pin I UART1 Data receiver input pin UART1_RXD 100 Timer2 capture input SC2_DAT 98 99 Description st SPI2_SS0 I/O SPI2 1 slave select pin SC1_CLK O SmartCard1 clock pin(SC1_UART_TXD) AD8 AI ADC analog input8 PD.1 I/O General purpose digital I/O pin UART1_TXD O UART1 Data transmitter output pin SPI2_CLK I/O SPI2 serial clock pin SC1_DAT I/O SmartCard1 DATA pin(SC1_UART_RXD). AD9 AI ADC analog input9 PD.2 I/O General purpose digital I/O pin UART1_RTSn O UART1 Request to Send output pin I2S_LRCLK I/O I S left right channel clock SPI2_MISO0 I/O SPI2 1 MISO (Master In, Slave Out) pin SC1_PWR O SmartCard1 Power pin AD10 AI ADC analog input10 PD.3 I/O General purpose digital I/O pin I UART1 Clear to Send input pin 2 102 UART1_CTSn 2 I2S_BCLK I/O I S bit clock pin SPI2_MOSI0 I/O SPI2 1 MOSI (Master Out, Slave In) pin SC1_RST O SmartCard1 RST pin AD11 AI ADC analog input11 103 Jun 17, 2014 st Page 52 of 106 st Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. LQFP LQFP LQFP/QFN 128-pin 64-pin 48-pin Pin Type Pin Name 104 Description NC I/O PD.4 I I2S_DI General purpose digital I/O pin 2 I S data input 105 SPI2_MISO1 I SC1_CD 106 107 109 110 111 Jun 17, 2014 54 41 SPI2 2 nd MISO (Master In, Slave Out) pin SmartCard1 card detect PD.5 I/O General purpose digital I/O pin I2S_DO O I S data output SPI2_MOSI1 I/O SPI2 2 PC.7 I/O General purpose digital I/O pin DA1_OUT AO DAC 1 output EBI_AD5 I/O EBI Address/Data bus bit5 2 nd MOSI (Master Out, Slave In) pin TC1 I Timer1 capture input PWM0_CH1 O PWM0 Channel1 output PC.6 I/O General purpose digital I/O pin DA0_OUT I EBI_AD4 I/O DAC0 output EBI Address/Data bus bit4 42 TC0 I Timer0 capture input SC1_CD I SmartCard1 card detect pin PWM0_CH0 O PWM0 Channel0 output PC.15 I/O General purpose digital I/O pin EBI_AD3 I/O EBI Address/Data bus bit3 55 56 57 TC0 I Timer0 capture input PWM1_CH2 O PWM1 Channel2 output PC.14 I/O General purpose digital I/O pin EBI_AD2 I/O EBI Address/Data bus bit2 PWM1_CH3 I/O PWM1 Channel3 output PB.15 I/O General purpose digital I/O pin INT1 I External interrupt1 input pin SNOOPER I Snooper pin SC1_CD I SmartCard1 card detect 43 Page 53 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 108 53 I/O NuMicro Nano100 (B) Product Brief Pin No. LQFP LQFP LQFP/QFN 128-pin 64-pin 48-pin Pin Name Pin Type NUMICRO™ NANO100 SERIES PRODUCT BRIEF 112 113 NC 58 XT1_IN O External 4~24 MHz crystal output pin PF.3 I/O General purpose digital I/O pin 44 XT1_OUT 114 59 I I/O 115 General purpose digital I/O pin NC 116 60 117 61 46 118 nRESET I External reset input: Low active, set this pin low reset chip to initial state. With internal pull-up. VSS P Ground VSS P Ground 119 NC 62 VDD P 121 Power supply for I/O ports and LDO source for internal PLL and digital circuit NC PF.4 I/O General purpose digital I/O pin I2C0_SDA I/O I C0 data I/O pin PF.5 I/O General purpose digital I/O pin I2C0_SCL I/O I C0 clock pin 122 123 124 125 External 4~24 MHz crystal input pin 45 PF.2 120 Description 63 47 2 2 VSS P Ground PVSS P PLL Ground PB.8 I/O General purpose digital I/O pin STADC I ADC external trigger input. TM0 I Timer0 external counter input INT0 I External interrupt0 input pin SC2_PWR O SmartCard2 Power pin 127 PE.15 I/O General purpose digital I/O pin 128 PE.14 I/O General purpose digital I/O pin 126 64 48 Note: Pin Type: I = Digital Input, O = Digital Output; AI = Analog Input; AO = Analog Output; P = Power Pin; AP = Analog Power. Jun 17, 2014 Page 54 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief 3.4.2 NuMicro Nano110 Pin Description Pin No. LQFP 128-pin LQFP 64-pin LQFP 48-pin Pin Name Pin Type Description PE.13 I/O General purpose digital I/O pin LCD_SEG27 O LCD segment output 27 at LQFP128 PB.14 I/O General purpose digital I/O pin INT0 I External interrupt0 input pin SC2_CD I SmartCard2 card detect 1 2 3 nd SPI2_SS1 I/O SPI2 2 LCD_SEG12 O LCD segment output 12 at LQFP64 LCD_SEG26 O LCD segment output 26 at LQFP128 PB.13 I/O General purpose digital I/O pin EBI_AD1 I/O EBI Address/Data bus bit1 LCD_SEG11 O LCD segment output 11 at LQFP64 LCD_SEG25 O LCD segment output 25 at LQFP128 PB.12 I/O General purpose digital I/O pin EBI_AD0 I/O EBI Address/Data bus bit0 FCLKO O Frequency Divider output pin LCD_SEG10 O LCD segment output 10 at LQFP64 LCD_SEG24 O LCD segment output 24 at LQFP128 slave select pin 2 3 5 NC 6 4 X32O O External 32.768 kHz crystal output pin 7 5 X32I I External 32.768 kHz crystal input pin 8 9 10 Jun 17, 2014 NC 6 7 PA.11 I/O General purpose digital I/O pin I2C1_SCL I/O I C1 clock pin EBI_nRD O EBI read enable output pin SC0_RST O SmartCard0 RST pin SPI2_MOSI0 I/O SPI2 1 MOSI (Master Out, Slave In) pin LCD_SEG9 O LCD segment output 9 at LQFP64 LCD_SEG23 O LCD segment output 23 at LQFP128 PA.10 I/O General purpose digital I/O pin Page 55 of 106 2 st Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 4 1 NuMicro Nano100 (B) Product Brief Pin No. NUMICRO™ NANO100 SERIES PRODUCT BRIEF LQFP 128-pin 11 12 LQFP 64-pin LQFP 48-pin Pin Name Pin Type Description I2C1_SDA I/O I C1 data I/O pin EBI_nWR O EBI write enable output pin SC0_PWR O SmartCard0 Power pin SPI2_MISO0 I/O SPI2 1 MISO (Master In, Slave Out) pin LCD_SEG8 O LCD segment output 8 at LQFP64 LCD_SEG22 O LCD segment output 22 at LQFP128 PA.9 I/O General purpose digital I/O pin I2C0_SCL I/O I C0 clock pin SC0_DAT I/O SmartCard0 DATA pin(SC0_UART_RXD) SPI2_CLK I/O SPI2 serial clock pin LCD_SEG7 O LCD segment output 7 at LQFP64 LCD_SEG21 O LCD segment output 21 at LQFP128 PA.8 I/O General purpose digital I/O pin I2C0_SDA I/O I C0 data I/O pin SC0_CLK O SmartCard0 clock pin(SC0_UART_TXD) SPI2_SS0 I/O SPI2 1 slave select pin LCD_SEG6 O LCD segment output 6 at LQFP64 LCD_SEG20 O LCD segment output 20 at LQFP128 PD.8 I/O General purpose digital I/O pin LCD_SEG19 O LCD segment output 19 at LQFP128 PD.9 I/O General purpose digital I/O pin LCD_SEG18 O LCD segment output 18 at LQFP128 PD.10 I/O General purpose digital I/O pin LCD_SEG17 O LCD segment output 17 at LQFP128 PD.11 I/O General purpose digital I/O pin LCD_SEG16 O LCD segment output 16 at LQFP128 PD.12 I/O General purpose digital I/O pin LCD_SEG15 O LCD segment output 15 at LQFP128 PD.13 I/O General purpose digital I/O pin LCD_SEG14 O LCD segment output 14 at LQFP128 2 st 2 8 9 2 st 13 14 15 16 17 18 Jun 17, 2014 Page 56 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. LQFP 128-pin LQFP 64-pin LQFP 48-pin Pin Name Pin Type I/O General purpose digital I/O pin UART1_RXD I UART1 Data receiver input pin SC0_CD I SmartCard0 card detect pin PB.4 19 20 21 10 I/O SPI2 1 slave select pin LCD_SEG5 O LCD segment output 5 at LQFP64 LCD_SEG13 O LCD segment output 13 at LQFP128 PB.5 I/O General purpose digital I/O pin UART1_TXD O UART1 Data transmitter output pin SC0_RST O SmartCard0 RST pin SPI2_CLK I/O SPI2 serial clock pin LCD_SEG4 O LCD segment output 4 at LQFP64 LCD_SEG12 O LCD segment output 12 at LQFP128 PB.6 I/O General purpose digital I/O pin UART1_RTSn O UART1 Request to Send output pin EBI_ALE O EBI address latch enable output pin SPI2_MISO0 I/O SPI2 1 MISO (Master In, Slave Out) pin LCD_SEG3 O LCD segment output 3 at LQFP64 LCD_SEG11 O LCD segment output 11 at LQFP128 PB.7 I/O General purpose digital I/O pin UART1_CTSn I UART1 Clear to Send input pin EBI_nCS O EBI chip select enable output pin SPI2_MOSI0 I/O SPI2 1 MOSI (Master Out, Slave In) pin LCD_SEG2 O LCD segment output 2 at LQFP64 LCD_SEG10 O LCD segment output 10 at LQFP128 11 12 st 13 23 24 st SPI2_SS0 st NC 14 LDO_CAP P LDO output pin 25 NC 26 NC 27 15 VDD P 28 Jun 17, 2014 Power supply for I/O ports and LDO source NC Page 57 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 22 Description NuMicro Nano100 (B) Product Brief NUMICRO™ NANO100 SERIES PRODUCT BRIEF Pin No. LQFP 128-pin LQFP 64-pin 29 16 LQFP 48-pin Pin Name Pin Type Description VSS P Ground 30 VSS P Ground 31 VSS P Ground 32 VSS P Ground I/O General purpose digital I/O pin I UART1 Clear to Send input pin PE.11 I/O General purpose digital I/O pin UART1_RTSn O UART1 Request to Send output pin PE.10 I/O General purpose digital I/O pin UART1_TXD O UART1 Data transmitter output pin PE.9 I/O General purpose digital I/O pin I UART1 Data receiver input pin PE.8 I/O General purpose digital I/O pin LCD_SEG9 O LCD segment output 9 at LQFP128 PE.7 I/O General purpose digital I/O pin LCD_SEG8 O LCD segment output 8 at LQFP128 PE.12 33 UART1_CTSn 34 35 36 UART1_RXD 37 38 39 NC 40 NC 41 NC 42 NC 43 NC I/O General purpose digital I/O pin UART0_RXD I UART0 Data receiver input pin SPI1_MOSI0 I/O SPI1 1 MOSI (Master Out, Slave In) pin LCD_SEG1 O LCD segment output 1 at LQFP64 (or as LD_COM5) LCD_SEG7 O LCD segment output 7 at LQFP128 PB.1 I/O General purpose digital I/O pin UART0_TXD O UART0 Data transmitter output pin SPI1_MISO0 I/O SPI1 1 MISO (Master In, Slave Out) pin PB.0 44 45 Jun 17, 2014 17 18 Page 58 of 106 st st Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. LQFP 128-pin 46 47 49 50 51 52 53 Jun 17, 2014 LQFP 48-pin Pin Name Pin Type Description LCD_SEG0 O LCD segment output 0 at LQFP64 (or as LCD_COM4) LCD_SEG6 O LCD segment output 6 at LQFP128 PB.2 I/O General purpose digital I/O pin UART0_RTSn O UART0 Request to Send output pin EBI_nWRL O EBI low byte write enable output pin SPI1_CLK I/O SPI1 serial clock pin LCD_COM3 O LCD common output 3 at LQFP64 LCD_SEG5 O LCD segment output 5 at LQFP128 PB.3 I/O General purpose digital I/O pin UART0_CTSn I UART0 Clear to Send input pin EBI_nWRH O EBI high byte write enable output pin SPI1_SS0 I/O SPI1 1 slave select pin LCD_COM2 O LCD common output 2 at LQFP64 LCD_SEG4 O LCD segment output 4 at LQFP128 PD.6 I/O General purpose digital I/O pin LCD_SEG3 O LCD segment output 3 at LQFP128 PD.7 I/O General purpose digital I/O pin LCD_SEG2 O LCD segment output 2 at LQFP128 PD.14 I/O General purpose digital I/O pin LCD_SEG1 O LCD segment output 1 at LQFP128 (or as LCD_COM5) PD.15 I/O General purpose digital I/O pin LCD_SEG0 O LCD segment output 0 at LQFP128 (or as LCD_COM4) PC.5 I/O General purpose digital I/O pin SPI0_MOSI1 I/O SPI0 2 LCD_COM3 O LCD common output 3 at LQFP128 PC.4 I/O General purpose digital I/O pin SPI0_MISO1 I/O SPI0 2 LCD_COM2 O LCD common output 2 at LQFP128 19 20 st 21 22 23 24 Page 59 of 106 nd nd MOSI (Master Out, Slave In) pin MISO (Master In, Slave Out) pin Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 48 LQFP 64-pin NuMicro Nano100 (B) Product Brief Pin No. NUMICRO™ NANO100 SERIES PRODUCT BRIEF LQFP 128-pin 54 55 56 57 LQFP 64-pin Pin Name Pin Type PC.3 I/O General purpose digital I/O pin SPI0_MOSI0 I/O SPI0 1 MOSI (Master Out, Slave In) pin I2S_DO O I S data output SC1_RST O SmartCard1 RST pin LCD_COM1 O LCD common output 1 at LQFP64 LCD_COM1 O LCD common output 1 at LQFP128 PC.2 I/O General purpose digital I/O pin SPI0_MISO0 I/O SPI0 1 MISO (Master In, Slave Out) pin st 2 st 2 I2S_DI I I S data input SC1_PWR O SmartCard1 PWR pin LCD_COM0 O LCD common output 0 at LQFP64 LCD_COM0 O LCD common output 0 at LQFP128 PC.1 I/O General purpose digital I/O pin SPI0_CLK I/O SPI0 serial clock pin I2S_BCLK I/O I S bit clock pin SC1_DAT I/O SmartCard1 DATA pin(SC1_UART_RXD) LCD_DH2 O LCD externl capacitor pin of charge pump circuit at LQFP64 LCD_DH2 O LCD externl capacitor pin of charge pump circuit at LQFP128 PC.0 / MCLKO I/O General purpose digital I/O pin / Module clock output pin SPI0_SS0 I/O SPI0 1 slave select pin I2S_LRCLK I/O I S left right channel clock SC1_CLK O SmartCard1 clock pin(SC1_UART_TXD) LCD_DH1 O LCD externl capacitor pin of charge pump circuit at LQFP64 LCD_DH1 O LCD externl capacitor pin of charge pump circuit at LQFP128 PE.6 I/O General purpose digital I/O pin LCD_VLCD AO LCD power supply pin 26 27 28 29 60 Jun 17, 2014 Description 25 58 59 LQFP 48-pin 2 st 2 NC Page 60 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. LQFP 128-pin LQFP 64-pin 61 62 63 Pin Name Pin Type Description PE.5 I/O General purpose digital I/O pin PB.11 I/O General purpose digital I/O pin PWM1_CH0 I/O PWM1 Channel0 output TM3 O Timer3 external counter input SC2_DAT I/O SmartCard2 DATA pin(SC2_UART_RXD) SPI0_MISO0 I/O SPI0 1 MISO (Master In, Slave Out) pin LCD_V1 O Unit voltage for LCD charge pump circuit at LQFP64 LCD_V1 O LCD Unit voltage for LCD charge pump circuit at LQFP128 PB.10 I/O General purpose digital I/O pin SPI0_SS1 I/O SPI0 2 TM2 O Timer2 external counter input SC2_CLK O SmartCard2 clock pin(SC2_UART_TXD) SPI0_MOSI0 I/O SPI0 1 MOSI (Master Out, Slave In) pin LCD_V2 O LCD driver biasing voltage at LQFP64 LCD_V2 O LCD driver biasing voltage at LQFP128 PB.9 I/O General purpose digital I/O pin SPI1_SS1 I/O SPI1 2 TM1 O Timer1 external counter input SC2_RST O SmartCard2 RST pin INT0 I External interrupt0 input pin LCD_V3 O LCD driver biasing voltage at LQFP64 LCD_V3 O LCD driver biasing voltage at LQFP128 PE.4 I/O General purpose digital I/O pin SPI0_MOSI0 I/O SPI0 1 MOSI (Master Out, Slave In) pin PE.3 I/O General purpose digital I/O pin SPI0_MISO0 I/O SPI0 1 MISO (Master In, Slave Out) pin PE.2 I/O General purpose digital I/O pin SPI0_CLK I/O SPI0 serial clock pin PE.1 I/O General purpose digital I/O pin 30 31 32 65 66 st nd slave select pin st nd slave select pin st st 67 68 Jun 17, 2014 Page 61 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 64 LQFP 48-pin NuMicro Nano100 (B) Product Brief Pin No. NUMICRO™ NANO100 SERIES PRODUCT BRIEF LQFP 128-pin LQFP 64-pin 69 LQFP 48-pin Pin Name Pin Type Description PWM1_CH3 I/O PWM1 Channel3 output SPI0_SS0 I/O SPI0 1 slave select pin PE.0 I/O General purpose digital I/O pin PWM1_CH2 I/O PWM1 Channel2 output I2S_MCLK O I S master clock output pin PC.13 I/O General purpose digital I/O pin SPI1_MOSI1 I/O SPI1 2 PWM1_CH1 O PWM1 Channel1 output SNOOPER I Snooper pin INT1 I External interrupt 1 I2C0_SCL O I C0 clock pin PC.12 I/O General purpose digital I/O pin SPI1_MISO1 I/O SPI1 2 PWM1_CH0 O PWM1 Channel0 output INT0 I External interrupt0 input pin st 2 nd MOSI (Master Out, Slave In) pin 70 71 72 73 74 75 Jun 17, 2014 2 nd MISO (Master In, Slave Out) pin 2 I2C0_SDA I/O I C0 data I/O pin PC.11 I/O General purpose digital I/O pin SPI1_MOSI0 I/O SPI1 1 MOSI (Master Out, Slave In) pin UART1_TXD O UART1 Data transmitter output pin LCD_SEG31 O LCD segment output 31 at LQFP64 PC.10 I/O General purpose digital I/O pin SPI1_MISO0 I/O SPI1 1 MISO (Master In, Slave Out) pin UART1_RXD I UART1 Data receiver input pin LCD_SEG30 O LCD segment output 30 at LQFP64 PC.9 I/O General purpose digital I/O pin SPI1_CLK I/O SPI1 serial clock pin I2C1_SCL I/O I C1 clock pin LCD_SEG29 O LCD segment output 29 at LQFP64 PC.8 I/O General purpose digital I/O pin SPI1_SS0 I/O SPI1 1 slave select pin st 33 st 34 35 36 Page 62 of 106 2 st Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. LQFP 128-pin 76 77 37 LQFP 48-pin Pin Name Pin Type EBI_MCLK O EBI external clock output pin I2C1_SDA I/O I C1 data I/O pin LCD_SEG28 O LCD segment output 28 at LQFP64 PA.15 I/O General purpose digital I/O pin PWM0_CH3 I/O PWM0 Channel3 output I2S_MCLK O I S master clock output pin TC3 I Timer3 capture input SC0_PWR O SmartCard0 Power pin UART0_TXD O UART0 Data transmitter output pin LCD_SEG27 O LCD segment output 27 at LQFP64 PA.14 I/O General purpose digital I/O pin PWM0_CH2 I/O PWM0 Channel2 output EBI_AD15 I/O EBI Address/Data bus bit15 Jun 17, 2014 2 TC2 I Timer2 capture input UART0_RXD I UART0 Data receiver input pin LCD_SEG26 O LCD segment output 26 at LQFP64 PA.13 I/O General purpose digital I/O pin PWM0_CH1 I/O PWM0 Channel1 output EBI_AD14 I/O EBI Address/Data bus bit14 39 I Timer1 capture input 2 I2C0_SCL I/O I C0 clock pin LCD_SEG25 O LCD segment output 25 at LQFP64 PA.12 I/O General purpose digital I/O pin PWM0_CH0 I/O PWM0 Channel0 output EBI_AD13 I/O EBI Address/Data bus bit13 40 I TC0 80 2 38 TC1 79 Description Timer0 capture input 2 I2C0_SDA I/O I C0 data I/O pin LCD_SEG24 O LCD segment output 24 at LQFP64 ICE_DAT I/O Serial Wired Debugger Data pin PF.0 I/O General purpose digital I/O pin 41 Page 63 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 78 LQFP 64-pin NuMicro Nano100 (B) Product Brief Pin No. NUMICRO™ NANO100 SERIES PRODUCT BRIEF LQFP 128-pin 81 LQFP 64-pin LQFP 48-pin Pin Name Pin Type Description INT0 I External interrupt0 input pin ICE_CLK I Serial Wired Debugger Clock pin PF.1 I/O General purpose digital I/O pin FCLKO O Frequency Divider output pin INT1 I External interrupt1 input pin 42 82 NC 83 P VDD 84 Power supply for I/O ports and LDO source for internal PLL and digital circuit NC 85 VSS P Ground 86 VSS P Ground 87 43 88 89 44 AVSS AP Ground Pin for analog circuit AVSS AP Ground Pin for analog circuit PA.0 I/O General purpose digital I/O pin AD0 AI ADC analog input0 I SC2_CD 90 91 92 93 Jun 17, 2014 45 46 47 48 SmartCard2 card detect PA.1 I/O General purpose digital I/O pin AD1 AI ADC analog input1 EBI_AD12 I/O EBI Address/Data bus bit12 PA.2 I/O General purpose digital I/O pin AD2 AI ADC analog input2 EBI_AD11 I/O EBI Address/Data bus bit11 UART1_RXD I LCD_SEG23* AO LCD segment output 23 at LQFP64 PA.3 I/O General purpose digital I/O pin AD3 AI ADC analog input3 EBI_AD10 I/O EBI Address/Data bus bit10 UART1_TXD O UART1 Data transmitter output pin LCD_SEG22* AO LCD segment output 22 at LQFP64 PA.4 I/O General purpose digital I/O pin Page 64 of 106 UART1 Data receiver input pin Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. LQFP 128-pin 94 49 Pin Name Pin Type AD4 AI ADC analog input4 EBI_AD9 I/O EBI Address/Data bus bit9 SC2_PWR O SmartCard2 Power pin I2C0_SDA I/O I C0 data I/O pin LCD_SEG21* AO LCD segment output 21 at LQFP64 LCD_SEG39* AO LCD segment output 39 at LQFP128 PA.5 I/O General purpose digital I/O pin AD5 AI ADC analog input5 EBI_AD8 I/O EBI Address/Data bus bit8 SC2_RST O SmartCard2 RST pin I2C0_SCL I/O I C0 clock pin LCD_SEG20* AO LCD segment output 19 at LQFP64 LCD_SEG38* AO LCD segment output 37 at LQFP128 PA.6 I/O General purpose digital I/O pin AD6 AI ADC analog input6 EBI_AD7 I/O EBI Address/Data bus bit7 2 2 TC3 I Timer3 capture input SC2_CLK O SmartCard2 clock pin(SC2_UART_TXD) PWM0_CH3 O PWM0 Channel3 output LCD_SEG19* AO LCD segment output 19 at LQFP64 LCD_SEG37* AO LCD segment output 37 at LQFP128 PA.7 I/O General purpose digital I/O pin AD7 AI ADC analog input7 EBI_AD6 I/O EBI Address/Data bus bit6 I TC2 51 Timer2 capture input SC2_DAT I/O SmartCard2 DATA pin(SC2_UART_RXD) PWM0_CH2 O PWM0 Channel2 output LCD_SEG36* AO LCD segment output 36 output at LQFP128 VREF AP Voltage reference input for ADC 98 Jun 17, 2014 Description 50 96 97 LQFP 48-pin NC Page 65 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 95 LQFP 64-pin NuMicro Nano100 (B) Product Brief NUMICRO™ NANO100 SERIES PRODUCT BRIEF Pin No. LQFP 128-pin LQFP 64-pin 99 52 LQFP 48-pin Pin Name Pin Type AVDD AP Power supply for internal analog circuit PD.0 I/O General purpose digital I/O pin I UART1 Data receiver input pin UART1_RXD 100 101 Description st SPI2_SS0 I/O SPI2 1 slave select pin SC1_CLK O SmartCard1 clock pin(SC1_UART_TXD) AD8 AI ADC analog input8 PD.1 I/O General purpose digital I/O pin UART1_TXD O UART1 Data transmitter output pin SPI2_CLK I/O SPI2 serial clock pin SC1_DAT I/O SmartCard1 DATA pin(SC1_UART_RXD) AD9 AI ADC analog input9 PD.2 I/O General purpose digital I/O pin UART1_RTSn UART1 Request to Send output pin 2 I2S_LRCLK I/O I S left right channel clock SPI2_MISO0 I/O SPI2 1 MISO (Master In, Slave Out) pin SC1_PWR O SmartCard1 Power pin AD10 AI ADC analog input10 PD.3 I/O General purpose digital I/O pin 102 UART1_CTSn st UART1 Clear to Send input pin 2 I2S_BCLK I/O I S bit clock pin SPI2_MOSI0 I/O SPI2 1 MOSI (Master Out, Slave In) pin SC1_RST O SmartCard1 RST pin AD11 AI ADC analog input11 103 104 NC I/O PD.4 I I2S_DI 105 SPI2_MISO1 Jun 17, 2014 I/O I SC1_CD 106 st General purpose digital I/O pin 2 I S data input SPI2 2 nd MISO (Master In, Slave Out) pin SmartCard1 card detect LCD_SEG35 AO LCD segment output 35 at LQFP10 PD.5 I/O General purpose digital I/O pin Page 66 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. LQFP 128-pin 107 108 110 111 LQFP 48-pin Pin Name Pin Type 2 I2S_DO O I S data output SPI2_MOSI1 I/O SPI2 2 LCD_SEG34 AO LCD segment output 34 at LQFP128 PC.7 I/O General purpose digital I/O pin DA1_OUT AO DAC 1 output EBI_AD5 I/O EBI Address/Data bus bit5 nd MOSI (Master Out, Slave In) pin 53 TC1 I Timer1 capture input PWM0_CH1 O PWM0 Channel1 output LCD_SEG17* AO LCD segment output 17 at LQFP64 PC.6 I/O General purpose digital I/O pin DA0_OUT I EBI_AD4 I/O DAC0 output EBI Address/Data bus bit4 54 TC0 I Timer0 capture input SC1_CD I SmartCard1 card detect pin PWM0_CH0 O PWM0 Channel0 output PC.15 I/O General purpose digital I/O pin EBI_AD3 I/O EBI Address/Data bus bit3 TC0 I Timer0 capture input PWM1_CH2 O PWM1 Channel2 output LCD_SEG16 AO LCD segment output 16 at LQFP64 LCD_SEG33 AO LCD segment output 33 at LQFP128 PC.14 I/O General purpose digital I/O pin EBI_AD2 I/O EBI Address/Data bus bit2 PWM1_CH3 I/O PWM1 Channel3 output LCD_SEG15 AO LCD segment output 15 at LQFP64 LCD_SEG32 AO LCD segment output 32 at LQFP128 PB.15 I/O General purpose digital I/O pin INT1 I External interrupt1 input pin SNOOPER I Snooper pin 55 56 57 LCD_SEG14 Jun 17, 2014 Description AO Page 67 of 106 LCD segment output 14 at LQFP64 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 109 LQFP 64-pin NuMicro Nano100 (B) Product Brief Pin No. LQFP 128-pin LQFP 64-pin LQFP 48-pin Pin Name Pin Type LCD_SEG31 AO NUMICRO™ NANO100 SERIES PRODUCT BRIEF 112 113 LCD segment output 31 at LQFP128 NC XT1_IN O External 4~24 MHz crystal output pin PF.3 I/O General purpose digital I/O pin 58 I XT1_OUT 114 Description External 4~24 MHz crystal input pin 59 I/O PF.2 115 General purpose digital I/O pin NC 116 60 nRESET I External reset input: Low active, set this pin low reset chip to initial state. With internal pull-up. 117 61 VSS P Ground VSS P Ground 118 119 120 NC 62 P VDD 121 NC PF.4 I/O General purpose digital I/O pin I2C0_SDA I/O I C0 data I/O pin PF.5 I/O General purpose digital I/O pin I2C0_SCL I/O I C0 clock pin 122 123 124 125 126 Power supply for I/O ports and LDO source for internal PLL and digital circuit 63 64 2 2 VSS P Ground PVSS P PLL Ground PB.8 I/O General purpose digital I/O pin STADC I ADC external trigger input. TM0 I Timer0 external counter input INT0 I External interrupt0 input pin SC2_PWR O SmartCard2 Power pin LCD_SEG13 AO LCD segment output 13 at LQFP64 LCD_SEG30 AO LCD segment output 30 at LQFP128 PE.15 I/O General purpose digital I/O pin LCD_SEG29 O LCD segment output 29 at LQFP128 127 Jun 17, 2014 Page 68 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. LQFP 128-pin LQFP 64-pin LQFP 48-pin Pin Name Pin Type Description PE.14 I/O General purpose digital I/O pin LCD_SEG28 O LCD segment output 28 at LQFP128 128 Note: 1. Pin Type: I = Digital Input, O=Digital Output; AI=Analog Input; AO= Analog Output; P=Power Pin; AP=Analog Power; 2. * : Output voltage for ADC/LCD shared pins cannot be higher than VDD because these pins are without 5V tolerance. NUMICRO™ NANO100 SERIES PRODUCT BRIEF Jun 17, 2014 Page 69 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief 3.4.3 NuMicro Nano120 Pin Description Pin No. LQFP NUMICRO™ NANO100 SERIES PRODUCT BRIEF 128 LQFP 64 LQFP 48 1 2 3 4 Pin Name Pin Type Description PE.13 I/O General purpose digital IO pin PB.14 I/O General purpose digital IO pin INT0 I External interrupt0 input pin SC2_CD I SmartCard2 card detect 1 nd SPI2_SS1 I/O SPI2 2 PB.13 I/O General purpose digital IO pin EBI_AD1 I/O EBI Address/Data bus bit1 PB.12 I/O General purpose digital IO pin EBI_AD0 I/O EBI Address/Data bus bit0 FCLKO O Frequency Divider output pin slave select pin 2 3 1 5 NC 6 4 2 X32O O External 32.768 kHz crystal output pin 7 5 3 X32I I External 32.768 kHz crystal input pin 8 9 10 11 Jun 17, 2014 NC 6 7 8 4 5 PA.11 I/O General purpose digital IO pin I2C1_SCL I/O I C 1 clock pin EBI_nRD O EBI read enable output pin SC0_RST O SmartCard0 RST pin SPI2_MOSI0 I/O SPI2 1 MOSI (Master Out, Slave In) pin PA.10 I/O General purpose digital IO pin I2C1_SDA I/O I C 1 data I/O pin EBI_nWR O EBI write enable output pin SC0_PWR O SmartCard0 Power pin SPI2_MISO0 I/O SPI2 1 MISO (Master In, Slave Out) pin PA.9 I/O General purpose digital IO pin I2C0_SCL I/O I C 0 clock pin SC0_DAT I/O SmartCard0 DATA pin(SC0_UART_RXD) SPI2_CLK I/O SPI2 serial clock pin 2 st 2 st 2 6 Page 70 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. LQFP 128 LQFP 64 LQFP 48 Pin Name Pin Type Description PA.8 I/O General purpose digital IO pin I2C0_SDA I/O I C 0 data I/O pin SC0_CLK O SmartCard0 clock pin(SC0_UART_TXD) SPI2_SS0 I/O SPI2 1 slave select pin 13 PD.8 I/O General purpose digital IO pin 14 PD.9 I/O General purpose digital IO pin 15 PD.10 I/O General purpose digital IO pin 16 PD.11 I/O General purpose digital IO pin 17 PD.12 I/O General purpose digital IO pin 18 PD.13 I/O General purpose digital IO pin PB.4 I/O General purpose digital IO pin UART1_RXD I UART1 Data receiver input pin SC0_CD I SmartCard0 card detect pin 12 19 21 22 10 11 st 8 st SPI2_SS0 I/O SPI2 1 slave select pin PB.5 I/O General purpose digital IO pin UART1_TXD O UART1 Data transmitter output pin SC0_RST O SmartCard0 RST pin SPI2_CLK I/O SPI2 serial clock pin PB.6 I/O General purpose digital IO pin UART1_nRTS O UART1 Request to Send output pin EBI_ALE O EBI address latch enable output pin SPI2_MISO0 I/O SPI2 1 MISO (Master In, Slave Out) pin PB.7 I/O General purpose digital IO pin UART1_nCTS I UART1 Clear to Send input pin EBI_nCS O EBI chip select enable output pin SPI2_MOSI0 I/O SPI2 1 MOSI (Master Out, Slave In) pin 9 12 st 13 23 24 2 7 st NC 14 10 LDO_CAP P LDO output pin 25 NC 26 NC Jun 17, 2014 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 20 9 Page 71 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. NUMICRO™ NANO100 SERIES PRODUCT BRIEF LQFP 128 LQFP 64 LQFP 48 27 15 11 Pin Name VDD Pin Type P 28 Description Power supply for I/O ports and LDO source NC VSS P Ground 30 VSS P Ground 31 VSS P Ground 32 VSS P Ground 33 PE.12 I/O General purpose digital IO pin 34 PE.11 I/O General purpose digital IO pin 35 PE.10 I/O General purpose digital IO pin 36 PE.9 I/O General purpose digital IO pin 37 PE.8 I/O General purpose digital IO pin 38 PE.7 I/O General purpose digital IO pin 29 16 12 39 NC USB POWER SUPPLY: From USB Host or HUB. 40 17 13 USB_VBUS 41 18 14 USB_VDD33_C Internal Power Regulator Output 3.3V Decoupling USB AP Pin 42 19 15 USB_D- USB USB Differential Signal D- 43 20 16 USB_D+ USB USB Differential Signal D+ I/O General purpose digital IO pin UART0_RXD I UART0 Data receiver input pin SPI1_MOSI0 I/O SPI1 1 MOSI (Master Out, Slave In) pin PB.1 I/O General purpose digital IO pin UART0_TXD O UART0 Data transmitter output pin SPI1_MISO0 I/O SPI1 1 MISO (Master In, Slave Out) pin PB.2 I/O General purpose digital IO pin UART0_nRTS O UART0 Request to Send output pin EBI_nWRL O EBI low byte write enable output pin SPI1_CLK I/O SPI1 serial clock pin PB.3 I/O General purpose digital IO pin I UART0 Clear to Send input pin PB.0 44 45 46 47 21 22 23 24 17 18 st 19 20 UART0_nCTS Jun 17, 2014 st Page 72 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. LQFP 128 LQFP 64 LQFP 48 Pin Name Pin Type Description EBI_nWRH O EBI high byte write enable output pin SPI1_SS0 I/O SPI1 1 slave select pin 48 PD.6 I/O General purpose digital IO pin 49 PD.7 I/O General purpose digital IO pin 50 PD.14 I/O General purpose digital IO pin 51 PD.15 I/O General purpose digital IO pin PC.5 I/O General purpose digital IO pin SPI0_MOSI1 I/O SPI0 2 PC.4 I/O General purpose digital IO pin SPI0_MISO1 I/O SPI0 2 PC.3 I/O General purpose digital IO pin SPI0_MOSI0 I/O SPI0 1 MOSI (Master Out, Slave In) pin I2S_DO O I S data output SC1_RST O SmartCard1 RST pin PC.2 I/O General purpose digital IO pin SPI0_MISO0 I/O SPI0 1 MISO (Master In, Slave Out) pin st 52 53 54 56 57 58 26 27 28 21 22 st 2 st 2 I I S data input SC1_PWR O SmartCard1 PWR pin PC.1 I/O General purpose digital IO pin SPI0_CLK I/O SPI0 serial clock pin I2S_BCLK I/O I S bit clock pin SC1_DAT I/O SmartCard1 DATA pin(SC1_UART_RXD) PC.0 / MCLKO I/O General purpose digital IO pin / Module clock output pin SPI0_SS0 I/O SPI0 1 slave select pin I2S_LRCLK I/O I S left right channel clock SC1_CLK O SmartCard1 clock pin(SC1_UART_TXD) PE.6 I/O General purpose digital IO pin 2 st 2 59 NC 60 NC Jun 17, 2014 MISO (Master In, Slave Out) pin I2S_DI 23 24 nd MOSI (Master Out, Slave In) pin Page 73 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 55 25 nd NuMicro Nano100 (B) Product Brief Pin No. NUMICRO™ NANO100 SERIES PRODUCT BRIEF LQFP 128 LQFP 64 61 29 62 63 64 30 31 32 LQFP 48 Pin Name Pin Type Description PE.5 I/O General purpose digital IO pin PWM1_CH1 I/O PWM1 Channel1 output PB.11 I/O General purpose digital IO pin PWM1_CH0 I/O PWM1 Channel0 output TM3 O Timer3 external counter input SC2_DAT I/O SmartCard2 DATA pin(SC2_UART_RXD) SPI0_MISO0 I/O SPI0 1 MISO (Master In, Slave Out) pin PB.10 I/O General purpose digital IO pin SPI0_SS1 I/O SPI0 2 TM2 O Timer2 external counter input SC2_CLK O SmartCard2 clock pin(SC2_UART_TXD) SPI0_MOSI0 I/O SPI0 1 MOSI (Master Out, Slave In) pin PB.9 I/O General purpose digital IO pin SPI1_SS1 I/O SPI1 2 TM1 O Timer1 external counter input SC2_RST O SmartCard2 RST pin INT0 I External interrupt0 input pin PE.4 I/O General purpose digital IO pin SPI0_MOSI0 I/O SPI0 1 MOSI (Master Out, Slave In) pin PE.3 I/O General purpose digital IO pin SPI0_MISO0 I/O SPI0 1 MISO (Master In, Slave Out) pin PE.2 I/O General purpose digital IO pin SPI0_CLK I/O SPI0 serial clock pin PE.1 I/O General purpose digital IO pin PWM1_CH3 I/O PWM1 Channel3 output SPI0_SS0 I/O SPI0 1 slave select pin PE.0 I/O General purpose digital IO pin PWM1_CH2 I/O PWM1 Channel2 output I2S_MCLK O I S master clock output pin PC.13 I/O General purpose digital IO pin st nd slave select pin st 65 nd slave select pin st 66 st 67 68 69 70 Jun 17, 2014 st 2 Page 74 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. LQFP 128 LQFP 64 LQFP 48 71 72 73 75 76 77 Jun 17, 2014 34 35 Pin Type Description nd SPI1_MOSI1 I/O SPI1 2 PWM1_CH1 O PWM1 Channel1 output SNOOPER I Snooper pin INT1 I External interrupt 1 input pin I2C0_SCL O I C 0 clock pin PC.12 I/O General purpose digital IO pin SPI1_MISO1 I/O SPI1 2 PWM1_CH0 O PWM1 Channel 0 output INT0 I External interrupt 0 input pin MOSI (Master Out, Slave In) pin 2 nd MISO (Master In, Slave Out) pin 2 I2C0_SDA I/O I C 0 data I/O pin PC.11 I/O General purpose digital IO pin SPI1_MOSI0 I/O SPI1 1 MOSI (Master Out, Slave In) pin UART1_TXD O UART1 Data transmitter output pin PC.10 I/O General purpose digital IO pin SPI1_MISO0 I/O SPI1 1 MISO (Master In, Slave Out) pin UART1_RXD I UART1 Data receiver input pin PC.9 I/O General purpose digital IO pin SPI1_CLK I/O SPI1 serial clock pin I2C1_SCL I/O I C 1 clock pin PC.8 I/O General purpose digital IO pin SPI1_SS0 I/O SPI1 1 slave select pin EBI_MCLK O EBI external clock output pin I2C1_SDA I/O I C 1 data I/O pin PA.15 I/O General purpose digital IO pin PWM0_CH3 I/O PWM0 Channel3 output I2S_MCLK O I S master clock output pin TC3 I Timer3 capture input SC0_PWR O SmartCard0 Power pin UART0_TXD O UART0 Data transmitter output pin PA.14 I/O General purpose digital IO pin st st NUMICRO™ NANO100 SERIES PRODUCT BRIEF 74 33 Pin Name 2 st 36 37 38 2 2 25 26 Page 75 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. LQFP NUMICRO™ NANO100 SERIES PRODUCT BRIEF 128 LQFP 64 78 39 LQFP 48 27 Pin Name 40 28 I/O PWM0 Channel2 output EBI_AD15 I/O EBI Address/Data bus bit15 TC2 I Timer 2 capture input UART0_RXD I UART0 Data receiver input pin PA.13 I/O General purpose digital IO pin PWM0_CH1 I/O PWM0 Channel1 output EBI_AD14 I/O EBI Address/Data bus bit14 81 41 42 29 I Timer1 capture input 2 I2C0_SCL I/O I C 0 clock pin PA.12 I/O General purpose digital IO pin PWM0_CH0 I/O PWM0 Channel0 output EBI_AD13 I/O EBI Address/Data bus bit13 TC0 80 Description PWM0_CH2 TC1 79 Pin Type I Timer 0 capture input 2 I2C0_SDA I/O I C 0 data I/O pin ICE_DAT I/O Serial Wired Debugger Data pin PF.0 I/O General purpose digital IO pin INT0 I External interrupt0 input pin ICE_CLK I Serial Wired Debugger Clock pin PF.1 I/O General purpose digital IO pin FCLKO O Frequency Divider output pin INT1 I External interrupt1 input pin 30 82 NC 83 VDD P 84 Power supply for I/O ports and LDO source for internal PLL and digital circuit NC 85 VSS P Ground 86 VSS P Ground 87 43 31 88 89 Jun 17, 2014 44 32 AVSS AP Ground Pin for analog circuit AVSS AP Ground Pin for analog circuit PA.0 I/O General purpose digital IO pin Page 76 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. LQFP 128 LQFP 64 LQFP 48 Pin Name AD0 SC2_CD 90 91 45 46 33 94 95 96 Jun 17, 2014 48 49 50 I ADC analog input0 SmartCard2 card detect I/O General purpose digital IO pin AD1 AI ADC analog input1 EBI_AD12 I/O EBI Address/Data bus bit12 PA.2 I/O General purpose digital IO pin AD2 AI ADC analog input2 EBI_AD11 I/O EBI Address/Data bus bit11 34 I UART1 Data receiver input pin PA.3 I/O General purpose digital IO pin AD3 AI ADC analog input3 EBI_AD10 I/O EBI Address/Data bus bit10 UART1_TXD O UART1 Data transmitter output pin PA.4 I/O Digital GPIO pin AD4 AI ADC analog input4 EBI_AD9 I/O EBI Address/Data bus bit9 SC2_PWR O SmartCard2 Power pin I2C0_SDA I/O I C 0 data I/O pin PA.5 I/O General purpose digital IO pin AD5 AI ADC analog input5 EBI_AD8 I/O EBI Address/Data bus bit8 SC2_RST O SmartCard2 RST pin I2C0_SCL I/O I C 0 clock pin PA.6 I/O General purpose digital IO pin AD6 AI ADC analog input6 EBI_AD7 I/O EBI Address/Data bus bit7 35 36 37 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 93 47 AI Description PA.1 UART1_RXD 92 Pin Type 2 2 38 TC3 I Timer3 capture input SC2_CLK O SmartCard2 clock pin(SC2_UART_TXD) PWM0_CH3 O PWM0 Channel3 output PA.7 I/O General purpose digital IO pin Page 77 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. LQFP NUMICRO™ NANO100 SERIES PRODUCT BRIEF 128 LQFP 64 LQFP 48 Pin Name 51 39 AI ADC analog input7 EBI_AD6 I/O EBI Address/Data bus bit6 I I/O SmartCard2 DATA pin(SC2_UART_RXD) PWM0_CH2 O PWM0 Channel2 output VREF AP 101 Voltage reference input for ADC NC 52 40 AVDD AP Power supply for internal analog circuit PD.0 I/O General purpose digital IO pin I UART1 Data receiver input pin UART1_RXD 100 Timer2 capture input SC2_DAT 98 99 Description AD7 TC2 97 Pin Type st SPI2_SS0 I/O SPI2 1 slave select pin SC1_CLK O SmartCard1 clock pin(SC1_UART_TXD) AD8 AI ADC analog input8 PD.1 I/O General purpose digital IO pin UART1_TXD O UART1 Data transmitter output pin SPI2_CLK I/O SPI2 serial clock pin SC1_DAT I/O SmartCard1 DATA pin(SC1_UART_RXD) AD9 AI ADC analog input9 PD.2 I/O General purpose digital IO pin UART1_nRTS O UART1 Request to Send output pin I2S_LRCLK I/O I S left right channel clock SPI2_MISO0 I/O SPI2 1 MISO (Master In, Slave Out) pin SC1_PWR O SmartCard1 Power pin AD10 AI ADC analog input10 PD.3 I/O General purpose digital IO pin I UART1 Clear to Send input pin 2 102 UART1_nCTS 2 I2S_BCLK I/O I S bit clock pin SPI2_MOSI0 I/O SPI2 1 MOSI (Master Out, Slave In) pin SC1_RST O SmartCard1 RST pin AD11 AI ADC analog input11 103 Jun 17, 2014 st st Page 78 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. LQFP 128 LQFP 64 LQFP 48 Pin Name Pin Type 104 Description NC PD.4 I2S_DI I/O I General purpose digital IO pin 2 I S data input 105 SPI2_MISO1 SC1_CD 106 107 54 41 I 111 Jun 17, 2014 MISO (Master In, Slave Out) pin SmartCard1 card detect I/O General purpose digital IO pin I2S_DO O I S data output SPI2_MOSI1 I/O SPI2 2 PC.7 I/O General purpose digital IO pin DA1_OUT AO DAC 1 output EBI_AD5 I/O EBI Address/Data bus bit5 2 nd MOSI (Master Out, Slave In) pin TC1 I Timer1 capture input PWM0_CH1 O PWM0 Channel1 output PC.6 I/O General purpose digital IO pin DA0_OUT I EBI_AD4 I/O DAC0 output EBI Address/Data bus bit4 42 I SC1_CD 110 nd PD.5 TC0 109 SPI2 2 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 108 53 I/O Timer 0 capture input SmartCard1 card detect pin PWM0_CH0 O PWM0 Channel0 output PC.15 I/O General purpose digital IO pin EBI_AD3 I/O EBI Address/Data bus bit3 55 56 57 TC0 I Timer0 capture input PWM1_CH2 O PWM1 Channel2 output PC.14 I/O General purpose digital IO pin EBI_AD2 I/O EBI Address/Data bus bit2 PWM1_CH3 I/O PWM1 Channel3 output PB.15 I/O General purpose digital IO pin INT1 I External interrupt1 input pin SNOOPER I Snooper pin SC1_CD I SmartCard1 card detect 43 Page 79 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. LQFP 128 LQFP 64 LQFP 48 Pin Name Pin Type NUMICRO™ NANO100 SERIES PRODUCT BRIEF 112 113 NC 58 XT1_IN O External 4~24 MHz crystal output pin PF.3 I/O General purpose digital I/O pin 44 XT1_OUT 114 59 I I/O 115 General purpose digital I/O pin NC 116 60 117 61 46 118 nRESET I External reset input: Low active, set this pin low reset chip to initial state. With internal pull-up. VSS P Ground VSS P Ground 119 NC 62 VDD P 121 Power supply for I/O ports and LDO source for internal PLL and digital circuit NC PF.4 I/O General purpose digital IO pin I2C0_SDA I/O I C 0 data I/O pin PF.5 I/O General purpose digital IO pin I2C0_SCL I/O I C 0 clock pin 122 123 124 125 External 4~24 MHz crystal input pin 45 PF.2 120 Description 63 47 2 2 VSS P Ground PVSS P PLL Ground PB.8 I/O General purpose digital IO pin STADC I ADC external trigger input. TM0 I Timer0 external counter input INT0 I External interrupt0 input pin SC2_PWR O SmartCard2 Power pin 127 PE.15 I/O General purpose digital IO pin 128 PE.14 I/O General purpose digital IO pin 126 64 48 Note: 1. Pin Type: I = Digital Input, O=Digital Output; AI=Analog Input; AO= Analog Output; P=Power Pin; AP=Analog Power; Jun 17, 2014 Page 80 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief 3.4.4 NuMicro Nano130 Pin Description Pin No. Pin Name LQFP LQFP LQFP 128-pin 64-pin 48-pin Pin Type Description PE.13 I/O General purpose digital I/O pin LCD_SEG27 O LCD segment output 27 at LQFP128 PB.14 I/O General purpose digital I/O pin INT0 I External interrupt0 input pin SC2_CD I SmartCard2 card detect 1 2 3 nd SPI2_SS1 I/O SPI2 2 LCD_SEG12 O LCD segment output 12 at LQFP64 LCD_SEG26 O LCD segment output 26 at LQFP128 PB.13 I/O General purpose digital I/O pin EBI_AD1 I/O EBI Address/Data bus bit1 LCD_SEG11 O LCD segment output 11 at LQFP64 LCD_SEG25 O LCD segment output 25 at LQFP128 PB.12 I/O General purpose digital I/O pin EBI_AD0 I/O EBI Address/Data bus bit0 FCLKO O Frequency Divider output pin LCD_SEG10 O LCD segment output 10 at LQFP64 LCD_SEG24 O LCD segment output 24 at LQFP128 slave select pin 2 3 5 NC 6 4 X32O O External 32.768 kHz crystal output pin 7 5 X32I I External 32.768 kHz crystal input pin 8 9 10 Jun 17, 2014 NC 6 7 PA.11 I/O General purpose digital I/O pin I2C1_SCL I/O I C1 clock pin EBI_nRD O EBI read enable output pin SC0_RST O SmartCard0 RST pin SPI2_MOSI0 I/O SPI2 1 MOSI (Master Out, Slave In) pin LCD_SEG9 O LCD segment output 9 at LQFP64 LCD_SEG23 O LCD segment output 23 at LQFP128 PA.10 I/O General purpose digital I/O pin 2 st Page 81 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 4 1 NuMicro Nano100 (B) Product Brief Pin No. NUMICRO™ NANO100 SERIES PRODUCT BRIEF LQFP LQFP LQFP 128-pin 64-pin 48-pin 11 12 Pin Name Pin Type Description 2 I2C1_SDA I/O I C1 data I/O pin EBI_nWR O EBI write enable output pin SC0_PWR O SmartCard0 Power pin SPI2_MISO0 I/O SPI2 1 MISO (Master In, Slave Out) pin LCD_SEG8 O LCD segment output 8 at LQFP64 LCD_SEG22 O LCD segment output 22 at LQFP128 PA.9 I/O General purpose digital I/O pin I2C0_SCL I/O I C0 clock pin SC0_DAT I/O SmartCard0 DATA pin(SC0_UART_RXD) SPI2_CLK I/O SPI2 serial clock pin LCD_SEG7 O LCD segment output 7 at LQFP64 LCD_SEG21 O LCD segment output 21 at LQFP128 PA.8 I/O General purpose digital I/O pin I2C0_SDA I/O I C0 data I/O pin SC0_CLK O SmartCard0 clock pin(SC0_UART_TXD) SPI2_SS0 I/O SPI2 1 slave select pin LCD_SEG6 O LCD segment output 6 at LQFP64 LCD_SEG20 O LCD segment output 20 at LQFP128 PD.8 I/O General purpose digital I/O pin LCD_SEG19 O LCD segment output 19 at LQFP128 PD.9 I/O General purpose digital I/O pin LCD_SEG18 O LCD segment output 18 at LQFP128 PD.10 I/O General purpose digital I/O pin LCD_SEG17 O LCD segment output 17 at LQFP128 PD.11 I/O General purpose digital I/O pin LCD_SEG16 O LCD segment output 16 at LQFP128 PD.12 I/O General purpose digital I/O pin LCD_SEG15 O LCD segment output 15 at LQFP128 PD.13 I/O General purpose digital I/O pin LCD_SEG14 O LCD segment output 14 at LQFP128 st 2 8 2 9 st 13 14 15 16 17 18 Jun 17, 2014 Page 82 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. LQFP LQFP LQFP 128-pin 64-pin 48-pin Pin Name 20 21 General purpose digital I/O pin UART1_RXD I UART1 Data receiver input pin SC0_CD I SmartCard0 card detect pin 10 I/O SPI2 1 slave select pin LCD_SEG5 O LCD segment output 5 at LQFP64 LCD_SEG13 O LCD segment output 13 at LQFP128 PB.5 I/O General purpose digital I/O pin UART1_TXD O UART1 Data transmitter output pin SC0_RST O SmartCard0 RST pin SPI2_CLK I/O SPI2 serial clock pin LCD_SEG4 O LCD segment output 4 at LQFP64 LCD_SEG12 O LCD segment output 12 at LQFP128 PB.6 I/O General purpose digital I/O pin UART1_RTSn O UART1 Request to Send output pin EBI_ALE O EBI address latch enable output pin SPI2_MISO0 I/O SPI2 1 MISO (Master In, Slave Out) pin LCD_SEG3 O LCD segment output 3 at LQFP64 LCD_SEG11 O LCD segment output 11 at LQFP128 PB.7 I/O General purpose digital I/O pin UART1_CTSn I UART1 Clear to Send input pin EBI_nCS O EBI chip select enable output pin SPI2_MOSI0 I/O SPI2 1 MOSI (Master Out, Slave In) pin LCD_SEG2 O LCD segment output 2 at LQFP64 LCD_SEG10 O LCD segment output 10 at LQFP128 11 12 st 13 23 24 st SPI2_SS0 st NC 14 LDO_CAP P LDO output pin 25 NC 26 NC 27 28 Jun 17, 2014 15 VDD P Power supply for I/O ports and LDO source NC Page 83 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 22 Description I/O PB.4 19 Pin Type NuMicro Nano100 (B) Product Brief Pin No. Description VSS P Ground 30 VSS P Ground 31 VSS P Ground 32 VSS P Ground 33 PE.12 I/O General purpose digital I/O pin 34 PE.11 I/O General purpose digital I/O pin 35 PE.10 I/O General purpose digital I/O pin 36 PE.9 I/O General purpose digital I/O pin PE.8 I/O General purpose digital I/O pin LCD_SEG9 O LCD segment output 9 at LQFP128 PE.7 I/O General purpose digital I/O pin LCD_SEG8 O LCD segment output 8 at LQFP128 29 NUMICRO™ NANO100 SERIES PRODUCT BRIEF Pin Type Pin Name LQFP LQFP LQFP 128-pin 64-pin 48-pin 16 37 38 39 NC 40 17 USB_VBUS USB POWER SUPPLY: From USB Host or HUB. 41 18 USB_VDD33_CAP USB Internal Power Regulator Output 3.3V Decoupling Pin 42 19 USB_D- USB USB Differential Signal D- 43 20 USB_D+ USB USB Differential Signal D+ I/O General purpose digital I/O pin UART0_RXD I UART0 Data receiver input pin SPI1_MOSI0 I/O SPI1 1 MOSI (Master Out, Slave In) pin LCD_SEG1 O LCD segment LCD_COM5) LCD_SEG7 O LCD segment output 7 at LQFP128 PB.1 I/O General purpose digital I/O pin UART0_TXD O UART0 Data transmitter output pin SPI1_MISO0 I/O SPI1 1 MISO (Master In, Slave Out) pin LCD_SEG0 O LCD segment LCD_COM4) LCD_SEG6 O LCD segment output 6 at LQFP128 PB.2 I/O General purpose digital I/O pin UART0_RTSn O UART0 Request to Send output pin PB.0 44 45 46 Jun 17, 2014 21 22 st output 1 at LQFP64 (or as (or as st output 0 at LQFP64 23 Page 84 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. LQFP LQFP LQFP 128-pin 64-pin 48-pin 47 Pin Name Pin Type Description EBI_nWRL O EBI low byte write enable output pin SPI1_CLK I/O SPI1 serial clock pin LCD_COM3 O LCD common output 3 at LQFP64 LCD_SEG5 O LCD segment output 5 at LQFP128 PB.3 I/O General purpose digital I/O pin UART0_CTSn I UART0 Clear to Send input pin EBI_nWRH O EBI high byte write enable output pin SPI1_SS0 I/O SPI1 1 slave select pin LCD_COM2 O LCD common output 2 at LQFP64 LCD_SEG4 O LCD segment output 4 at LQFP128 PD.6 I/O General purpose digital I/O pin LCD_SEG3 O LCD segment output 3 at LQFP128 PD.7 I/O General purpose digital I/O pin LCD_SEG2 O LCD segment output 2 at LQFP128 PD.14 I/O General purpose digital I/O pin LCD_SEG1 O LCD segment LCD_COM5) PD.15 I/O General purpose digital I/O pin LCD_SEG0 O LCD segment LCD_COM4) PC.5 I/O General purpose digital I/O pin SPI0_MOSI1 I/O SPI0 2 LCD_COM3 O LCD common output 3 at LQFP128 PC.4 I/O General purpose digital I/O pin SPI0_MISO1 I/O SPI0 2 LCD_COM2 O LCD common output 2 at LQFP128 PC.3 I/O General purpose digital I/O pin SPI0_MOSI0 I/O SPI0 1 MOSI (Master Out, Slave In) pin I2S_DO O I S data output SC1_RST O SmartCard1 RST pin LCD_COM1 O LCD common output 1 at LQFP64 24 st 48 49 50 52 53 54 Jun 17, 2014 25 nd nd output 1 0 at at LQFP128 (or as LQFP128 (or as MOSI (Master Out, Slave In) pin MISO (Master In, Slave Out) pin st 2 Page 85 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 51 output NuMicro Nano100 (B) Product Brief Pin No. Pin Name NUMICRO™ NANO100 SERIES PRODUCT BRIEF LQFP LQFP LQFP 128-pin 64-pin 48-pin 55 56 57 LCD_COM1 O LCD common output 1 at LQFP128 PC.2 I/O General purpose digital I/O pin SPI0_MISO0 I/O SPI0 1 MISO (Master In, Slave Out) pin 27 28 29 2 I I S data input SC1_PWR O SmartCard1 PWR pin LCD_COM0 O LCD common output 0 at LQFP64 LCD_COM0 O LCD common output 0 at LQFP128 PC.1 I/O General purpose digital I/O pin SPI0_CLK I/O SPI0 serial clock pin I2S_BCLK I/O I S bit clock pin SC1_DAT I/O SmartCard1 DATA pin(SC1_UART_RXD) LCD_DH2 O LCD externl capacitor pin of charge pump circuit at LQFP64 LCD_DH2 O LCD externl capacitor pin of charge pump circuit at LQFP128 PC.0 / MCLKO I/O General purpose digital I/O pin / Module clock output pin SPI0_SS0 I/O SPI0 1 slave select pin I2S_LRCLK I/O I S left right channel clock SC1_CLK O SmartCard1 clock pin(SC1_UART_TXD) LCD_DH1 O LCD externl capacitor pin of charge pump circuit at LQFP64 LCD_DH1 O LCD externl capacitor pin of charge pump circuit at LQFP128 PE.6 I/O General purpose digital I/O pin LCD_VLCD AO LCD power supply pin 2 st 2 NC 61 Jun 17, 2014 st I2S_DI 60 62 Description 26 58 59 Pin Type PE.5 General purpose digital I/O pin PB.11 I/O General purpose digital I/O pin PWM1_CH0 I/O PWM1 Channel0 output TM3 O Timer3 external counter input SC2_DAT I/O SmartCard2 DATA pin(SC2_UART_RXD) 30 Page 86 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. Pin Name LQFP LQFP LQFP 128-pin 64-pin 48-pin 63 64 31 32 Pin Type Description st SPI0_MISO0 I/O SPI0 1 MISO (Master In, Slave Out) pin LCD_V1 O LCD Unit voltage for LCD charge pump circuit at LQFP64 LCD_V1 O LCD Unit voltage for LCD charge pump circuit at LQFP128 PB.10 I/O General purpose digital I/O pin SPI0_SS1 I/O SPI0 2 TM2 O Timer2 external counter input SC2_CLK O SmartCard2 clock pin(SC2_UART_TXD) SPI0_MOSI0 I/O SPI0 1 MOSI (Master Out, Slave In) pin LCD_V2 O LCD driver biasing voltage at LQFP64 LCD_V2 O LCD driver biasing voltage at LQFP128 PB.9 I/O General purpose digital I/O pin SPI1_SS1 I/O SPI1 2 TM1 O Timer1 external counter input SC2_RST O SmartCard2 RST pin INT0 I External interrupt0 input pin LCD_V3 O LCD driver biasing voltage at LQFP64 LCD_V3 O LCD driver biasing voltage at LQFP128 PE.4 I/O General purpose digital I/O pin SPI0_MOSI0 I/O SPI0 1 MOSI (Master Out, Slave In) pin PE.3 I/O General purpose digital I/O pin SPI0_MISO0 I/O SPI0 1 MISO (Master In, Slave Out) pin PE.2 I/O General purpose digital I/O pin SPI0_CLK I/O SPI0 serial clock pin PE.1 I/O General purpose digital I/O pin PWM1_CH3 I/O PWM1 Channel3 output SPI0_SS0 I/O SPI0 1 slave select pin PE.0 I/O General purpose digital I/O pin PWM1_CH2 I/O PWM1 Channel2 output I2S_MCLK O I S master clock output pin nd slave select pin st slave select pin st 66 st 67 68 69 Jun 17, 2014 st 2 Page 87 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 65 nd NuMicro Nano100 (B) Product Brief Pin No. NUMICRO™ NANO100 SERIES PRODUCT BRIEF LQFP LQFP LQFP 128-pin 64-pin 48-pin Pin Name Pin Type Description PC.13 I/O General purpose digital I/O pin SPI1_MOSI1 I/O SPI1 2 PWM1_CH1 O PWM1 Channel1 output SNOOPER I Snooper pin INT1 I External interrupt 1 input pin I2C0_SCL O I C0 clock pin PC.12 I/O General purpose digital I/O pin SPI1_MISO1 I/O SPI1 2 PWM1_CH0 O PWM1 Channel0 output INT0 I External interrupt0 input pin nd MOSI (Master Out, Slave In) pin 70 71 72 73 74 75 76 Jun 17, 2014 2 nd MISO (Master In, Slave Out) pin 2 I2C0_SDA I/O I C0 data I/O pin PC.11 I/O General purpose digital I/O pin SPI1_MOSI0 I/O SPI1 1 MOSI (Master Out, Slave In) pin UART1_TXD O UART1 Data transmitter output pin LCD_SEG31 O LCD segment output 31 at LQFP64 PC.10 I/O General purpose digital I/O pin SPI1_MISO0 I/O SPI1 1 MISO (Master In, Slave Out) pin UART1_RXD I UART1 Data receiver input pin LCD_SEG30 O LCD segment output 30 at LQFP64 PC.9 I/O General purpose digital I/O pin SPI1_CLK I/O SPI1 serial clock pin I2C1_SCL I/O I C1 clock pin LCD_SEG29 O LCD segment output 29 at LQFP64 PC.8 I/O General purpose digital I/O pin SPI1_SS0 I/O SPI1 1 slave select pin EBI_MCLK O EBI external clock output pin I2C1_SDA I/O I C1 data I/O pin LCD_SEG28 O LCD segment output 28 at LQFP64 PA.15 I/O General purpose digital I/O pin PWM0_CH3 I/O PWM0 Channel3 output st 33 st 34 35 36 2 st 2 37 Page 88 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. Pin Name LQFP LQFP LQFP 128-pin 64-pin 48-pin 77 78 I S master clock output pin TC3 I Timer3 capture input SC0_PWR O SmartCard0 Power pin UART0_TXD O UART0 Data transmitter output pin LCD_SEG27 O LCD segment output 27 at LQFP64 PA.14 I/O General purpose digital I/O pin PWM0_CH2 I/O PWM0 Channel2 output EBI_AD15 I/O EBI Address/Data bus bit15 38 TC2 I Timer2 capture input UART0_RXD I UART0 Data receiver input pin LCD_SEG26 O LCD segment output 26 at LQFP64 PA.13 I/O General purpose digital I/O pin PWM0_CH1 I/O PWM0 Channel1 output EBI_AD14 I/O EBI Address/Data bus bit14 39 Jun 17, 2014 I Timer1 capture input 2 I2C0_SCL I/O I C0 clock pin LCD_SEG25 O LCD segment output 25 at LQFP64 PA.12 I/O General purpose digital I/O pin PWM0_CH0 I/O PWM0 Channel0 output EBI_AD13 I/O EBI Address/Data bus bit13 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 81 2 O 40 TC0 80 Description I2S_MCLK TC1 79 Pin Type 41 I Timer0 capture input 2 I2C0_SDA I/O I C0 data I/O pin LCD_SEG24 O LCD segment output 24 at LQFP64 ICE_DAT I/O Serial Wired Debugger Data pin PF.0 I/O General purpose digital I/O pin INT0 I External interrupt0 input pin ICE_CLK I Serial Wired Debugger Clock pin PF.1 I/O General purpose digital I/O pin FCLKO O Frequency Divider output pin INT1 I External interrupt1 input pin 42 Page 89 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. Pin Name LQFP LQFP LQFP 128-pin 64-pin 48-pin Pin Type NUMICRO™ NANO100 SERIES PRODUCT BRIEF 82 Description NC 83 VDD P 84 Power supply for I/O ports and LDO source for internal PLL and digital circuit NC 85 VSS P Ground 86 VSS P Ground 87 43 88 89 44 AVSS AP Ground Pin for analog circuit AVSS AP Ground Pin for analog circuit PA.0 I/O General purpose digital I/O pin AD0 AI ADC analog input0 SC2_CD 90 91 92 93 Jun 17, 2014 45 46 47 I SmartCard2 card detect PA.1 I/O General purpose digital I/O pin AD1 AI ADC analog input1 EBI_AD12 I/O EBI Address/Data bus bit12 PA.2 I/O General purpose digital I/O pin AD2 AI ADC analog input2 EBI_AD11 I/O EBI Address/Data bus bit11 UART1_RXD I LCD_SEG23* AO LCD segment output 23 at LQFP64 PA.3 I/O General purpose digital I/O pin AD3 AI ADC analog input3 EBI_AD10 I/O EBI Address/Data bus bit10 UART1_TXD O UART1 Data transmitter output pin LCD_SEG22* AO LCD segment output 22 at LQFP64 PA.4 I/O General purpose digital I/O pin AD4 AI ADC analog input4 EBI_AD9 I/O EBI Address/Data bus bit9 SC2_PWR O SmartCard2 Power pin I2C0_SDA I/O I C0 data I/O pin LCD_SEG21* AO LCD segment output 21 at LQFP64 UART1 Data receiver input pin 48 2 Page 90 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. Pin Name LQFP LQFP LQFP 128-pin 64-pin 48-pin 94 95 49 LCD_SEG39* AO LCD segment output 39 at LQFP128 PA.5 I/O General purpose digital I/O pin AD5 AI ADC analog input5 EBI_AD8 I/O EBI Address/Data bus bit8 SC2_RST O SmartCard2 RST pin I2C0_SCL I/O I C0 clock pin LCD_SEG20* AO LCD segment output 20 at LQFP64 LCD_SEG38* AO LCD segment output 38 at LQFP128 PA.6 I/O General purpose digital I/O pin AD6 AI ADC analog input6 EBI_AD7 I/O EBI Address/Data bus bit7 2 TC3 I Timer3 capture input SC2_CLK O SmartCard2 clock pin(SC2_UART_TXD) PWM0_CH3 O PWM0 Channel3 output AO LCD segment output 19 at LQFP64 LCD_SEG37* AO LCD segment output 37 at LQFP128 PA.7 I/O General purpose digital I/O pin AD7 AI ADC analog input7 EBI_AD6 I/O EBI Address/Data bus bit6 TC2 51 I Timer2 capture input SC2_DAT I/O SmartCard2 DATA pin(SC2_UART_RXD) PWM0_CH2 O PWM0 Channel2 output LCD_SEG36* AO LCD segment output 36 output at LQFP128 VREF AP Voltage reference input for ADC NC 52 AVDD AP Power supply for internal analog circuit PD.0 I/O General purpose digital I/O pin I UART1 Data receiver input pin UART1_RXD 100 Jun 17, 2014 st SPI2_SS0 I/O SPI2 1 slave select pin SC1_CLK O SmartCard1 clock pin(SC1_UART_TXD) Page 91 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF LCD_SEG19* 98 99 Description 50 96 97 Pin Type NuMicro Nano100 (B) Product Brief Pin No. Pin Name NUMICRO™ NANO100 SERIES PRODUCT BRIEF LQFP LQFP LQFP 128-pin 64-pin 48-pin 101 Pin Type Description AD8 AI ADC analog input8 PD.1 I/O General purpose digital I/O pin TX1 O UART1 Data transmitter output pin SPI2_CLK I/O SPI2 serial clock pin SC1_DAT I/O SmartCard1 DATA pin(SC1_UART_RXD) AD9 AI ADC analog input9 PD.2 I/O General purpose digital I/O pin UART1_RTSn O UART1 Request to Send output pin I2S_LRCLK I/O I S left right channel clock SPI2_MISO0 I/O SPI2 1 MISO (Master In, Slave Out) pin SC1_PWR O SmartCard1 Power pin AD10 AI ADC analog input10 PD.3 I/O General purpose digital I/O pin I UART1 Clear to Send input pin 2 102 UART1_CTSn st 2 I2S_BCLK I/O I S bit clock pin SPI2_MOSI0 I/O SPI2 1 MOSI (Master Out, Slave In) pin SC1_RST O SmartCard1 RST pin AD11 AI ADC analog input11 103 104 st NC PD.4 I2S_DI 105 SPI2_MISO1 SC1_CD I/O I I/O I General purpose digital I/O pin 2 I S data input SPI2 2 Jun 17, 2014 MISO (Master In, Slave Out) pin SmartCard1 card detect LCD_SEG35 AO LCD segment output 35 at LQFP128 PD.5 I/O General purpose digital I/O pin I2S_DO O I S data output SPI2_MOSI1 I/O SPI2 2 LCD_SEG34 AO LCD segment output 34 at LQFP128 PC.7 I/O General purpose digital I/O pin DA1_OUT AO DAC 1 output 2 106 107 nd nd MOSI (Master Out, Slave In) pin 53 Page 92 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. Pin Name LQFP LQFP LQFP 128-pin 64-pin 48-pin EBI_AD5 108 Pin Type I/O I Timer1 capture input PWM0_CH1 O PWM0 Channel1 output LCD_SEG17* AO LCD segment output 17 at LQFP64 PC.6 I/O General purpose digital I/O pin DA0_OUT I EBI_AD4 I/O I Jun 17, 2014 Timer0 capture input SmartCard1 card detect pin PWM0_CH0 O PWM0 Channel0 output PC.15 I/O General purpose digital I/O pin EBI_AD3 I/O EBI Address/Data bus bit3 TC0 I Timer0 capture input PWM1_CH2 O PWM1 Channel2 output LCD_SEG16 AO LCD segment output 16 at LQFP64 LCD_SEG33 AO LCD segment output 33 at LQFP128 PC.14 I/O General purpose digital I/O pin EBI_AD2 I/O EBI Address/Data bus bit2 PWM1_CH3 I/O PWM1 Channel3 output LCD_SEG15 AO LCD segment output 15 at LQFP64 LCD_SEG32 AO LCD segment output 32 at LQFP128 PB.15 I/O General purpose digital I/O pin INT1 I External interrupt1 input pin SNOOPER I Snooper pin SC1_CD I SmartCard1 card detect 55 56 57 LCD_SEG14 AO LCD segment output 14 at LQFP64 LCD_SEG31 AO LCD segment output 31 at LQFP128 112 113 EBI Address/Data bus bit4 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 111 DAC0 output 54 SC1_CD 110 EBI Address/Data bus bit5 TC1 TC0 109 Description NC XT1_IN O External 4~24 MHz crystal output pin PF.3 I/O General purpose digital I/O pin 58 Page 93 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief Pin No. Pin Name LQFP LQFP LQFP 128-pin 64-pin 48-pin XT1_OUT 114 I Description External 4~24 MHz crystal input pin 59 PF.2 NUMICRO™ NANO100 SERIES PRODUCT BRIEF Pin Type I/O 115 General purpose digital I/O pin NC 116 60 nRESET I External reset input: Low active, set this pin low reset chip to initial state. With internal pull-up. 117 61 VSS P Ground VSS P Ground 118 119 120 NC 62 VDD P 121 NC PF.4 I/O General purpose digital I/O pin I2C0_SDA I/O I C0 data I/O pin PF.5 I/O Digital GPI/O pin I2C0_SCL I/O I C0 clock pin 122 123 124 125 126 Power supply for I/O ports and LDO source for internal PLL and digital circuit VSS 63 64 P 2 2 Ground PVSS I/O PLL Ground PB.8 I/O General purpose digital I/O pin STADC I ADC external trigger input. TM0 I Timer0 external counter input INT0 I External interrupt0 input pin SC2_PWR O SmartCard2 Power pin LCD_SEG13 AO LCD segment output 13 at LQFP64 LCD_SEG30 AO LCD segment output 30 at LQFP128 PE.15 I/O General purpose digital I/O pin LCD_SEG29 O LCD segment output 29 at LQFP128 PE.14 I/O General purpose digital I/O pin LCD_SEG28 O LCD segment output 28 at LQFP128 127 128 Note: 1. Pin Type: I=Digital Input, O=Digital Output; AI=Analog Input; AO=Analog Output; P=Power Pin; AP=Analog Power 2. * : Output voltage for ADC/LCD shared pins cannot be higher than VDD because these pins are without 5V tolerance. BLOCK DIAGRAM Jun 17, 2014 Page 94 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief 3.5 Nano100 Block Diagram EBI FLASH 123/64/ 32 KB LXT Cortex-M0 42 MHz DMA CLK_CTL P L L LIRC HXT HIRC 1.8V LDO (input: 1.8 ~ 3.6V) POR (1.8V) ISP 4KB SRAM 16/8 KB I2C 1 I2C 0 PWM 1 PWM 0 Timer 2/3 Timer 0/1 UART 1 UART 0 SPI 1 SPI 0 I2S SPI 2 SC 0/UART3 RTC SC 1/UART4 WDT BOD (1.7/2.0/2.5 V) GPIO A,B,C,D,E,F 12-b DAC 1.8/2.5V REF TEMP Sensor TM Figure 4‑12 NuMicro Peripherals with wake-up Nano100 Block Diagram Page 95 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF Peripherals with PDMA SC 2/UART5 NOTE: BOD can wake up system. External interrupts, included in GPIO, can wake up system, too. Jun 17, 2014 12-b ADC NuMicro Nano100 (B) Product Brief 3.6 Nano110 Block Diagram NUMICRO™ NANO100 SERIES PRODUCT BRIEF EBI FLASH 123/64/ 32 KB LXT Cortex-M0 42 MHz DMA CLK_CTL P L L LIRC HXT HIRC 1.8V LDO (input: 1.8 ~ 3.6V) POR (1.8V) BOD (1.7/2.0/2.5 V) ISP 4KB SRAM 16/8 KB I2C 1 I2C 0 PWM 1 PWM 0 Timer 2/3 Timer 0/1 UART 1 UART 0 SPI 1 SPI 0 I2S SPI 2 SC 0/UART3 RTC SC 1/UART4 WDT GPIO A,B,C,D,E,F 12-b ADC 12-b DAC 1.8/2.5V REF TEMP Sensor LCD Booster LCD Peripherals with PDMA SC 2/UART5 NOTE: BOD can wake up system. External interrupts, included in GPIO, can wake up system, too. TM Figure 4‑13 NuMicro Jun 17, 2014 LCD COM/SEG Up to 4x40/6x38 Peripherals with wake-up Nano110 Block Diagram Page 96 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief 3.7 Nano120 Block Diagram EBI FLASH 123/64/ 32 KB LXT Cortex-M0 42 MHz DMA CLK_CTL P L L LIRC HXT HIRC 1.8V LDO (input: 1.8 ~ 3.6V) POR (1.8V) BOD (1.7/2.0/2.5 V) ISP 4KB SRAM 16/8 KB I2C 1 I2C 0 PWM 1 PWM 0 Timer 2/3 Timer 0/1 UART 1 UART 0 SPI 1 SPI 0 I2S SPI 2 SC 0/UART3 RTC SC 1/UART4 WDT GPIO A,B,C,D,E,F 12-b ADC 12-b DAC 1.8/2.5V REF TEMP Sensor USB -512B TM Figure 4‑14 NuMicro Peripherals with wake-up Nano120 Block Diagram Page 97 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF Peripherals with PDMA SC 2/UART5 NOTE: BOD can wake up system. External interrupts, included in GPIO, can wake up system, too. Jun 17, 2014 USB PHY NuMicro Nano100 (B) Product Brief 3.8 Nano130 Block Diagram NUMICRO™ NANO100 SERIES PRODUCT BRIEF EBI FLASH 123/64/ 32 KB LXT Cortex-M0 42 MHz DMA CLK_CTL P L L LIRC HXT HIRC 1.8V LDO (input: 1.8 ~ 3.6V) POR (1.8V) BOD (1.7/2.0/2.5 V) GPIO A,B,C,D,E,F ISP 4KB SRAM 16/8 KB I2C 1 I2C 0 PWM 1 PWM 0 Timer 2/3 Timer 0/1 UART 1 UART 0 SPI 1 SPI 0 I2S SPI 2 LCD SC 0/UART3 RTC USB -512B SC 1/UART4 WDT 12-b ADC 12-b DAC 1.8/2.5V REF TEMP Sensor LCD Booster USB PHY Peripherals with PDMA SC 2/UART5 NOTE: BOD can wake up system. External interrupts, included in GPIO, can wake up system, too. TM Figure 4‑15 NuMicro Jun 17, 2014 LCD COM/SEG Up to 4x40/6x38 Peripherals with wake up Nano130 Block Diagram Page 98 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief 4 4.1 PACKAGE DIMENSIONS LQFP128 (14x14x1.4 mm footprint 2.0 mm) NUMICRO™ NANO100 SERIES PRODUCT BRIEF Jun 17, 2014 Page 99 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief LQFP64 (10x10x1.4 mm footprint 2.0 mm) NUMICRO™ NANO100 SERIES PRODUCT BRIEF 4.2 Jun 17, 2014 Page 100 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief 4.3 LQFP64 (7x7x1.4 mm footprint 2.0 mm) NUMICRO™ NANO100 SERIES PRODUCT BRIEF Jun 17, 2014 Page 101 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF NuMicro Nano100 (B) Product Brief Jun 17, 2014 Page 102 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief 4.4 LQFP48 (7x7x1.4 mm footprint 2.0 mm) NUMICRO™ NANO100 SERIES PRODUCT BRIEF Jun 17, 2014 Page 103 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief QFN48 (7x7x0.85 mm) NUMICRO™ NANO100 SERIES PRODUCT BRIEF 4.5 Jun 17, 2014 Page 104 of 106 Revision 1.08 NuMicro Nano100 (B) Product Brief 5 REVISION HISTORY Date 2012.10.11 Revision Description 1.00 Initial release 1. Added SmartCard UART mode description in Pin Description. 2. Unified the abbreviation (TMR) in the Timer Controller section. 3. Modified the specifications of external input clock. 2012.12.11 1.01 4. Added LCD COM4 and COM5 description for each pin description and diagram. 5. Updated the ADC enabled by timer event description in the ADC section. 6. Changed Timer0/1 Ch0/1 to Timer x (x=0, 1, 2, 3) in the Timer Controller section. 2013.03.05 1.05 1. Corrected the pin descriptions in section 3.4. 1. Updated the Nano110 LQFP128-pin diagram in section 3.3.2. 2013.05.28 1.06 2. Updated “12 MHz OSC has 2 % deviation within all temperarure range” in sections 2.1 to 2.4. 3. Added Nano110RC2BN to the Nano110 LCD Line Selection Guide. 1. Updated Nano100 series selection code in section 3.1. 2. Added the Nano100 QFN48 package in section 3.2. 1.07 2014.06.17 1.08 Jun 17, 2014 3. Added a note that “Output voltage for ADC/LCD shared pins cannot be higher than VDD because these pins are without 5V tolerance.” for pin description in section 3.4. 1. Modified the pin description in section 3.4. Page 105 of 106 Revision 1.08 NUMICRO™ NANO100 SERIES PRODUCT BRIEF 2013.12.04 NUMICRO™ NANO100 SERIES PRODUCT BRIEF NuMicro Nano100 (B) Product Brief Important Notice Nuvoton Products are neither intended nor warranted for usage in systems or equipment, any malfunction or failure of which may cause loss of human life, bodily injury or severe property damage. Such applications are deemed, “Insecure Usage”. Insecure usage includes, but is not limited to: equipment for surgical implementation, atomic energy control instruments, airplane or spaceship instruments, the control or operation of dynamic, brake or safety systems designed for vehicular use, traffic signal instruments, all types of safety devices, and other applications intended to support or sustain life. All Insecure Usage shall be made at customer’s risk, and in the event that third parties lay claims to Nuvoton as a result of customer’s Insecure Usage, customer shall indemnify the damages and liabilities thus incurred by Nuvoton. Jun 17, 2014 Page 106 of 106 Revision 1.08