AS3701B-BWLM-02

AS3701 Micro-PMIC General Description The AS3701 is a small compact PMU for small size and low power applications. AS3701 features one 500mA DCDC buck converter operating from 1MHz up to 4MHz, two 200mA LDOs, two 40mA current sinks and offers additional GPIO functions. Further, the device contains an integrated linear battery charger with constant current and constant voltage operation. The wide charging current range going from 11mA up to 500mA and the integrated battery temperature monitoring with selectable NTC beta values make this device suitable for a great variety of applications. The single supply voltage may vary from 2.7V to 5.5V and all functionalities of AS3701 can be controlled via the I²C interface. Ordering Information and Content Guide appear at end of datasheet. Key Benefits & Features The benefits and features of AS3701, Micro-PMIC are listed below: Figure 1: Added Value of Using AS3701 Benefits Features • Multiple rails in a compact design for low power applications • • • • • Self-contained Li-Ion battery charger with power path • Linear charger with internal transistor • 500mA max charging current • Trickle-, Constant Current and Constant Voltage operation (3.82V to 4.44V) • Charger timeout and temperature supervision • NTC beta selection • Flexible multi-purpose IOs for general control tasks and for standalone operation without I²C interface • • • • • • ams Datasheet [v1-07] 2016-Apr-05 2 x 200mA universal LDO (1.2V to 3.3V) 500mA Step-down DCDC (0.6125V to 3.35V) 2 programmable current sources up to 40mA Possible external PWM dimming input Wake-up / Stand-by / Power-down input PWM input/output Interrupt input/output Low battery and Power Good output Charging and USB current setting input Charger control input/output Page 1 Document Feedback AS3701 − General Description Benefits Features • Flexible and fast adaption to different processors/applications • OTP programmable Boot sequence • Power saving control according to the processor´s needs • Stand-by function with programmable voltages • Self-contained start-up and safety shutdown feature • I²C control interface • ON-key with 4/8s emergency power-down • POR with Reset I/O • Cost effective, small package optimized for PCB cost or size • 17-balls WL-CSP with 0.4mm pitch • 20-balls WL-CSP with 0.4mm pitch Applications The device is a PMU for low power applications like sport watches, smart watches, handheld GPS devices, mobile phones and any other 1-cell Li+ powered devices. Page 2 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − General Description Block Diagram The functional blocks of this device are shown below: Figure 2: Functional Blocks of AS3701A AS3701A VUSB LDO1 1.2 – 3. 3V 200 mA Iq = 5uA Power Path & Current Limiter LDO2 1.2 – 3. 3V 200 mA Iq = 5uA VSUP LDO1 2. 2uF LDO2 2. 2uF VSUP_CHG VSUP 2.2uF VBAT VSUP_ SD1 Linear Charger 2.2 uF DCDC XIRQ_NTC 500 mA 0.6 – 3. 4V Iq = 30 uA ON SCL SDA LOGIC & CONTROL XRES LX _SD1 FB_SD1 1 uH 10 uF VSS _SD1 VSUP GPIO1_ CURR1 PWM Current Sinks GPIO2_ CURR2 GND Block Diagram: This figure shows the block diagram of the AS3701A ams Datasheet [v1-07] 2016-Apr-05 Page 3 Document Feedback AS3701 − General Description Figure 3: Functional Blocks of AS3701B AS3701B VUSB LDO1 1.2 – 3.3V 200 mA Iq = 5uA Power Path & Current Limiter LDO2 1.2 – 3.3V 200 mA Iq = 5uA VSUP LDO1 2.2uF LDO2 2.2uF VSUP_CHG VSUP 2.2uF VBAT VSUP_SD1 Linear Charger 2.2 uF DCDC XIRQ_NTC 500 mA 0.6 – 3.4V Iq = 30uA ON SCL SDA LOGIC & CONTROL XRES FB_SD1 1uH 10uF VSS_SD1 VSUP PWM GPIO LX_SD1 GPIO1_CURR1 Current Sinks GPIO2_CURR2 GND GPIO 3..5 Block Diagram: This figure shows the block diagram of the AS3701B Page 4 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Pin Assignments Pin Assignments Figure 4: 17-balls WL-CSP Pin Assignment for AS3701A Pin Assignments: Shows the top view pin assignment of the AS3701A Pin A1 indicator A1 A2 A3 B1 B2 B3 C1 D1 D2 D3 A4 A5 B5 C4 C5 D4 D5 Figure 5: 20-balls WL-CSP Pin Assignment for AS3701B Pin Assignments: Shows the top view pin assignment of the AS3701B Pin A1 indicator ams Datasheet [v1-07] 2016-Apr-05 A1 A2 A3 A4 A5 B1 B2 B3 B4 B5 C1 C2 C3 C4 C5 D1 D2 D3 D4 D5 Page 5 Document Feedback AS3701 − Pin Assignments Figure 6: Pin Description Pin Number Pin Name I/O Max. Voltage If Not Used A2 VUSB S Wall adapter or USB Bus Power input (before protection) 5.5V pull-down to GND A1 A1 VSUP_CHG SIO Current limiter output, LDO1 & LDO2 pos. supply terminal VSUP Mandatory D2 D2 VSUP_SD1 S DCDC pos. supply terminal VSUP Mandatory B1 B1 VBAT S Li-Ion Battery Terminal 5.5V Open A5 A5 GND AIO Reference GND A4 A4 LDO1 AO LDO1 Output 3.3V Open A3 A3 LDO2 AO LDO2 Output 3.3V Open D1 D1 LX_SD1 AIO DCDC Step Down Switch Output to Coil 5.5V Open B2 B2 FB_SD1 AI DCDC Step Down Feedback Pin 3.6V Open D4 D4 XRES DIO Reset IO VSUP Open D3 D3 ON DI Power Up Input 5.5V Open B3 B3 XIRQ_NTC AIO Interrupt Output or NTC Input VSUP Open D5 D5 SCL DI 2-wire Serial IF Clock Input VSUP pull-up to VSUP C4 C4 SDA DIO 2-wire Serial IF Data I/O VSUP pull-up to VSUP C5 C5 GPIO1_ CURR1 DIO General Purpose IO1 or LED Channel 1 VSUP Open B5 B5 GPIO2_ CURR2 DIO General Purpose IO2 or LED Channel 2 VSUP Open - B4 GPIO3 DIO General Purpose IO3 VSUP Open - C2 GPIO4 DIO General Purpose IO4 VSUP Open - C3 GPIO5 DIO General Purpose IO5 VSUP Open C1 C1 VSS_SD1 AIO GND connector of DCDC 17 Balls 20 Balls A2 Page 6 Document Feedback Description - - Mandatory Mandatory ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Absolute Maximum Ratings Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only. Functional operation of the device at these or any other conditions beyond those indicated under Electrical Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings Figure 7: Absolute Maximum Ratings Symbol Parameter Min Max Units Comments Electrical Parameters VGND Supply voltage to ground 5V pins -0.5 7.0 V Applicable for pins VSUP_CHG, VSUP_SD1, VBAT, VUSB, LX_SD1, SCL, SDA, ON, XRES, XIRQ_NTC, GPIO3, GPIO4, GPIO5, GPIO1_CURR1, GPIO2_ CURR2 VGND Supply voltage to ground 3V pins -0.5 5.0 V Applicable for pins LDO1, LDO2, FB_SD1 Voltage difference between ground terminals -0.5 0.5 V Applicable for pins GND, VSS_SD1 Input current (latch-up immunity) -100 100 mA ISCR JEDEC JESD78 Continuous Power Dissipation (TA = 70°C) PT Continuous power dissipation 0.96 W PT (1) for WL-CSP20 (RTHJA ~ 57K/W) kV JEDEC JESD22-A114F Electrostatic Discharge ESDHBM Electrostatic discharge (human body model) ams Datasheet [v1-07] 2016-Apr-05 ±2 Page 7 Document Feedback AS3701 − Absolute Maximum Ratings Symbol Parameter Min Max Units Comments Temperature Ranges and Storage Conditions TA RTHJA TJ Operating temperature -40 85 Junction to ambient thermal resistance °C/W Junction temperature TSTRG Storage temperature range TBODY Package body temperature RHNC Relative humidity (non-condensing) MSL Moisture sensitivity level °C -55 5 1 125 °C 125 °C 260 °C 85 % RTHJA typ. 57K/W IPC/JEDEC J-STD-020 (2) Represents an unlimited floor life time Note(s): 1. Depending on actual PCB layout and PCB used 2. The reflow peak soldering temperature (body temperature) is specified according IPC/JEDEC J-STD-020 “Moisture/Reflow Sensitivity Classification for Non hermetic Solid State Surface Mount Devices“ Page 8 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Electrical Characteristics Electrical Characteristics All limits are guaranteed. The parameters with min and max values are guaranteed with production tests or SQC (Statistical Quality Control) methods. Figure 8: Electrical Characteristics Symbol VIN IQ_ACTIVE IQ_STAND-BY IPOWEROFF Parameter Conditions Min Typ Input voltage range Pin VSUP Active mode quiescent current Normal operating current 26 Normal operating current (Oscillator ON) 26 Stand-by quiescent current Shutdown current 2.7 Max Unit 5.5 V uA Normal operating current (Oscillator OFF) 11.5 power_off = 1 1.2 Electrical Characteristics: VSUP = 3.7V, VOUT < VIN – 0.5V, TAMB = -40°C to 85°C, typ. values @ TAMB = 25°C (unless otherwise specified) ams Datasheet [v1-07] 2016-Apr-05 Page 9 Document Feedback AS3701 − Detailed Description – Power Management Functions Detailed Description – Power Management Functions Step Down Converter The step-down converter is a high-efficiency fixed frequency current mode regulator. By using low resistance internal PMOS and NMOS switches, efficiency up to 95% can be achieved. The fast switching frequency allows using small inductors, without increasing the current ripple. The unique feedback and regulation circuit guarantees optimum load and line regulation over the whole output voltage range, up to the maximum output current, with an output capacitor of only 10μF. The implemented current limitation protects the DCDC Converter and the coil during overload condition. Figure 9: DCDC Step-Down Converter Block Diagram IMIN Sd_low_noise 170mA + - VSUP 800mA - 2.2uF + Clk ILIMIT Overvoltage Comparator 1 uH + - Ref + 8% ISENSEP LX_SD1 Ref - 5% 10uF + Logic VOUT - Σ ISENSEN + VSS_SD1 Zero Comparator Skip + PWM Comparator - Sd_lv Ref = 0.6V FB_SD1 Slope Compensation Page 10 Document Feedback buck _v Softstart ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Detailed Description – Power Management Functions Mode Settings To allow optimized performance in different applications, there are bit settings possible, to get the best compromise between high efficiency and low input/output ripple. Figure 10: DCDC Step-Down Converter Mode Settings Mode Setting: This graph shows the difference of the efficiency curves for high efficiency and low noise mode setting. VSUP = 3.7V, VOUT = 2.5V, fSW = 3MHz, TAMB = 25°C. 100 Efficiency (%) 90 1 3 5 80 70 2 4 60 Vout = 2.5V, low noise 50 Vout = 2.5V 40 0.001 0.01 0.1 1 Output Current (A) Low-Ripple, Low-Noise Operation Low-ripple, low-noise operation can be enabled by setting the bit sd_low_noise [SD_control1] to 1. In this mode there is no minimum coil current necessary before switching OFF the PMOS. As long as the load current is superior to the ripple current, the device operates in continuous mode. When the load current gets lower, the discontinuous mode is triggered. Resultant the auto-zero comparator stops the NMOS conduction to avoid load discharger and the duty cycle is reduced down to tMIN_ON to keep the regulation loop stable. This results in a very low ripple and noise, but decreased efficiency at light loads, especially at low input to output voltage differences. ams Datasheet [v1-07] 2016-Apr-05 Page 11 Document Feedback AS3701 − Detailed Description – Power Management Functions Figure 11: Switching Behavior at Operating Point 4 Operating Point 4: These graphs show the switching behavior referring to the operating point 4 from figure10. Here the mode is set to low noise/low ripple operation and the DCDC is continuously switching at 10mA load current. Only in the case the load current gets so small, that less than the minimum on time of the PMOS would be needed to keep the loop in regulation, the regulator will enter low power mode operation. Figure 12: Switching Behavior at Operating Point 2 Operating Point 2: These graphs show the switching behavior referring to the operating point 2 from figure10. Here the mode is set to low noise/low ripple operation and the DCDC has already started to skip pulses, as the minimum PMOS ON time of 40ns has been reached and the load current is further decreasing down to 2mA. Page 12 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Detailed Description – Power Management Functions High-Efficiency Operation (Default Setting) High-efficiency operation is enabled by setting the bit sd_low_ noise [SD_control1] to 0. In this mode there is a minimum coil current necessary before switching OFF the PMOS. Resultant there are less pulses necessary at low output loads, and therefore the efficiency increases. As drawback, this mode increases the ripple up to a higher output current. Figure 13: Switching Behavior at Operating Point 1 Operating Point 1: These graphs show the switching behavior referring to the operating point 1 from figure10. Here the mode is set to high efficiency operation and the DCDC is in skipping mode at 2mA load current. Here a minimum coil current during the PMOS ON time is needed, hence more energy can be stored, the duration between the bursts is longer and the efficiency increases. Figure 14: Output Voltage Ripple Measurement at Operating Point 3 Operating Point 3: These graphs show the switching behavior referring to the operating point 3 from figure10. Here the mode is set to high efficiency operation and comparing to operating point 4 the DCDC is still in skipping mode at 10mA load current and keeps the efficiency higher. ams Datasheet [v1-07] 2016-Apr-05 Page 13 Document Feedback AS3701 − Detailed Description – Power Management Functions Figure 15: Output Voltage Ripple Measurement at Operating Point 5 Operating Point 5: These graphs show the switching behavior referring to the operating point 5 from figure10. Here the load current is 100mA and high enough to keep the DCDC always in a continuous switching operation regardless of the mode setting. Low Power Mode Operation (Automatically Controlled) As soon as the output voltage stays above the desired target value for a certain time, some internal blocks will be powered down leaving the output floating to lower the power consumption. Normal operation starts as soon as the output drops below the target value for a similar amount of time. To minimize the accuracy error some internal circuits are kept powered to assure a minimized output voltage ripple. Two addition guard bands, based on comparators, are set at ±5% of the target value to react quickly on large over/undershoots by immediately turning ON the output drivers without the normal time delays. This ensures a minimized ripple also in very extreme load conditions. Dynamic Voltage Management To minimize the over-/undershoot during a change of the output voltage, the DVM can be enabled with dvm_enable [SD_ control2]. With DVM the output voltage will ramp up/down with a selectable slope after the new value was written to the registers. The DVM time can be chosen between 8us and 16us by setting the bit dvm_time [SD_control2]. Without DVM the slew rate of the output voltage is only determined by external components like the coil and load capacitor as well as the load current. Page 14 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Detailed Description – Power Management Functions Fast Regulation Mode This mode can be used to react faster on sudden load changes and thus minimize the over-/undershoot of the output voltage. This mode needs a 22uF output capacitor instead the 10uF one to guarantee the stability of the regulator. The mode is enabled by setting the bit sd_fast [SD_control1] to 1. Selectable Frequency Operation Especially for very low load conditions, e.g. during a sleep mode of a processor, the switching frequency can be reduced to achieve a higher efficiency. The frequency can be set to 1, 2, 3 or 4MHz and this mode is selected by setting sd1_freq [SD1Voltage] and sd1_fsel [SD_control1] to the appropriate values. Parameters Figure 16: DCDC Step-Down Converter Electrical Characteristics Symbol Parameter Note Min Typ Max Unit 2.7 5.5 V 0.6125 3.35 V -3 +3 % VIN Input Voltage VOUT Regulated Output Voltage VOUT_TOL Output Voltage Tolerance ILIMIT Current Limit 800 RPMOS P-switch ON resistance 0.36 1 Ω RNMOS N-switch ON resistance 0.33 1 Ω fSW Switching Frequency 3 4 MHz ILOAD Load Current ISUP_DCDC tMIN_ON Current Consumption Minimum ON Time ams Datasheet [v1-07] 2016-Apr-05 Pin VSUP min. 40mV 1 500 Operating Current without Load 27 Shutdown Current 0.1 mA mA uA 40 ns Page 15 Document Feedback AS3701 − Detailed Description – Power Management Functions Figure 17: DCDC Step-Down Converter External Components Symbol CFB_SD1 CVSUP_SD1 LSD1 Parameter Note Output Capacitor Ceramic X5R or X7R Input Capacitor Ceramic X5R or X7R Min Typ 8 10 μF 2.2 μF 4MHz operation 1 3MHz operation 1 2MHz operation 1 1MHz operation 2.2 Max Inductor Unit μH 100 100 90 90 80 80 70 70 Efficiency (%) Efficiency (%) Figure 18: DCDC Step Down Converter Efficiency vs. Load Current at 1MHz 60 50 Vout = 0.6125V Vout = 0.6125V, low noise 40 Vout = 1.2V, low noise Vout = 1.8V 0.01 0.1 Output Current (A) Vout = 1.0V Vout = 1.5V Vout = 2.5V, low noise Vout = 2.5V 20 Vout = 3.0V, low noise Vout = 3.35V, low noise Vout = 3.35V Vout = 3.0V 10 0.001 Vout = 1.0V, low noise 40 30 Vout = 1.8V, low noise 20 50 Vout = 1.5V, low noise Vout = 1.2V 30 60 1 10 0.001 0.01 0.1 1 Output Current (A) DCDC Efficiency vs. Output Current: VSUP = 3.7V, fSW = 1MHz, Murata LQM2HPN2R2MG0L 2.2μH coil, TAMB = 25°C. Page 16 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Detailed Description – Power Management Functions 100 100 90 90 80 80 70 70 Efficiency (%) Efficiency (%) Figure 19: DCDC Step Down Converter Efficiency vs. Load Current at 2MHz 60 50 Vout = 0.6125V, low noise 40 Vout = 0.6125V 60 50 Vout = 1.0V, low noise 40 Vout = 1.0V Vout = 1.2V, low noise 30 Vout = 1.2V 20 Vout = 1.8V 10 0.001 Vout = 1.5V, low noise Vout = 1.8V, low noise Vout = 3.0V, low noise Vout = 3.0V 0.01 0.1 30 Vout = 1.5V 20 Vout = 2.5V 10 0.001 1 Vout = 2.5V, low noise Vout = 3.35V, low noise Vout = 3.35V 0.01 0.1 1 Output Current (A) Output Current (A) DCDC Efficiency vs. Output Current: VSUP = 3.7V, fSW = 2MHz, Murata LQM2HPN1R0MG0L 1uH coil, TAMB = 25°C. 100 100 90 90 80 80 70 70 Efficiency (%) Efficiency (%) Figure 20: DCDC Step Down Converter Efficiency vs. Load Current at 3MHz 60 50 Vout = 0.6125V, low noise 40 Vout = 0.6125V 60 50 Vout = 1.0V, low noise 40 Vout = 1.0V Vout = 1.2V, low noise 30 Vout = 1.2V 20 Vout = 1.8V 10 0.001 Vout = 1.5V, low noise Vout = 1.8V, low noise Vout = 3.0V, low noise Vout = 3.0V 0.01 0.1 Output Current (A) 1 30 Vout = 1.5V 20 Vout = 2.5V 10 0.001 Vout = 2.5V, low noise Vout = 3.35V, low noise Vout = 3.35V 0.01 0.1 1 Output Current (A) DCDC Efficiency vs. Output Current: VSUP = 3.7V, fSW = 3MHz, Murata LQM2HPN1R0MG0L 1uH coil, TAMB = 25°C. ams Datasheet [v1-07] 2016-Apr-05 Page 17 Document Feedback AS3701 − Detailed Description – Power Management Functions 100 100 90 90 80 80 70 70 Efficiency (%) Efficiency (%) Figure 21: DCDC Step Down Converter Efficiency vs. Load Current at 4MHz 60 50 Vout = 0.6125V, low noise 40 Vout = 0.6125V 60 50 Vout = 1.0V, low noise Vout = 1.0V 40 Vout = 1.5V, low noise Vout = 1.2V, low noise 30 Vout = 1.2V 20 Vout = 1.8V 10 0.001 Vout = 1.5V 30 Vout = 1.8V, low noise Vout = 2.5V 20 Vout = 3.0V, low noise 0.1 Output Current (A) Vout = 3.35V, low noise Vout = 3.35V Vout = 3.0V 0.01 Vout = 2.5V, low noise 1 10 0.001 0.01 0.1 1 Output Current (A) DCDC Efficiency vs. Output Current: VSUP = 3.7V, fSW = 4MHz, Murata LQM2HPN1R0MG0L 1uH coil, TAMB = 25°C. Page 18 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Detailed Description – Power Management Functions Universal IO LDO Regulator This LDO is a low-power and low-quiescent current linear-regulator specifically designed for space-limited applications. This device can supply loads up to 200mA and consist of an error amplifier, and a P-channel MOSFET pass transistor. Figure 22: Universal IO LDO Regulator Block Diagram VSUP 2.2uF Vref - Error Amplifier + LDOx 2.2uF Parameters Figure 23: Universal IO LDO Regulator Electrical Characteristics Symbol VIN ΔVOUT Parameter Input voltage Output voltage accuracy Note Min Typ Max Unit V Pin VSUP 2.7 5.5 IOUT = 1mA, VOUT > 2V TAMB = 25°C -2 +2 IOUT = 100uA to 200mA VOUT > 2V -3 +3 IOUT = 1mA, VOUT ≤ 2V TAMB = 25°C -20 +20 % mV IOUT = 100uA to 200mA VOUT ≤ 2V VOUT Output voltage range ams Datasheet [v1-07] 2016-Apr-05 -50 +50 1.2 3.3 V Page 19 Document Feedback AS3701 − Detailed Description – Power Management Functions Symbol Parameter Note Line regulation static VIN = 2.7V to 5.5V IOUT = 1mA Line regulation dynamic VIN = 2.7V to 5.5V within 15us IOUT = 1mA Load regulation static IOUT = 100uA to 200mA Load regulation dynamic IOUT = 100uA to 200mA within 15us Min Typ Max Unit 0.07 %/V 20 mV 0.014 %/mA 30 mV VLNR VLDR RON ON resistance IOUT Guaranteed load current RMS ILIMIT Short-circuit VOUT = 0V IQ IOFF tSTART tSHUTDOWN Quiescent current Shutdown supply current 0.5 1 200 Ω mA 230 no Load 5 IOUT = 100μA 5 IOUT = 200mA 15 LDO disabled 0.1 mA uA 1 uA Startup time 750 us Shutdown time 500 us Figure 24: Universal IO LDO Regulator External Components Symbol CLDOx Parameter Output capacitor Page 20 Document Feedback Note Ceramic X5R or X7R Min Typ 2.2 10 Max Unit μF ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Detailed Description – Power Management Functions Figure 25: LDO Output Voltage vs. Output Current 1/2 1.210 2 Vout = 1.2V Vout = 1.2V 1.5 1.205 Vout accuracy (%) Output Voltage (V) 1 1.200 1.195 1.190 VSUP = 2.8V 1.185 0.5 0 -0.5 VSUP = 2.8V -1 VSUP = 3.7V VSUP = 3.7V -1.5 VSUP = 5.5V 1.180 VSUP = 5.5V -2 0.1 1 10 100 1000 0.1 1 Output Current (mA) 10 100 1000 Output Current (mA) LDO Output Voltage vs. Output Current: VOUT = 1.2V, TAMB = 25°C. Figure 26: LDO Output Voltage vs. Output Current 2/2 2 3.05 Vout = 3.0V Vout = 3.0V 1.5 1 Vout accuracy (%) Output Voltage (V) 3.04 3.03 3.02 VSUP = 3.7V 3.01 0.5 0 -0.5 -1 VSUP = 3.7V -1.5 VSUP = 5.5V VSUP = 5.5V -2 3 0.1 1 10 100 1000 0.1 Output Current (mA) 1 10 100 1000 Output Current (mA) LDO Output Voltage vs. Output Current: VOUT = 3.0V, TAMB = 25°C. ams Datasheet [v1-07] 2016-Apr-05 Page 21 Document Feedback AS3701 − Detailed Description – Power Management Functions Figure 27: LDO Load Transient Response 1/2 LDO Load Transient Response: VSUP = 3.7V, VOUT = 1.2V, tRISE = 15us, IOUT = 100uA to 200mA, TAMB = 25°C. (Blue channel: VOUT; Red channel: IOUT ) Figure 28: LDO Load Transient Response 2/2 LDO Load Transient Response: VSUP = 3.7V, VOUT = 3.0V, tRISE = 15us, IOUT = 100uA to 200mA, TAMB = 25°C. (Blue channel: VOUT; Red channel: IOUT ) Page 22 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Detailed Description – Power Management Functions Linear Charger This block can be used to charge Li-Ion batteries. Requiring less external components, a full-featured battery charger with a high degree of flexibility can easily be realized. The main features of the controller are: • Charge adapter detection • Power Path management for dead battery startup • Low current Trickle charging • Constant current charging • Constant voltage charging • Operation without battery • Battery presence indication • NTC temperature supervision • Input current limitation Figure 29: Linear Charger Block Diagram VUSB VSUP Pre-Regulator & Current Limiter VSUP 1uF battery switch ideal diode Charger VBAT XIRQ_NTC 10k/ 100k ams Datasheet [v1-07] 2016-Apr-05 15uA/ 150uA 15k/ 150k Page 23 Document Feedback AS3701 − Detailed Description – Power Management Functions Figure 30: Linear Charger Modes USB USB input Power Path & Current Limiter Power Path & Current Limiter USB USB input IUSB > 500mA VSUP System ISYS VSUP VSUP ISYS 200mA 1uF Battery System VSUP 1uF VBAT Linear Charger ICHG 300mA IBAT Charging is active. All the power comes from the USB through the current limiter. If the system current exceeds the choosen USB current limit, the charging current get reduced automatically. No charger is connected, all the power comes out of the battery. USB input USB Linear Charger VBAT Battery Power Path & Current Limiter USB input Power Path & Current Limiter USB IUSB > 500mA ISYS 200mA VSUP System VSUP ISYS 700mA 1uF Battery IUSB > 500mA VSUP System VSUP 1uF VBAT Linear Charger Battery Linear Charger VBAT IBAT 200mA When battery is fully charged, the switch opens to disconnect the battery. All the power comes from the USB. Charging is disabled. If the system current exceeds the choosen USB current limit, the additional needed current will be provided the battery. Charging Modes: This figure describes the 4 different charger modes. Page 24 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Detailed Description – Power Management Functions Charging Cycle Description Charge Adapter Detection The charge controller uses an integrated detection circuit to determine if an external charge adapter has been applied to the VUSB pin. If the adapter voltage exceeds the battery voltage at pin VBAT by V CHDET the ChDet [ChargerStatus2] will be set. The detection circuit will reset the charge controller (bit ChDet is cleared) as soon as the voltage at the VUSB pin drops to only V CHMIN above the battery voltage. In case the AS3701 device is reset the charge controller will also be reset, even if a charge adapter is applied to the VUSB pin. The Charger detection can be disabled by setting the bit chdet_off [ChargerStatus2] to “1”, which results in a further decrease of internal power consumption. Low Current (Trickle) Charging Trickle charge mode is started when an external charge adapter has been detected, the bit bat_charging_enable [ChargerControl] is set and the battery voltage at pin VBAT is below the V TRICKLE threshold; bits ChDet and Trickle [ChargerStatus1] will be set. In this mode the charge current will be limited to TrickleCurrent [ChargerCurrentControl] to prevent undue stress in case of deeply discharged batteries. Once V TRICKLE has been exceeded, the charger will change over to constant current charging (Trickle is cleared). Constant Current Charging Constant current charging is initiated when bat_charging_ enable [ChargerControl] and the battery voltage at pin VBAT is above the V TRICKLE and below V CHOFF. The bit CCM [ChargerStatus1] is set when the charger has started, and the charge current will be limited by the battery charge controller. The current for the Constant Current Charging can be selected out of the range defined in ConstantCurrent [ChargerCurrentControl] if the bit cc_range_select [ChargerControl] is set to “0” or out of the range defined in TrickleCurrent [ChargerCurrentControl] if the bit cc_range_select [ChargerControl] is set to “1”. When the battery approaches full charge, its voltage will reach the charge termination threshold V CHOFF. V CHOFF depends on the ChVoltEOC [ChargerVoltageControl] bits settings. Top-OFF charge will be started and the bit CVM [ChargerStatus1] will be set. Constant Voltage Charging Constant voltage charge mode is initiated and the bit CVM [ChargerStatus1] will be set when the V CHOFF threshold has been reached. The charge current is monitored during constant voltage charging. It will be decreasing from its initial value during constant current charging and eventually drops below 5% or 50% of the Constant Current value (depends on the ams Datasheet [v1-07] 2016-Apr-05 Page 25 Document Feedback AS3701 − Detailed Description – Power Management Functions setting of the bit eoc_current [ChargerCurrentControl]). If the measured charge current is less than or equal to eoc_current, the charging cycle is terminated and EOC [ChargerStatus1] is set. Resume If EOC is reached and the bit AutoResume [ChargerControl] is set, the charging will immediately start again, if the battery voltage falls below the specified resume voltage ChVoltResume [ChargerConfig1]. This voltage can be set either to 3.33% or 5.56% of ChVoltEOC [ChargerVoltageControl]. Figure 31: Resume Voltage Levels ChVoltEOC ChVoltResume 3.82V 3.84V … 4.20V … 4.42V 4.44V 3.33% 127mV 128mV … 140mV … 147mV 148mV 5.56% 212mV 213mV … 233mV … 246mV 247mV Figure 32: Linear Charger States 5.5V max 4.5V Trickle Current Constant Current Constant Voltage EOC Resume 3.82V – 4.44V External Charger at pin VUSB 3.3% of VEO C or 5.6% of VEO C 2.9V Batter y Voltage (VBAT) 44mA – 493mA 11mA – 130mA Charging Cur rent ICHGOFF 5% of CC – 50% of CC after e nabling the charger Regulator Voltages XRES serial commu nica tion possi ble t (not to scale) Charging States: This figure describes the characteristics of the charging current and the battery voltage for each different charging state. Page 26 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Detailed Description – Power Management Functions Stop Charging Conditions There are multiple safety features implemented triggering a stop_charging condition. These are the following: • Battery temperature is too high: If ntc_high_on [ChargerSupervision] = 1 and the voltage at pin NTC (GPIO3, GPIO4 or XIRQ_NTC) is below VBATTEMP. • Battery temperature is too low: If ntc_low_on [ChargerSupervision] = 1 and the voltage at pin NTC (GPIO3, GPIO4 or XIRQ_NTC) is above VBATTEMP. • Charging timeout timer expired: If ch_timeout [ChargerConfig2] > 0 and charging time has been exceeded. (Can be reset by unplugging the charger, setting bat_charging_enable [ChargerControl] = 0 or writing charging_tmax [ChargerConfig2] = 0) • Die temperature > 140°C (ov_temp_140 [OvertemperatureControl] is set) • Reset is initiated (each Reset reason forces a stopping of the charging) Battery Presence Indication After EOC state is reached, a timer for NOBAT detection is started. If there is no battery present, the VBAT voltage will drop to VRESUME. Depending on the load on VBAT and the capacitor on VBAT this might take some milliseconds to 1 second. If AutoResume [ChargerControl] is enabled, the charger will restart charging (Constant Current Charging) after 100ms delay. The 100ms dead time is necessary to get a battery oscillation frequency below 10Hz, if there is no battery present. If the NOBAT detection timer is below 2 seconds after reaching the EOC state, and this happens 2 times in serial, the bit NoBat [ChargerStatus1] is set. If a battery is inserted, the bit will be reset after the timer exceeds the 2 seconds. NTC Supervision Configuration The AS3701 also features a supply for an external NTC resistor to measure the battery temperature while charging. For AS3701A, the pin XIRQ_NTC can be used as the NTC input pin, whilst AS3701B additionally offers the GPIO3 and GPIO4. With the bit NTC_input [ChargerSupervision] the NTC Supervision can be configured. ams Datasheet [v1-07] 2016-Apr-05 Page 27 Document Feedback AS3701 − Detailed Description – Power Management Functions Figure 33: NTC Supervision Configuration NTC_input NTC Supervision Configuration 0 0 no NTC supervision (1) 0 1 XIRQ_NTC pin 1 0 GPIO3 pin (2) 1 1 GPIO4 pin (2) Note(s): 1. If no NTC supervision is selected, all NTC relevant bits are ineffective 2. AS3701B only NTC Resistor Depending on the used resistor value of the NTC (10k or 100k) the internal NTC current (150uA for 10k or 15uA for 100k) can be selected via ntc_10k [ChargerSupervision]. High/Low Temperature The battery high temperature supervision can be enabled with ntc_high_on [ChargerSupervision]. If the temperature is higher than 45°C or 60°C (depending on ntc_mode [ChargerSupervision]) the charger will stop operation. When the battery temperature drops and the voltage on NTC pin rises above V BATTEMP_HIGH_OFF, the charger will start charging again. The battery low temperature supervision can be enabled with ntc_low_on [ChargerSupervision]. If the temperature is lower than 0°C the charger will stop operation. When the battery temperature rises and the voltage on NTC pin falls below V BATTEMP_LOW_OFF, the charger will start charging again. For the high and low temperature supervision a temperature hysteresis is included to avoid an oscillation of the charger. The supply for the NTC will be on when either the ntc_ high_on or ntc_low_on bit is set, no matter if a charger is detected or not. NTC ß-Correction To keep the voltage drop over the whole temperature range inside of the comparator threshold voltage range, a 15k (150k) parallel resistor to the 10k (100k) NTC is needed. With the bit ntc_beta [ChargerSupervision] 4 different ß-values depending on the used NTC resistor can be selected. Page 28 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Detailed Description – Power Management Functions Figure 34: NTC ß Influence Over Temperature 1.8 1.6 NTC_Voltage (V) 1.4 1.2 1.0 ß = 3000 0.8 ß = 3500 0.6 ß = 4000 0.4 ß = 4500 0.2 0.0 0 10 20 30 40 50 60 NTC_Temperature (°C) NTC ß Influence Diagram: Shows the voltage drop over the NTC resistor depending on the temperature for 4 different ß values using RNTC=10kΩ, Rp=15kΩ and INTC=150uA. Figure 35: NTC Threshold Voltages ß Temperature Low temperature Unit 3000 3500 4000 4500 0°C 1.41 1.49 1.56 1.63 V 45°C 0.59 0.54 0.50 0.46 V 60°C 0.42 0.37 0.31 0.27 V High temperature NTC Supervision: Comparator threshold voltages for different temperatures and ß using RNTC=10kΩ, Rp=15kΩ and INTC=150uA. ams Datasheet [v1-07] 2016-Apr-05 Page 29 Document Feedback AS3701 − Detailed Description – Power Management Functions Charger High/Low Temperature Supervision Figure 36: High/Low Temperature Supervision Maximum Charge Current: 1C 44mA < Consta nt Current < 493mA 11mA < Trickle Curren t < 130mA CHARGE CURRENT TYPICAL COLD Charger is OFF HOT Charger is OFF Typical Charge Voltage: Veoc(typ) CHARGE VOLTAGE 3.82V < ChVoltEOC < 4.44V TLOW_OFF TLOW_ON 0°C THIGH_ON TEMPERATURE [°C] THIGH_OFF 45°C / 60°C Temperature Supervision Diagram: Shows the voltage and current settings for the high and low temperature supervision. Page 30 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Detailed Description – Power Management Functions Parameters Figure 37: Linear Charger Electrical Characteristics Symbol Parameter Note Min Typ Max Unit ITRICKLE Trickle current 11 steps programmable 11.. 130 mA V TRICKLE Trickle to constant current threshold VBAT rising 2.9 V cc_range_select = 0 44.. 493 mA cc_range_select = 1 11.. 130 mA ICHG Constant current @ 70mA VEOC Charge termination threshold Programmable in 20mV steps end of charge is true IEOC IUSB_limit VSUP_prereg VRESUME -8% 70 +8% 3.82.. 4.44 4.15 4.2 mA V 4.25 V EOC current level referring to ICHG (VSUP > 3V) VUSB input current limit @470mA Voltage supplied from Preregulator Depending on the bit vsup_voltage 4.4.. 5.5 V Resume Voltage limit to start charger VBAT falling threshold referring to VEOC (depending on bit ChVoltResume) 3.3 5.6 % 5.. 50 420 470 % 500 mA 3.9 VSUPMIN VSUP level for charging current reduction, to avoid voltage drop on VSUP Trickle or constant current will be regulated down, if VSUP drops below this threshold 4.2 -6% +3% V 4.5 4.7 VCHDET VCHMIN IREV_OFF RON_BATSW Charger detection hysteresis VUSB - VBAT Hysteresis is > 40mV Reverse current shut down VSUP = 5V, VUSB open Battery switch ON-resistance ams Datasheet [v1-07] 2016-Apr-05 50 75 105 mV 0 20 35 mV 20mA guaranteed by design ICURRx_TOL VCURRx VPROTECT Page 32 Document Feedback Typ 10 Max Unit 40 mA 10.7 mA 5.5 V VBAT + 2V V ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Detailed Description – System Functions Detailed Description – System Functions Start-Up Normal Start-Up The following gives a brief description on a start-up from scratch (battery or charger insertion). More details can be found in the start-up flow chart. A start-up can be activated from 5 different sources: • Battery insertion from scratch • Charger insertion from scratch (VBAT < ResVoltFall) • ON-key has been pulled high in power_off mode • Reset cycle • ResVoltRise level was reached During a normal reset cycle a normal startup happens: • Setting USB current limit and ResVoltRise • Startup State machine reads out the internal Boot-OTP. The start-up sequence of SD Converter, LDOs and GPIOs are controlled by the Boot-OTP • Reset-Timer is set by the Boot-OTP • The reset is released when the Reset Timer expires (external pin XRES) Parameter Figure 39: Start-Up Condition Symbol Parameter Note VON_IL Low level voltage ON pin VON_IH High level voltage ON pin ION_PD (1) Pull down current Bit on_invert = 0 (active high) Min Typ 1.4 4 Max Unit 0.4 V V 12 uA Note(s): 1. The internal pull-down resistor is just active if the bit on_invert is set to "0" (active high configuration). If the ON-key works active low (on_invert = 1) the internal pull-down resistor is deactivated and an external pull-up resistor is needed in push-button configuration! ams Datasheet [v1-07] 2016-Apr-05 Page 33 Document Feedback AS3701 − Detailed Description – System Functions Figure 40: Start-Up Flowchart Start-Up Battery or Charger insertion 1. VSUP > VPOR 2. Readout ROM fuse VSUP debounce state N auto_off = 1 Measuring VSUP Quiesent current ResVoltRise for more than 5ms Y Y on_input = 1 (level det) OR ChDet = 1 N N N Y VSUP < ResVoltFall for more than 500ms OFF delay wait off_delay Y Y power_off = 1 OR (VSUP 110°C (tco_110_a = 1) wait off_delay RUN startup sequence Y regulator startup sequence startup delay programmable General Settings programmable Reset all Registers Switch off Regulators RESET Timer regulator startup executed waiting time to release XRES pin 10..150ms reset registers and reload OTP registers expect: pwr_off_at_vsuplow N Y any state Die temp > 140 °C (tco_140 _a = 1) ACTIVE state XRES = 1 (OSC always on ) OFF delay wait off_delay OFF delay power_off = 1 OR force_reset = 1 OR XRES is low OR VSUP ResVoltRise Reg1_addr (b0:3 fuse aah) Reg2_addr (b4:7 fuse aah) Reg3_addr (b0:3 fuse adh) Reg4_addr (b4:7 fuse adh) 0ms delay (if Reg1_delay = 0) 1ms delay (if Reg1_delay = 1 and del_time = 0) 4ms delay (if Reg1_delay = 1 and del_time = 1) 0ms delay (if Reg2_delay = 0) 1ms delay (if Reg2_delay = 1 and del_time = 0) 4ms delay (if Reg2_delay = 1 and del_time = 1) 0ms delay (if Reg3_delay = 0) 1ms delay (if Reg3_delay = 1 and del_time = 0) 4ms delay (if Reg3_delay = 1 and del_time = 1) 0ms delay (if Reg4_delay = 0) 1ms delay (if Reg4_delay = 1 and del_time = 0) 4ms delay (if Reg4_delay = 1 and del_time = 1) 1ms delay between last timeslot (regulator) and PWRGood signal going high reg1_V (b0:7 fuse abh) reg2_V (b0:7 fuse ach) reg3_V (b0:7 fuse aeh) reg4_V (b0:7 fuse afh) PWRGood 10..150ms set by res_timer in O TP 0, 8, 16 or 32ms OFF delay XRES Start-Up Sequence: This diagram shows the timing of a reset command followed by a startup ams Datasheet [v1-07] 2016-Apr-05 Page 35 Document Feedback AS3701 − Detailed Description – System Functions Reset XRES is a low active bi-directional pin. An external pull-up to the periphery supply has to be added. During each reset cycle the following states are controlled by the AS3701: • Pin XRES is forced to GND • Normal startup with programmable power-ON sequence and regulator voltages • Reset is active until the programmable reset timer (set by res_timer [ResetTimer]) expires • All registers are set to their default values after power-ON, except the reset control- and status-registers. • XRES is pulled high by the external resistor and the whole system is leaving the reset state Note(s): Programming is controlled by the internal Boot-OTP RESET Reasons Reset can be activated from the below mentioned different sources: • VPOR has been reached (VSUP rising from the scratch) • ResVoltFall was reached (VSUP < ResVoltFall [Battery_ voltage_monitor]) • Software forced reset (force_reset [ResetControl] = 1) • XRES is pulled to low • ON-key long press (on_tast_sw is set to "0") • Over-temperature Voltage Detection A Reset gets initiated, if VSUP rises from scratch and reaches the V POR level. The pin XRES is only released if VSUP is above ResVoltRise. V XRES_fall is only accepted if the reset condition is longer than V XRES_mask . This guard time is used to avoid a complete reset of the system in case of short drops of VSUP. Software Forced Reset Writing “1” into the register bit force_reset [ResetControl] immediately starts a reset cycle. The bit force_reset is automatically cleared by this reset. External Triggered Reset If the pin XRES is pulled from high to low by an external source (e.g. microprocessor or button) a reset cycle is started as well. Page 36 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Detailed Description – System Functions Long ON-Key Press For a reset initiated with a long ON-key press, this feature must be enabled by setting the bit onkey_lpress_en [ResetControl] to “1”. When applying a high level on the ON input pin for 4s/8s (depending on on_lpress_delay [ReferenceControl]) a reset gets initiated, if the bit onkey_lpress_reset [ReferenceControl] is set to “1”. This is thought as a safety feature when the SW hangs up. A long ON key reset is just possible, if the ON key works as a push-button (on_tast_sw [ReferenceControl] is set to “0”) Figure 43: ON-Key Long Press RESET Behavior onkey_ lpress_en onkey_ lpress_reset on_ lpress_ delay on_tast_sw 0 X X X No ON-key long press reset possible 1 1 0 0 8s long press on the ON-push-button forces a reset 1 1 1 0 4s long press on the ON-push- button forces a reset 1 1 X 1 No reset possible, if ON-key works as a switch Long Press Behavior Over-Temperature Reset A reset cycle is getting started, if the over-temperature threshold is reached and the bit ov_temp_140 [OvertemperatureControl] is set. Parameter Figure 44: XRES Input Characteristics Symbol Parameter VXRES_IL RESET low level voltage VXRES_IH RESET high level voltage ams Datasheet [v1-07] 2016-Apr-05 Note Min 60% of VSUP Typ Max Unit 20% of VSUP V V Page 37 Document Feedback AS3701 − Detailed Description – System Functions Figure 45: Reset Levels Symbol VPOR VXRES_rise VXRES_fall VXRES_mask Parameter Note Min Typ Max Unit Overall power on reset Monitor on VSUPpower ON reset for all internal functions 1.5 2.0 2.3 V RESET level for VSUP rising Monitor voltage on VSUP rising level ResVolt Rise(1) V Monitor voltage on VSUP falling level 2.7 V if SupResEn = 1 only ResVolt Fall(2) V FastResEn = 0 3 ms FastResEn = 1 64 us RESET Level for VSUP falling Mask time for VXRES_fall Duration for VBAT < ResVoltFall until a reset cycle is started (3) Note(s): 1. The selection of the range and level is done via OTP. It´s recommended to set the ResVoltRise level 200mV above the ResVoltFall level to have a hysteresis 2. 2.7V is the default value, other levels can be set via SW 3. XRES signal is debounced with the specific mask time for rising- and falling slope of V BAT Stand-By Stand-by allows shutting down all rails or just a selected number and can be achieved by one of the following cases: Enter Via GPIO To enter the Stand-by mode via GPIO command, the following settings have to be done: • Enable just these interrupt sources which should lead to leave the stand-by mode • Make sure that the specified interrupt is inactive (clear the Register [InterruptStatus] by register reading) • Set the gpioX_mode [GPIOxcontrol] to input and the gpioX_iosf [GPIOxcontrol] should be set to Stand-by + vselect input (gpioX_iosf = 6) • Set RegX_select [Reg_Control] and RegX_voltage [RegX_ Voltage] if another voltage is needed during stand-by for up to 2 regulators • Define which regulators should be kept powered during Stand-by mode (sdX_stby_on and ldoX_stby_on [Reg_ standby_mod1]) • Set the off_delay [Startup_Control] for going into stand-by after the GPIO command • Activate the selected GPIO Page 38 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Detailed Description – System Functions Enter Via SW To enter the Stand-by mode via I²C command, the following settings have to be done: • Enable just these interrupt sources which should lead to leave the stand-by mode • Make sure that the specified interrupt is inactive (clear the Register [InterruptStatus] by register reading) • Define which regulators should be kept powered during Stand-by mode (sdX_stby_on and ldoX_stby_on [Reg_ standby_mod1]) • Set the off_delay [Startup_Control] for going into stand-by after the I²C command • Set standby_mode_on [ReferenceControl] to 1 During Stand-by all regulators are switched OFF, except those, which are selected either with RegX_select [Reg_Control] or with sdX_stby_on and ldoX_stby_on [Reg_standby_mod1]. XRES goes active (can be disabled with standby_reset_disable [Sartup_ Control]) and pwr_good goes inactive. Furthermore, to save power especially in this mode, the internal oscillator is just working, when it is needed. Leaving Stand-By Stand-by can be terminated by: • Any kind of interrupt (if it was defined right before going into Stand-by) • ON-key push-button press (on_tast_sw is set to “0”) • Reset • Power OFF • Over-temperature Power OFF During power OFF state all circuits are shut-OFF. Thus the current consumption of AS3701 is reduced to about 1uA. Except the reset control registers, all other registers are set to their default value after power-ON. The chip stays in power OFF mode until • The external pin ON is pulled high • The charger is inserted or • The VPOR level is touched to start a complete reset cycle. The AS3701 can be set into Power OFF if one of the following conditions occur: • ResVoltFall was reached (VSUP < ResVoltFall [Battery_ voltage_monitor]) • Software forced power OFF (power_off [ResetControl] = 1) ams Datasheet [v1-07] 2016-Apr-05 Page 39 Document Feedback AS3701 − Detailed Description – System Functions • ON-key long press • auto_off [Startup_Control] is enabled (VSUP rising from the scratch) Voltage Detection If VSUP falls below ResVoltFall for longer than 500ms and the bit power_off_at_vsuplow [Startup_Control] is set to “1”, the PMIC enters the Power Off mode. Software Forced Power OFF To put the chip into power off mode, write ‘1’ into power_off [ResetControl]. In ON-key-switch configuration the AS3701 will startup immediately again, if the switch is in ON position. The bit power_off bit is automatically cleared by a startup and its associated reset cycle. Long ON-Key Press For a power OFF asserted with a long ON-key press, this feature must be enabled by setting the bit onkey_lpress_en [ResetControl] to “1”. When applying a high level on the ON input pin for 4s/8s (depending on on_lpress_delay [ReferenceControl]) a power off gets initiated, if the bit onkey_lpress_reset [ReferenceControl] is set to “0”. A long ON key power off is possible, if the ON key works as a push-button or as a switch. Figure 46: ON-Key Long Press Power OFF Behavior onkey_ lpress_en onkey_lpress_ reset on_reset_ delay on_tast_sw 0 X X X No ON-key long press power OFF is possible 1 0 0 0 8s long press on the ON-push-button forces a power OFF (1) 1 0 1 0 4s long press on the ON-push-button forces a power OFF (1) 1 0 0 1 Forces a power OFF after 8s, if ON-switch is set to OFF position (2) 1 0 1 1 Forces a power OFF after 4s, if ON-switch is set to OFF position (2) Long Press Behavior Note(s): 1. If a USB charger adapter is connected, the ON-key push-button long press would only force a power-off, if the bit chg_pwr_off_en is set to "1"! 2. If a USB charger adapter is connected and the bit chg_pwr_off_en is set to "0" (level detection), the ON-key-switch OFF position has no influence. The PMIC will stay in Activemode as long as the USB adapter is present! If a USB adapter is connected and the bit chg_ pwr_off_en is set to "1" (edge detection), the PMIC can be set into Power-OFF via I²C, if the ON-key switch is also in OFF position! Page 40 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Detailed Description – System Functions Auto-OFF If VSUP is rising from the scratch and the bit auto_off [Startup_ Control] is set to “1”, the PMIC enters immediately the Power-OFF mode right after VSUP reaches the ResVoltRise. If the ON-key is in switch configuration the Auto-OFF feature only works, when the switch is in OFF position during VSUP rising from scratch! Internal References Description The internal 2.0V reference and the oscillator are powered either via the VUSB input pin or via the VBAT input pin, depending on which level is higher. The internal oscillator is used for PWM, SD frequency and all timings, which are needed for the charger, the startup sequence and reset delays. Parameter Figure 47: Reference Parameter Symbol Parameter Conditions Min Typ Max Unit fCLK Accuracy of internal reference clock Adjustable by serial interface register clk_int -12 fCLK +12 % Reference Parameter: Shows the key electrical parameter of the on-chip oscillator ams Datasheet [v1-07] 2016-Apr-05 Page 41 Document Feedback AS3701 − Detailed Description – System Functions GPIO Pins AS3701A contains 2 GPIO pins and AS3701B offers 5 GPIO pins. Each of the pins can be configured as digital input, digital input (with pull-up or pull-down), push-pull output or open drain output (with or without pull-up). When configured as output the output source can be a register bit, or the PWM generator. Additional the GPIO1 and GPIO2 can be configured as a Current sink and the GPIO3 and GPIO4 (only available in AS3701B) can offer an input to connect a NTC for supervising the battery temperature. The polarity of the input and output signals can be inverted with the corresponding gpioX_invert [GPIOXcontrol] bit, all further descriptions refer to normal (non-inverted) mode. Figure 48: GPIO Block Diagram VSUP gpioX_out: 0 Interrupt output: 1 VSUP_low output: 2 Pwr_good output: 7 Charger active output: 10 EOC output: 11 PWM output: 14 =1 gpioX_iosf gpioX_mode = 1 & 300k gpioX_invert gpioX_in: 0 GPIO Interr upt input: 3 Cur rent sink PWM input: 4 vselect input: 5 Stand-by + vselect input: 6 Charger Current Range1: 8 Charger Current Range2: 9 100/500mA USB current limit: 12 900/1400mA USB current limit: 13 Charger enable input: 15 gpioX_mode = 4 or 6 & =1 gpioX_mode = 0, 2, 4, 5 or 6 GPIOx gpioX_iosf 300k & gpioX_mode = 1, 2 or 6 gpioX_mode = 5 gpio3/4_mode = 3 (NTC) gpio1/2_mode = 7 gpioX_out: 0 Interrupt output: 1 VSUP_low output: 2 Pwr_good output: 7 Charger active output: 10 EOC output: 11 PWM output: 14 gpio1/2_mode = 7 gpioX_iosf gpioX_invert =1 & CURR1/2 curr1/2_current GPIO Block Diagram: Shows the internal structure of the IO pads Page 42 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Detailed Description – System Functions Figure 49: GPIO Pin Characteristics Symbol Parameter Note Min Typ Max Unit VSUP + 0.3 V +0.4 V Max voltage on GPIOx pins Pin VSUP is used as supply for the GPIO pins VOL Low level output voltage IOL=+1mA digital output VOH High level output voltage IOH=–1mA; digital push-pull output VIL Low level input voltage digital input VIH High level input voltage digital input ILEAKAGE Leakage current high impedance Rpull-up Pull-up resistance if enabled; VSUP = 3.7V 300 kΩ Pull-down resistance if enabled; VSUP = 3.7V 300 kΩ VGPIO_max Rpull-down 0.8*VSUP V 20% of VSUP V 60% of VSUP V 1 μA GPIO Pins: Shows the key electrical parameter of the GPIO pins. VSUP = 2.7 to 5.5V; unless otherwise mentioned IO Functions Normal IO Operation If set to input, the logic level of the signal present at the GPIOx pin can be read from gpioX_in [GPIOsignal_in]. This mode is also used for the ON/OFF control of the DCDC and LDOs. The selection, which regulator is controlled by which GPIO, is done with the gpio_ctrl_sdX [GPIO_ctrl2] or gpio_ctrl_ldoX [GPIO_ ctrl2] bits. The gpioX_mode [GPIOxcontrol] should be set to input. The gpioX_iosf [GPIOxcontrol] should be set to gpioX_in. If the output mode is chosen, gpioX_out [GPIOsignal_out] specifies the logic level of the GPIOx pin. The gpioX_mode [GPIOxcontrol] should be set to output. The gpioX_iosf [GPIOxcontrol] should be set to gpioX_out. For GPIO1 and GPIO2, the logic level of the output signal can be visualized via the Current sinks. In this case the gpioX_mode [GPIOxcontrol] should be set to CURRx. ams Datasheet [v1-07] 2016-Apr-05 Page 43 Document Feedback AS3701 − Detailed Description – System Functions Interrupt Output GPIOx pin logic state is derived from the interrupt signal XIRQ. Whenever an interrupt is present the GPIOx pin will be pulled high. The gpioX_mode [GPIOxcontrol] should be set to output. The gpioX_iosf [GPIOxcontrol] should be set to Interrupt output. For GPIO1 and GPIO2, the Interrupt output signal can be visualized via the Current sinks. In this case the gpioX_mode [GPIOxcontrol] should be set to CURRx. VSUP_low Output GPIOx pin will go high, if VSUP falls below ResVoltFall and SupResEn [Battery_voltage_monitor] = 0. The gpioX_mode [GPIOxcontrol] should be set to output. The gpioX_iosf [GPIOxcontrol] should be set to VSUP_low output. For GPIO1 and GPIO2, the VSUP_low output signal can be visualized via the Current sinks. In this case the gpioX_mode [GPIOxcontrol] should be set to CURRx. PWRGOOD Output This signal will go high at the end of the start-up sequence. This can be used as a second reset signal to the processor to e.g. start oscillators. The gpioX_mode [GPIOxcontrol] should be set to output. The gpioX_iosf [GPIOxcontrol] should be set to Pwr_good output. For GPIO1 and GPIO2, the Pwr_good output signal can be visualized via the Current sinks. In this case the gpioX_mode [GPIOxcontrol] should be set to CURRx. Charger Active Output When selected, the GPIOx will go high if the charger is active. The gpioX_mode [GPIOxcontrol] should be set to output. The gpioX_iosf [GPIOxcontrol] should be set to Charger active output. For GPIO1 and GPIO2, the Charger active output signal can be visualized via the Current sinks. In this case the gpioX_mode [GPIOxcontrol] should be set to CURRx. EOC Output When selected, the GPIOx will go high if the charger has reached the EOC state. The gpioX_mode [GPIOxcontrol] should be set to output. The gpioX_iosf [GPIOxcontrol] should be set to EOC output. For GPIO1 and GPIO2, the EOC output signal can be visualized via the Current sinks. In this case the gpioX_mode [GPIOxcontrol] should be set to CURRx. PWM Output When selected, the GPIOx output provides the PWM signal generated by the internal programmable PWM generator. Its timing is defined by pwm_h_time [pwm_control_h], pwm_l_ Page 44 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Detailed Description – System Functions time [pwm_control_l] and pwm_div [ReferenceControl]. The gpioX_mode [GPIOxcontrol] should be set to output. The gpioX_iosf [GPIOxcontrol] should be set to PWM output. For GPIO1 and GPIO2, the PWM output signal can be visualized via the Current sinks. In this case the gpioX_mode [GPIOxcontrol] should be set to CURRx. GPIO Interrupt Input A falling or rising edge will set the gpio_int bit. The gpioX_mode [GPIOxcontrol] should be set to input. The gpioX_iosf [GPIOxcontrol] should be set to GPIO Interrupt input. Current Sink PWM Input The GPIO is used as PWM input for the current sink to control the current. 100% PMW mode will set the current to the value set in currX_current [currX_value] register. The gpioX_mode [GPIOxcontrol] should be set to input. The gpioX_iosf [GPIOxcontrol] should be set to Current sink PWM input. Vselect Input As long as the GPIOx pin is low the DCDC/LDOs operate with the normal register settings. If the GPIOx pin goes high, the settings will change to the ones stored in RegX_voltage [RegX_ Voltage]. The gpioX_mode [GPIOxcontrol] should be set to input. The gpioX_iosf [GPIOxcontrol] should be set to vselect input. GPIO1 and GPIO2 may be used to control two regulators separately. Figure 50: GPIO Vselect Modes gpio1_ iosf gpio2_ iosf gpio3_ iosf gpio4_ iosf gpio5_ iosf ≠5 ≠5 ≠5 ≠5 ≠5 No voltage select by GPIO for regulator 5 ≠5 ≠5 ≠5 ≠5 GPIO1 controls regulator selected by reg1_select and reg2_select ≠5 5 ≠5 ≠5 ≠5 GPIO2 controls regulator selected by reg1_select and reg2_select 5 5 ≠5 ≠5 ≠5 GPIO1 controls regulator selected by reg1_select GPIO2 controls regulator selected by reg2_select ≠5 ≠5 5 ≠5 ≠5 GPIO3 controls regulator selected by reg1_select and reg2_select (1) ≠5 ≠5 ≠5 5 ≠5 GPIO4 controls regulator selected by reg1_select and reg2_select (1) ams Datasheet [v1-07] 2016-Apr-05 Vselect Mode Page 45 Document Feedback AS3701 − Detailed Description – System Functions gpio1_ iosf gpio2_ iosf gpio3_ iosf gpio4_ iosf gpio5_ iosf ≠5 ≠5 ≠5 ≠5 5 Vselect Mode GPIO5 controls regulator selected by reg1_select and reg2_select (1) IO Functions: Shows the different Vselect control modes, depending on the setting of the GPIO special function 5. Note(s): 1. AS3701B only Stand-By and Vselect Input This mode is very similar to the Vselect mode described in the previous paragraph. The chip is set into stand-by mode when the GPIOx pin goes high and wakes up again when the pin is pulled low and the gpio_restart_int_m [InterruptMask2] has been set before going into stand-by. Additional to the stand-by feature, the voltage setting of 2 regulators can be changed with the same command. This requires the setting of the corresponding regulator (sd1_stby_on and/or ldo1_stby_on and/or ldo2_stby_on [Reg_standby_mod1]). The gpioX_mode [GPIOxcontrol] should be set to input. The gpioX_iosf [GPIOxcontrol] should be set to Stand-by + vselect input. Figure 51: Stand-By and Vselect Modes gpio1 _iosf gpio2 _iosf gpio3 _iosf gpio4 _iosf gpio5 _iosf Vselect Mode Stand-By Control ≠6 ≠6 ≠6 ≠6 ≠6 No voltage select by GPIO for regulator No 6 ≠6 ≠6 ≠6 ≠6 GPIO1 controls regulator selected by reg1_select and reg2_select Yes ≠6 6 ≠6 ≠6 ≠6 GPIO2 controls regulator selected by reg1_select and reg2_select Yes ≠6 ≠6 6 ≠6 ≠6 GPIO3 controls regulator selected by reg1_select and reg2_select (1) Yes ≠6 ≠6 ≠6 6 ≠6 GPIO4 controls regulator selected by reg1_select and reg2_select (1) Yes ≠6 ≠6 ≠6 ≠6 6 GPIO5 controls regulator selected by reg1_select and reg2_select (1) Yes IO Functions: Shows the different Vselect and stand-by control modes, depending on the setting of the GPIO special function 6. Note(s): 1. AS3701B only Page 46 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Detailed Description – System Functions Charger Current Range 1 With this function the charging current (trickle current and constant current) can be set to 11mA(trickle) + 133mA(constant) or 22mA(trickle) + 223mA(constant). The gpioX_mode [GPIOxcontrol] should be set to input. The gpioX_iosf [GPIOxcontrol] should be set to Charger Current Range1. Charger Current Range 2 With this function the charging current (trickle current and constant current) can be set to 33mA(trickle) + 357mA(constant) or 45mA(trickle) + 493mA(constant). The gpioX_mode [GPIOxcontrol] should be set to input. The gpioX_iosf [GPIOxcontrol] should be set to Charger Current Range2. 100/500mA Charger Input With this function the charger input current limiter can be set to 100mA or 500mA. The gpioX_mode [GPIOxcontrol] should be set to input. The gpioX_iosf [GPIOxcontrol] should be set to 100/500mA USB current limit. 800/1100mA Charger Input With this function the charger input current limiter can be set to 800mA or 1100mA. The gpioX_mode [GPIOxcontrol] should be set to input. The gpioX_iosf [GPIOxcontrol] should be set to 800/1100mA USB current limit. Charging Enable Input When pulling the GPIO to high the charger is being enabled and vice versa. This is to enable the charger without I²C communication. The gpioX_mode [GPIOxcontrol] should be set to input. The gpioX_iosf [GPIOxcontrol] should be set to Charger enable input. ams Datasheet [v1-07] 2016-Apr-05 Page 47 Document Feedback AS3701 − Detailed Description – System Functions Supervisor The Step Down DCDC Converter has an integrated over-current protection. An over-temperature protection of the chip is also integrated which can be switched ON with the serial interface signal temp_pmc_on [OvertemperatureControl] (enabled by default; it is not recommended to disable the over-temperature protection). Temperature Supervision The chip has two signals for the serial interface: ov_temp_110 and ov_temp_140 [OvertemperatureControl]. The flag ov_temp_110 is automatically reset if the overtemperature condition is removed, whereas ov_temp_140 has to be reset by the serial interface with the signal rst_ov_ temp_140 [OvertemperatureControl]. If the flag ov_temp_140 is set, an automatic reset of the complete chip is initiated. The chip will only start-up when the temperature falls below the T110 level (including hysteresis). The flag ov_temp_140 is not affected by this reset cycle allowing the software to detect the reason for this unexpected shutdown. Figure 52: Over-Temperature Protection Symbol Parameter Note Min Typ Max Unit T110 ov_temp_110 rising threshold 95 110 125 °C T140 ov_temp_140 rising threshold 125 140 155 °C THYST ov_temp_110 and ov_temp_140 hysteresis Page 48 Document Feedback 5 °C ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Detailed Description – System Functions Interrupt Generation The interrupt controller generates an interrupt request for the host controller as soon as one or more of the bits in the InterruptMask registers are set by pulling low the pin XIRQ. All the interrupt sources can be enabled in the Interrupt Mask registers. If an interrupt occurs, the Interrupt Status registers get set and cleared automatically after the host controller has read them. To prevent the AS3701 device from losing an interrupt event, the register that is read is captured before it is transmitted to the host controller via the serial interface. As soon as the transmission of the captured value is completed, a logical AND operation with the bit wise inverted captured value is applied to the register to clear all interrupt bits that have already been transmitted. Clearing the read interrupt bits takes 2 clock cycles, a read access to the same register, before the clearing process has completed, will yield a value of ‘0’. Note that an interrupt that has been present at the previous read access will be cleared as well in case it occurs again before the clearing process has completed. Wire-Serial Control Interface Feature List • Fast-mode capability (max. SCL-frequency is 400 kHz) • 7+1-bit addressing mode • 60h x 8-bit data registers (word address 0x00 - 0x60) • Write formats: Single-Byte-Write, Page-Write • Read formats: Current-Address-Read, Random-Read, Sequential-Read • SDA input delay and SCL spike filtering by integrated RC-components ams Datasheet [v1-07] 2016-Apr-05 Page 49 Document Feedback AS3701 − Detailed Description – System Functions I²C Protocol Figure 53: I²C Symbol Definition Symbol Definition RW Note S Start condition after Stop R 1 bit Sr Repeated Start R 1 bit DW Device address for Write R 1000 0000b (80h) DR Device address for Read R 1000 0001b (81h) WA Word address R 8 bit A Acknowledge W 1 bit N No Acknowledge R 1 bit reg_data Register data/write R 8 bit data (n) Register data/read W 8 bit P Stop condition R 1 bit WA++ Increment word address internally R During acknowledge I²C Write Access Byte Write and Page Write formats are used to write data to the slave. Figure 54: I²C Byte Write S DW A WA A reg_data A P write register WA++ Figure 55: I²C Page Write S DW A WA A reg_data 1 A reg_data 2 write register WA++ Page 50 Document Feedback A write register WA++ ... reg_data n A P write register WA++ ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Detailed Description – System Functions The transmission begins with the START condition, which is generated by the master when the bus is in IDLE state (the bus is free). The device-write address is followed by the word address. After the word address any number of data bytes can be sent to the slave. The word address is incremented internally, in order to write subsequent data bytes on subsequent address locations. For reading data from the slave device, the master has to change the transfer direction. This can be done either with a repeated START condition followed by the device-read address, or simply with a new transmission START followed by the device-read address, when the bus is in IDLE state. The device-read address is always followed by the 1st register byte transmitted from the slave. In Read Mode any number of subsequent register bytes can be read from the slave. The word address is incremented internally. I²C Read Access Random, Sequential and Current Address Read are used to read data from the slave. Figure 56: I²C Random Read S DW A WA A Sr DR A data N P read register WA++ Random Read and Sequential Read are combined formats. The repeated START condition is used to change the direction after the data transfer from the master. The word address transfer is initiated with a START condition issued by the master while the bus is idle. The START condition is followed by the device-write address and the word address. In order to change the data direction a repeated START condition is issued on the 1 st SCL pulse after the acknowledge bit of the word address transfer. After the reception of the device-read address, the slave becomes the transmitter. In this state the slave transmits register data located by the previous received word address vector. The master responds to the data byte with a not-acknowledge, and issues a STOP condition on the bus. ams Datasheet [v1-07] 2016-Apr-05 Page 51 Document Feedback AS3701 − Detailed Description – System Functions Figure 57: I²C Sequential Read S DW A WA A Sr DR A data read register WA++ A reg_data 2 read register WA++ A ... reg_data n N P read register WA++ Sequential Read is the extended form of Random Read, as more than one register-data bytes are transferred subsequently. In difference to the Random Read, for a sequential read the transferred register-data bytes are responded by an acknowledge from the master. The number of data bytes transferred in one sequence is unlimited (consider the behavior of the word-address counter). To terminate the transmission the master has to send a not-acknowledge following the last data byte and generate the STOP condition subsequently. Figure 58: I²C Current Address Read S DR A data read register WA++ A reg_data 2 read register WA++ A ... reg_data n N P read register WA++ To keep the access time as small as possible, this format allows a read access without the word address transfer in advance to the data transfer. The bus is idle and the master issues a START condition followed by the Device-Read address. Analogous to Random Read, a single byte transfer is terminated with a not-acknowledge after the 1 st register byte. Analogous to Sequential Read an unlimited number of data bytes can be transferred, where the data bytes has to be responded with an acknowledge from the master. For termination of the transmission the master sends a not-acknowledge following the last data byte and a subsequent STOP condition. Page 52 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Detailed Description – System Functions I²C Parameter Figure 59: I²C Characteristics Symbol Parameter VIL SCL,SDA Low Level input voltage VIH SCL,SDA High Level input voltage ams Datasheet [v1-07] 2016-Apr-05 Condition Min 1.4 Typ Max Unit 0.4 V V Page 53 Document Feedback SD1Voltage LDO1Voltage LDO2Voltage GPIO1control GPIO2control GPIO3control GPIO4control GPIO5control GPIOsignal_out GPIOsignal_in Reg1_Voltage Reg2_Voltage Reg_Control GPIO_ctrl1 GPIO_ctrl2 SD_control1 01h 02h 03h 09h 0ah 0bh 0ch 0dh 20h 21h 22h 23h 24h 25h 26h 30h Page 54 Document Feedback Name Addr Figure 60: Register Overview Register Description sd1_enable - - - gpio5_invert gpio4_invert gpio3_invert gpio2_invert gpio1_invert ldo2_on ldo1_on sd1_frequ D7 - sd1_low_ noise - - ldo2_ilimit ldo1_ilimit D6 gpio5_in gpio5_out D4 sd1_fast -  gpio_ctrl_ldo2 sd1_fsel Reg2_select gpio5_mode gpio4_mode gpio3_mode gpio2_mode gpio1_mode D5 - - - Reg2_voltage Reg1_voltage gpio4_in gpio4_out gpio3_in gpio1_in gpio1_out D0 dvm_time ams Datasheet [v1-07] 2016-Apr-05 dvm_enable gpio_ctrl_sd1 gpio_ctrl_ldo1 Reg1_select gpio2_in gpio2_out gpio5_iosf gpio4_iosf gpio3_iosf gpio2_iosf gpio3_out ldo2_vsel D1 gpio1_iosf D2 ldo1_vsel sd1_vsel D3 A S 3 7 0 1 − Register Description ResetControl Overtemperature Control Reg_standby_ mod1 pwm_control_l pwm_control_h curr1_value curr2_value RegStatus InterruptMask1 InterruptMask2 InterruptStatus1 InterruptStatus2 36h 37h 39h 41h 42h 43h 44h 73h 74h 75h 77h 78h ams Datasheet [v1-07] 2016-Apr-05 on_tast_sw on_lpress_ delay ReferenceControl 35h gpio5_int_i LowBat_int_i gpio4_int_i ovtmp_int_i gpio4_int_m ovtmp_int_m LowBat_int_ m gpio5_int_m curr2_lv tco_110_a  - tco_140_a power_off_ at_vsuplow chg_pwr_off_ en Startup_control 33h onkey_ lpress_reset stby_reset_ disable D5 - standby_ mode_on auto_off ResVoltFall D4 gpio3_int_i onkey_int_i gpio3_int_m onkey_int_m curr1_lv disable_ regpd rst_ov_temp_ 140 gpio2_int_i chdet_int_i gpio2_int_m gpio1_int_i eoc_int_i gpio1_int_m eoc_int_m curr2_current curr1_current  - D0 sd1_lv_int_i gpio_restart_ int_i bat_temp_i trickle_int_i bat_temp_m trickle_int_m sd1_lv ldo1_stby_on temp_pmc_ on force_reset Page 55 Document Feedback nobat_int_i sd1_lv_int_m gpio_restart_ int_m resume_int_i nobat_int_m ldo2_stby_on ov_temp_110 power_off pwm_div res_timer ResVoltRise D1 resume_int_ m sd1_stby_on ov_temp_140 on_input clk_int onkey_ lpress_en pwm_h_time chdet_int_m D2 off_delay D3 pwm_l_time temp_test reset_reason SupResEn FastResEn Battery_voltage_ monitor 32h D6 D7 Name Addr A S 3 7 0 1 − Register Description ChargerConfig2 Chargersupervisio n ChargerStatus1 ChargerStatus2 LockRegister ASIC_ID1 ASIC_ID2 84h 85h 86h 87h 8eh 90h 91h Page 56 Document Feedback a6h   Fuse6   Fuse5 ntc_low_on ChargerConfig1 83h a5h eoc_current ChargerCurrentCo ntrol 82h   del_time NoBat ntc_high_on Charging_ 1Hz_clk usb_chgEn bat_ charging_ enable - D4 D5   sequ_on -   - -     - EOC CVM -    on_tast_sw CCM ams Datasheet [v1-07] 2016-Apr-05   on_invert reg_lock batsw_mode onkey_ lpress_reset revision charger_lock ChDet Trickle - D0 ntc_beta Resume ch_timeout vsup_voltage ContantCurrent ChVoltEOC   D1 usb_current D2 NTC_input D3 chdet_off ID1 ntc_mode charging_ tmax temp_sel ntc_10k temp_cond ChVoltResum e TrickleCurrent Vsup_min ChargerVoltageC ontrol 81h AutoResume cc_range_ select ChargerControl 80h D6 D7 Name Addr A S 3 7 0 1 − Register Description ams Datasheet [v1-07] 2016-Apr-05 afh aeh adh ach abh aah a9h a8h a7h Addr   Fuse15   Fuse14   Fuse13   Fuse12   Fuse11   Fuse10   Fuse9   Fuse8   Reg4_del   auto_off Fuse7   D7 Name A S 3 7 0 1 − Register Description   Reg2_del Reg4_addr Reg2_addr   Reg3_del D4     D3 reg4_V reg3_V reg2_V   SupResEn   sd1_fsel reg1_V Reg1_del res_timer D5 usb_current   chg_pwr_off_ en D6   Reg3_addr Page 57 Document Feedback     on_lpress_ delay   i2c_deva_ bit1 D0 NTC_input   power_off_ at_vsuplow D1 Reg1_addr   onkey_ lpress_en ResVoltRise   sd1_fast D2 AS3701 − Register Description Detailed Register Description Figure 61: SD1Voltage Addr:01h SD1Voltage Bit Bit Name Default Access 7 sd1_frequ b0 RW Selects between high and low frequency 0 : 1 MHz if sd1_fsel=0, 2MHz if sd1_fsel=1 1 : 3 MHz if sd1_fsel=0, 4MHz if sd1_fsel=1 RW The voltage select bits set the DC/DC output voltage level and power the DC/DC converter down. 00h : DC/DC powered down 01h-40h : V_SD1=0.6V+sd1_vsel*12.5mV 41h-70h : V_SD1=1.4V+(sd1_vsel-40h)*25mV 71h-7Fh : V_SD1=2.6V+(sd1_vsel-70h)*50mV 6:0 sd1_vsel b0000000 Bit Description Figure 62: LDO1Voltage Addr:02h LDO1Voltage Bit Bit Name Default Access 7 ldo1_on b0 RW Switch ON of LDO1 0 : LDO OFF 1 : LDO ON 6 ldo1_ilimit b0 RW Sets current limit of LDO1 0 : 100mA operating range 1 : 200mA operating range 5:0 ldo1_vsel b000000 RW The voltage select bits set the LDO output voltage 00h-2Ah : V_LDO1=1.2V+ldo1_vsel*50mV 2Bh-3Fh : do not use Page 58 Document Feedback Bit Description ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Register Description Figure 63: LDO2Voltage Addr:03h LDO2Voltage Bit Bit Name Default Access 7 ldo2_on b0 RW Switch ON of LDO2 0 : LDO OFF 1 : LDO ON 6 ldo2_ilimit b0 RW Sets current limit of LDO2 0 : 100mA operating range 1 : 200mA operating range 5:0 ldo2_vsel b000000 RW The voltage select bits set the LDO output voltage 00h-2Ah : V_LDO2=1.2V+ldo2_vsel*50mV 2Bh-3Fh : do not use ams Datasheet [v1-07] 2016-Apr-05 Bit Description Page 59 Document Feedback AS3701 − Register Description Figure 64: GPIO1control Addr:09h GPIO1control Bit Bit Name Default Access 7 gpio1_invert b0 RW Invert GPIO1 input/output 0 : Normal Mode 1 : Invert input or output RW Selects the GPIO1 mode (I, I/O, Tri, Pulls) 0 : Input 1 : Output (push and pull) 2 : IO(open drain, only NMOS is active) 3 : Input (tristate) 4 : Input with pullup 5 : Input with pulldown 6 : IO(open drain(NMOS)with pullup) 7 : CURR1 RW Selects the GPIO1 special function 0 : Normal I/O operation 1 : Interrupt output 2 : VSUP_low output 3 : GPIO interrupt input 4 : Current sink PWM input 5 : Vselect input, (apply on reg1_select and reg2_select, if gpio2_iosf=5 then apply on reg1_select only) 6 : standby+Vselect+restart interrupt input 7 : pwr_good output 8 : 11mA(TrickleCurrent=0), 133mA(ConstantCurrent=2) / 23mA(TrickleCurrent=1), 223mA(ConstantCurrent=4) 9 : 35mA(TrickleCurrent=2), 358mA(ConstantCurrent=7) / 47mA(TrickleCurrent=3), 494mA(ConstantCurrent=10) 10 : Charger active output 11 : EOC output 12 : 100mA(usb_Current=0) / 500mA(usb_Current=8) 13 : 800mA(usb_Current=11) / 1100mA(usb_Current=13) 14 : PWM output 15 : Charger enable input 6:4 3:0 gpio1_mode gpio1_iosf Page 60 Document Feedback b011 b0000 Bit Description ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Register Description Figure 65: GPIO2control Addr:0ah GPIO2control Bit Bit Name Default Access 7 gpio2_invert b0 RW Invert GPIO2 input/output 0 : Normal Mode 1 : Invert input or output RW Selects the GPIO2 mode (I, I/O, Tri, Pulls) 0 : Input 1 : Output (push and pull) 2 : IO(open drain, only NMOS is active) 3 : Input (tristate) 4 : Input with pullup 5 : Input with pulldown 6 : IO(open drain(NMOS)with pullup) 7 : CURR2 RW Selects the GPIO2 special function 0 : Normal I/O operation 1 : Interrupt output 2 : VSUP_low output 3 : GPIO interrupt input 4 : Current sink PWM input 5 : Vselect input, (apply on reg1_select and reg2_select, if gpio1_iosf=5 then apply on reg2_select only) 6 : standby+Vselect+restart interrupt input 7 : pwr_good output 8 : 11mA(TrickleCurrent=0), 133mA(ConstantCurrent=2) / 23mA(TrickleCurrent=1), 223mA(ConstantCurrent=4) 9 : 35mA(TrickleCurrent=2), 358mA(ConstantCurrent=7) / 47mA(TrickleCurrent=3), 494mA(ConstantCurrent=10) 10 : Charger active output 11 : EOC output 12 : 100mA(usb_Current=0) / 500mA(usb_Current=8) 13 : 800mA(usb_Current=11) / 1100mA(usb_Current=13) 14 : PWM output 15 : Charger enable input 6:4 3:0 gpio2_mode gpio2_iosf ams Datasheet [v1-07] 2016-Apr-05 b011 b0000 Bit Description Page 61 Document Feedback AS3701 − Register Description Figure 66: GPIO3control Addr:0bh GPIO3control Bit Bit Name Default Access 7 gpio3_invert b0 RW Invert GPIO3 input/output 0 : Normal Mode 1 : Invert input or output RW Selects the GPIO3 mode (I, I/O, Tri, Pulls) 0 : Input 1 : Output (push and pull) 2 : IO(open drain, only NMOS is active) 3 : NTC input (tristate) 4 : Input with pullup 5 : Input with pulldown 6 : IO(open drain(NMOS)with pullup) 7 : NA RW Selects the GPIO3 special function 0 : Normal I/O operation 1 : Interrupt output 2 : VSUP_low output 3 : GPIO interrupt input 4 : Current sink PWM input 5 : Vselect input, (apply on reg1_select and reg2_select) 6 : standby+Vselect+restart interrupt input 7 : pwr_good output 8 : 11mA(TrickleCurrent=0), 133mA(ConstantCurrent=2) / 23mA(TrickleCurrent=1), 223mA(ConstantCurrent=4) 9 : 35mA(TrickleCurrent=2), 358mA(ConstantCurrent=7) / 47mA(TrickleCurrent=3), 494mA(ConstantCurrent=10) 10 : Charger active output 11 : EOC output 12 : 100mA(usb_Current=0) / 500mA(usb_Current=8) 13 : 800mA(usb_Current=11) / 1100mA(usb_Current=13) 14 : PWM output 15 : Charger enable input 6:4 3:0 gpio3_mode gpio3_iosf Page 62 Document Feedback b011 b0000 Bit Description ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Register Description Figure 67: GPIO4control Addr:0ch GPIO4control Bit Bit Name Default Access 7 gpio4_invert b0 RW Invert GPIO4 input/output 0 : Normal Mode 1 : Invert input or output RW Selects the GPIO4 mode (I, I/O, Tri, Pulls) 0 : Input 1 : Output (push and pull) 2 : IO(open drain, only NMOS is active) 3 : NTC input (tristate) 4 : Input with pullup 5 : Input with pulldown 6 : IO(open drain(NMOS)with pullup) 7 : NA RW Selects the GPIO4 special function 0 : Normal I/O operation 1 : Interrupt output 2 : VSUP_low output 3 : GPIO interrupt input 4 : Current sink PWM input 5 : Vselect input, (apply on reg1_select and reg2_select) 6 : standby+Vselect+restart interrupt input 7 : pwr_good output 8 : 11mA(TrickleCurrent=0), 133mA(ConstantCurrent=2) / 23mA(TrickleCurrent=1), 223mA(ConstantCurrent=4) 9 : 35mA(TrickleCurrent=2), 358mA(ConstantCurrent=7) / 47mA(TrickleCurrent=3), 494mA(ConstantCurrent=10) 10 : Charger active output 11 : EOC output 12 : 100mA(usb_Current=0) / 500mA(usb_Current=8) 13 : 800mA(usb_Current=11) / 1100mA(usb_Current=13) 14 : PWM output 15 : Charger enable input 6:4 3:0 gpio4_mode gpio4_iosf ams Datasheet [v1-07] 2016-Apr-05 b011 b0000 Bit Description Page 63 Document Feedback AS3701 − Register Description Figure 68: GPIO5control Addr:0dh GPIO5control Bit Bit Name Default Access 7 gpio5_invert b0 RW Invert GPIO5 input/output 0 : Normal Mode 1 : Invert input or output RW Selects the GPIO5 mode (I, I/O, Tri, Pulls) 0 : Input 1 : Output (push and pull) 2 : IO(open drain, only NMOS is active) 3 : Input (tristate) 4 : Input with pullup 5 : Input with pulldown 6 : IO(open drain(NMOS)with pullup) 7 : NA RW Selects the GPIO5 special function 0 : Normal I/O operation 1 : Interrupt output 2 : VSUP_low output 3 : GPIO interrupt input 4 : Current sink PWM input 5 : Vselect input, (apply on reg1_select and reg2_select) 6 : standby+Vselect+restart interrupt input 7 : pwr_good output 8 : 11mA(TrickleCurrent=0), 133mA(ConstantCurrent=2) / 23mA(TrickleCurrent=1), 223mA(ConstantCurrent=4) 9 : 35mA(TrickleCurrent=2), 358mA(ConstantCurrent=7) / 47mA(TrickleCurrent=3), 494mA(ConstantCurrent=10) 10 : Charger active output 11 : EOC output 12 : 100mA(usb_Current=0) / 500mA(usb_Current=8) 13 : 800mA(usb_Current=11) / 1100mA(usb_Current=13) 14 : PWM output 15 : Charger enable input 6:4 3:0 gpio5_mode gpio5_iosf Page 64 Document Feedback b011 b0000 Bit Description ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Register Description Figure 69: GPIOsignal_out Addr:20h GPIOsignal_out Bit Bit Name Default Access Bit Description 4 gpio5_out b0 RW This bit determines the output signal of the GPIO5 pin when selected as output source. 3 gpio4_out b0 RW This bit determines the output signal of the GPIO4 pin when selected as output source. 2 gpio3_out b0 RW This bit determines the output signal of the GPIO3 pin when selected as output source. 1 gpio2_out b0 RW This bit determines the output signal of the GPIO2 pin when selected as output source. 0 gpio1_out b0 RW This bit determines the output signal of the GPIO1 pin when selected as output source. Figure 70: GPIOsignal_in Addr:21h GPIOsignal_in Bit Bit Name Default Access 4 gpio5_in b0 RO This bit reflects the logic level of the GPIO5 pin when configured as digital input pin. 3 gpio4_in b0 RO This bit reflects the logic level of the GPIO4 pin when configured as digital input pin. 2 gpio3_in b0 RO This bit reflects the logic level of the GPIO3 pin when configured as digital input pin. 1 gpio2_in b0 RO This bit reflects the logic level of the GPIO2 pin when configured as digital input pin. 0 gpio1_in b0 RO This bit reflects the logic level of the GPIO1 pin when configured as digital input pin. ams Datasheet [v1-07] 2016-Apr-05 Bit Description Page 65 Document Feedback AS3701 − Register Description Figure 71: Reg1_Voltage Addr:22h Bit 6:0 Bit Name Reg1_voltage Reg1_Voltage Default b0000000 Access Bit Description RW This register is mapped to the register address 0h+Reg1_ select , if gioX_iosf=5 or 6 (Vselect input), and input = 1. This feature allows voltage switching of a predefined regulator with just one GPIO input 0 ..7Fh: Selects voltage and ilimit of LDO or DCDC Figure 72: Reg2_Voltage Addr:23h Bit 6:0 Bit Name Reg2_voltage Reg2_Voltage Default b0000000 Access Bit Description RW This register is mapped to the register address 0h+Reg1_ select , if gioX_iosf=5 or 6 (Vselect input), and input = 1. This feature allows voltage switching of a predefined regulator with just one GPIO input 0 ..7Fh: Selects voltage and ilimit of LDO or DCDC Figure 73: Reg_Control Addr:24h Bit 5:4 1:0 Bit Name Reg2_select Reg1_select Page 66 Document Feedback Reg_Control Default b0000 b0000 Access Bit Description RW Select regulator for mapping of Reg2_voltage; 0 : NA 1 : Select 01h SD1Voltage 2 : Select 02h LDO1Voltage 3 : Select 03h LDO2Voltage RW Select regulator for mapping of Reg1_voltage; 0 : NA 1 : Select 01h SD1Voltage 2 : Select 02h LDO1Voltage 3 : Select 03h LDO2Voltage ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Register Description Figure 74: GPIO_ctrl1 Addr:25h Bit 6:4 2:0 Bit Name gpio_ctrl_ldo2 gpio_ctrl_ldo1 GPIO_ctrl1 Default b000 b000 Access Bit Description RW 0 : No GPIO control 1 : Controlled by GPIO1 2 : Controlled by GPIO2 3 : Controlled by GPIO3 4 : Controlled by GPIO4 5 : Controlled by GPIO5 6 : NA 7 : NA RW 0 : No GPIO control 1 : Controlled by GPIO1 2 : Controlled by GPIO2 3 : Controlled by GPIO3 4 : Controlled by GPIO4 5 : Controlled by GPIO5 6 : NA 7 : NA Figure 75: GPIO_ctrl2 Addr:26h Bit 2:0 Bit Name gpio_ctrl_sd1 ams Datasheet [v1-07] 2016-Apr-05 GPIO_ctrl2 Default b000 Access RW Bit Description 0 : No GPIO control 1 : Controlled by GPIO1 2 : Controlled by GPIO2 3 : Controlled by GPIO3 4 : Controlled by GPIO4 5 : Controlled by GPIO5 6 : NA 7 : NA Page 67 Document Feedback AS3701 − Register Description Figure 76: SD_control1 Addr:30h SD_control1 Bit Bit Name Default Access 7 sd1_enable b1 RW Global stepdown SD1 enable 0 : SD1 disabled 1 : SD1 enabled RW Enables low noise mode of SD1. If enabled smaller current pulses and output ripple is activated 0 : Normal mode. Minimum current pulses of >100mA applied in skip mode 1 : Low noise mode. Only minimum on time applied in skip mode 6 sd1_low_ noise b0 Bit Description 5 sd1_fast b0 RW_SM Selects a faster regulation mode for SD1 suitable for larger load changes. 0 : Normal mode, Cext=10uF 1 : Fast mode, Cext=22uF required 4 sd1_fsel b0 RW_SM Selects between high and low frequency range 0 : 1 MHz if sd1_frequ=0, 3MHz if sd1_frequ=1 1 : 2 MHz if sd1_frequ=0, 4MHz if sd1_frequ=1 1 dvm_enable b0 RW Enabling of Dynamic Voltage Management If voltage of SD1 is changed during operation (sd1_vsel) voltage is de/increased by single steps 0 : DVM disabled 1 : DVM enabled 0 dvm_time b0 RW Time steps of DVM voltage change of SD1 0 : 8 usec time delay between steps 1 : 16 usec time delay between steps Page 68 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Register Description Figure 77: Battery_voltage_monitor Addr:32h Battery_voltage_monitor Bit Bit Name Default Access 7 FastResEn b0 RW 6 SupResEn b0 RW_SM 0 : A reset is generated if VSUP falls below 2.7V (1) 1 : A reset is generated if VSUP falls below ResVoltFall RW_SM This value determines the reset level ResVoltFall for falling VBAT. It is recommended to set this value at least 200mV lower than ResVoltRise 0 : 2.7V 1 : 2.9V 2 : 3.1V 3 : 3.2V 4 : 3.3V 5 : 3.4V 6 : 3.5V 7 : 3.6V RO This value determines the reset level ResVoltRise for rising VBAT. It is recommended to set this value at least 200mV higher than ResVoltFall 0 : 2.7V 1 : 2.9V 2 : 3.1V 3 : 3.2V 4 : 3.3V 5 : 3.4V 6 : 3.5V 7 : 3.6V 5:3 2:0 ResVoltFall ResVoltRise b000 b001 Bit Description 0 : Vresetfall debounce time = 3msec 1 : Vresetfall debounce time = 64usec Note(s): 1. If VBAT falls below ResVoltFall only an interrupt is generated (if enabled) and the uProcessor can shut down the system. ams Datasheet [v1-07] 2016-Apr-05 Page 69 Document Feedback AS3701 − Register Description Figure 78: Startup_Control Addr:33h Bit 7 Bit Name chg_pwr_off_ en 6 power_off_at_ vsuplow 5 stby_reset_ disable 4 3:2 1:0 auto_off off_delay res_timer Page 70 Document Feedback Startup_Control Default b0 b0 b0 b0 b01 b00 Access Bit Description RO Select charger detection in power OFF mode Read only (OTP setting) 0 : Exit of Power OFF mode, if charger is detected (level detection) 1 : Exit of Power OFF mode, if charger insertion is detected (rising edge detection) RW_SM Switch ON Power OFF mode if low VSUP is detected during active or standby mode (Pin ON= low and bit auto_off=0) 0 : If low battery is detected, continuously monitor battery voltage and startup if battery voltage is above ResVoltRise 1 : If low battery is detected, enter power OFF mode RW Disable Reset output signal (PIN XRES) in standby mode 0 : Normal mode, reset is active in standby mode 1 : No reset in standby mode and during exit of standby mode RO Defines startup behavior at first battery insertion 0 : Startup of chip if VBAT>ResVoltRise 1 : Enter power OFF mode (Startup with ON key or charger insertion) RW Set Delay between I²C command, GPIO or Reset signal for power_off, standby mode or reset and execution of that command 0 : No delay 1 : 8 msec (default) 2 : 16 msec 3 : 32 msec RW_SM Set RESTime, after the last regulator has started 0 : RESTIME=10ms (default) 1 : RESTIME=50ms 2 : RESTIME=100ms 3 : RESTIME=150ms ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Register Description Figure 79: ReferenceControl Addr:35h ReferenceControl Bit Bit Name Default Access 7 on_lpress_ delay b0 RW_SM Sets the ON reset delay time 0 : 8 sec (if onkey_lpress_en=1) 1 : 4 sec (if onkey_lpress_en=1) 6 on_tast_sw b0 RO Selects mode of ON input 0 : ON key works as push-button 1 : ON key works as switch 5 4 3:2 1:0 onkey_lpress_ reset standby_ mode_on clk_int pwm_div ams Datasheet [v1-07] 2016-Apr-05 b0 b0 b00 b00 Bit Description RW_SM Selects behavior for ONKEY longpress 0 : Long onkey press forces change to power_off mode (if on_tast_sw=0 and onkey_lpress_en=1) 1 : Long onkey press forces a reset (if on_tast_sw=0 and onkey_lpress_en=1) RW_SM Setting to 1 sets the PMU into standby mode. All regulators are disabled except those regulators enabled by Reg_standby_mod. XRES will be pulled to low. A normal startup of all regulators will be done with any interrupt (has to be enabled before entering standby mode). R_PUSH Sets the internal CLK frequency fCLK used for DCDCs, PWM, ... 0 : 4 MHz (default) 1 : 3.8 MHz 2 : 3.6 MHz 3 : 3.4 MHz All frequencies, timings and delays in this datasheet are based on 4MHz clk_int RW This bit defines the divider ratio of the prescaler for the PWM generator 0 : Divide by 1 1 : Divide by 2 2 : Divide by 4 3 : Divide by 16 Page 71 Document Feedback AS3701 − Register Description Figure 80: ResetControl Addr:36h Bit Bit Name ResetControl Default Access Bit Description 7:4 reset_reason b0000 RW_SM Flags to indicate to the software the reason for the last reset 0 : VPOR has been reached (battery or charger insertion from scratch) 1 : ResVoltFall was reached (battery voltage drop below 2.75V) 2 : Software forced by force_reset 3 : Software forced by power_off and ON was pulled high 4 : Software forced by power_off and charger was detected 5 : External triggered through the pin XRES 6 : Reset caused by overtemperature T140 7 : NA 8 : Reset caused by 4/8 seconds ON key press 9 : NA 10 : NA 11 : Reset caused by interrupt in standby mode 12 : Reset caused by ON pulled high in standby mode 3 onkey_lpress_ en b0 RW_SM 0 : ONKEY longpress feature disabled 1 : ONKEY longpress feature enabled 2 on_input b0 R_PUSH Read:This flag represents the state of the ON pad directly Write: Setting to 1 resets the 4/8 sec. Onkey longpress timer 1 power_off b0 RW_SM Setting to 1 starts a reset cycle, but waits after the Reg_off state for a falling edge on the pin ON or until the charger is detected 0 force_reset b0 RW Page 72 Document Feedback Setting to 1 starts a complete reset cycle ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Register Description Figure 81: OvertemperatureControl Addr:37h OvertemperatureControl Bit Bit Name Default Access 7 tco_140_a b0 RO Only used for production test 6 tco_110_a b0 RO Only used for production test 5:4 temp_test b00 RW   RW If the overtemperature threshold 2 has been reached, the flag ov_temp_140 is set and a reset cycle is started. ov_temp_140 should be reset by writing 1 and afterwards 0 to rst_ov_temp_140 3 rst_ov_temp_140 b0 Bit Description 2 ov_temp_140 b0 RO Flag that the overtemperature threshold 2 (T140) has been reached - this flag is not reset by a overtemperature caused reset and has to be reset by rst_ov_temp_140 1 ov_temp_110 b0 RO Flag that the overtemperature threshold 1 (T110) has been reached 0 temp_pmc_on b1 RW Switch ON/OFF of temperature supervision; default: ON - all other bits are only valid if set to 1 Leave at 1, do not disable Figure 82: Reg_standby_mod1 Addr:39h Bit Bit Name Reg_standby_mod1 Default Access Bit Description 3 disable_regpd b0 RW This bit disables the pulldown of all regulators 0 : Normal operation approx. 1kohm pulldown of all regulators 1 : Pulldown disabled >100kohm of all regulators 2 sd1_stby_on b0 RW Enable Step down 1 in standby mode 1 ldo2_stby_on b0 RW Enable LDO2 in standby mode 0 ldo1_stby_on b0 RW Enable LDO1 in standby mode ams Datasheet [v1-07] 2016-Apr-05 Page 73 Document Feedback AS3701 − Register Description Figure 83: pwm_control_l Addr:41h Bit 7:0 Bit Name pwm_l_time pwm_control_l Default b00000000 Access RW Bit Description This bit defines the low time of the pwm generator in 1MHz units 0 : pwm_div * 1usec 1 : pwm_div * 2usec 2 : pwm_div * 3usec ... : ... 255 : pwm_div * 256usec Figure 84: pwm_control_h Addr:42h Bit 7:0 Bit Name pwm_h_time pwm_control_h Default b00000000 Access RW Bit Description This bit defines the high time of the pwm generator in 1MHz units 0 : pwm_div * 1usec 1 : pwm_div * 2usec 2 : pwm_div * 3usec ... : ... 255 : pwm_div * 256usec Figure 85: curr1_value Addr:43h Bit 7:0 Bit Name curr1_current Page 74 Document Feedback curr1_value Default b00000000 Access RW Bit Description Defines the current into CURR1 if gpio1_mode = 7 0 : Power down (default state) 1 : 0.15686mA (LSB) ... : ... 255 : 40mA ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Register Description Figure 86: curr2_value Addr:44h Bit 7:0 Bit Name curr2_current curr2_value Default b00000000 Access RW Bit Description Defines the current into CURR2 if gpio2_mode = 7 0 : Power down (default state) 1 : 0.15686mA (LSB) ... : ... 255 : 40mA Figure 87: RegStatus Addr:73h RegStatus Bit Bit Name Default Access Bit Description 6 curr2_lv b0 RO Bit is set when voltage of current sink CURR2 drops below low voltage threshold (1ms debounce time default) 5 curr1_lv b0 RO Bit is set when voltage of current sink CURR1 drops below low voltage threshold (1ms debounce time default) 0 sd1_lv b0 RO Bit is set when voltage of step down1 drops below low voltage threshold (-5%) (1ms debounce time default) Figure 88: InterruptMask1 Addr:74h InterruptMask1 Bit Bit Name Default Access 7 LowBat_int_m b1 RW Rising edge only 6 ovtmp_int_m b1 RW Rising edge only 5 onkey_int_m b1 RW Rising and falling edge 4 chdet_int_m b1 RW Rising and falling edge 3 eoc_int_m b1 RW Rising and falling edge 2 resume_int_m b1 RW Rising and falling edge 1 nobat_int_m b1 RW Rising and falling edge 0 trickle_int_m b1 RW Rising and falling edge ams Datasheet [v1-07] 2016-Apr-05 Bit Description Page 75 Document Feedback AS3701 − Register Description Figure 89: InterruptMask2 Addr:75h InterruptMask2 Bit Bit Name Default Access Bit Description 7 gpio5_int_m b1 RW Rising and falling edge 6 gpio4_int_m b1 RW Rising and falling edge 5 gpio3_int_m b1 RW Rising and falling edge 4 gpio2_int_m b1 RW Rising and falling edge 3 gpio1_int_m b1 RW Rising and falling edge 2 gpio_restart_int_m b1 RW Falling edge only 1 sd1_lv_int_m b1 RW Rising edge only 0 bat_temp_m b1 RW Rising and falling edge Figure 90: InterruptStatus1 Addr:77h InterruptStatus1 Bit Bit Name Default Access 7 LowBat_int_i b0 RO Bit is set when VSUP drops below ResVoltFall 6 ovtmp_int_i b0 RO Bit is set when 110deg is exceeded 5 onkey_int_i b0 RO   4 chdet_int_i b0 RO   3 eoc_int_i b0 RO   2 resume_int_i b0 RO   1 nobat_int_i b0 RO   0 trickle_int_i b0 RO   Page 76 Document Feedback Bit Description ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Register Description Figure 91: InterrupStatus2 Addr:78h InterrupStatus2 Bit Bit Name Default Access 7 gpio5_int_i b0 RO   6 gpio4_int_i b0 RO   5 gpio3_int_i b0 RO   4 gpio2_int_i b0 RO   3 gpio1_int_i b0 RO   2 gpio_restart_int_i b0 RO   1 sd1_lv_int_i b0 RO   0 bat_temp_i b0 RO   ams Datasheet [v1-07] 2016-Apr-05 Bit Description Page 77 Document Feedback AS3701 − Register Description Figure 92: ChargerControl Addr:80h Bit Bit Name 7 cc_range_ select ChargerControl Default b0 Access Bit Description RW Defines the charging current range for constant current mode 0 : High current range 1 : Low current range 6 AutoResume b0 RW 0 : Charging does not restart automatically in EOC when bit Resume is set. 1 : Charging will restart automatically in EOC when bit Resume is set and vbat is below resume level 5 bat_charging_ enable b0 RW 0 : USB is supplying VSUP, but battery switch is open. USB charger regulates to Vsup_voltage 1 : Normal battery charger operation form usb charger 4 usb_chgEn b1 RW ON/OFF control of USB charger input RW Sets the USB input current limit. 0 : 94mA (default) 1 : 141mA 2 : 189mA 3 : 237mA 4 : 285mA 5 : 332mA 6 : 380mA 7 : 428mA 8 : 470mA 9 : 517mA 10 : 600mA 11 : 764mA 12 : 889mA 13 : 1065mA 14 : NA 15 : NA 3:0 usb_Current Page 78 Document Feedback b0000 ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Register Description Figure 93: ChargerVoltageControl Addr:81h Bit 7:6 4:0 Bit Name Vsup_min ChVoltEOC ams Datasheet [v1-07] 2016-Apr-05 ChargerVoltageControl Default b01 b10011 Access Bit Description RW Regulate down battery charging current on that level of Vsup during trickle charging and constant current charging, to prevent voltage drop on vsup: 0 : 3.90V 1 : 4.20V (default) 2 : 4.50V 3 : 4.70V RW Sets the end-of-charge voltage level VCHOFF. 0 : 3.82V 1 : 3.84V ... 19 : 4.20V (default) ... 31 : 4.44V Page 79 Document Feedback AS3701 − Register Description Figure 94: ChargerCurrentControl Addr:82h Bit 7:4 3:0 Bit Name TrickleCurrent Constant Current Page 80 Document Feedback ChargerCurrentControl Default b0000 b0000 Access Bit Description RW Sets the charging current limit in trickle current mode. 0 : 11mA (default) 1 : 23mA 2 : 35mA 3 : 47mA 4 : 59mA 5 : 70mA 6 : 82mA 7 : 94mA 8 : 106mA 9 : 118mA 10 : 130mA 11 : NA 12 : NA 13 : NA 14 : NA 15 : NA RW Sets the charging current limit in constant current mode. 0 : 44mA if cc_range_select=0, 11mA if cc_range_select=1 (default) 1 : 88mA if cc_range_select=0, 23mA if cc_range_select=1 2 : 133mA if cc_range_select=0, 35mA if cc_range_ select=1 3 : 178mA if cc_range_select=0, 47mA if cc_range_ select=1 4 : 223mA if cc_range_select=0, 59mA if cc_range_ select=1 5 : 268mA if cc_range_select=0, 70mA if cc_range_ select=1 6 : 313mA if cc_range_select=0, 82mA if cc_range_ select=1 7 : 358mA if cc_range_select=0, 94mA if cc_range_ select=1 8 : 403mA if cc_range_select=0, 106mA if cc_range_ select=1 9 : 448mA if cc_range_select=0, 118mA if cc_range_ select=1 10 : 494mA if cc_range_select=0, 130mA if cc_range_ select=1) 11 : NA 12 : NA 13 : NA 14 : NA 15 : NA ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Register Description Figure 95: ChargerConfig1 Addr:83h Bit Bit Name ChargerConfig1 Default Access Bit Description 7 Charging_ 1Hz_clk b0 RW Sets the mode for the charging output status (gpioX_iosf = 10) 0 : Normal operation: charging=1, not charging=0 1 : 1Hz blinking operation: charging=1Hz, not charging=0 6 ChVolt Resume b0 RW Sets the resume voltage level VCHRES 0 : 3.33% of ChVoltEOC (140mV default) 1 : 5.56% of ChVoltEOC (233mV default) RW Selects temperature regulation of charging current (die temp.) 0 : 120degC 1 : 130degC 2 : 110degC 3 : 90degC RW Voltage regulation of VSUP of the input current limiter 0 : 4.4V 1 : 4.5V 2 : 4.6V 3 : 4.7V 4 : 4.8V (default) 5 : 4.9V 6 : 5.0V 7 : 5.5V 5:4 3:1 temp_sel vsup_voltage ams Datasheet [v1-07] 2016-Apr-05 b00 b100 Page 81 Document Feedback AS3701 − Register Description Figure 96: ChargerConfig2 Addr:84h Bit Bit Name ChargerConfig2 Default Access 7:5 eoc_current b001 RW 4 charging_tmax b0 R_PUSH 3:0 ch_timeout Page 82 Document Feedback b0111 RW Bit Description Sets eoc current 0 : 5% of ConstantCurrent 1 : 10% of ConstantCurrent (default) 2 : 15% of ConstantCurrent 3 : 20% of ConstantCurrent 4 : 25% of ConstantCurrent 5 : 30% of ConstantCurrent 6 : 40% of ConstantCurrent 7 : 50% of ConstantCurrent Write: reset charger timeout counter 0 : Read: no timeout reached 1 : Charging timeout reached and charging stopped Charging timeout timer 0 : OFF 1 : 0.5h 2 : 1h 3 : 1.5h 4 : 2h 5 : 2.5h 6 : 3h 7 : 3.5h(default) 8 : 4h 9 : 4.5h 10 : 5h 11 : 5.5h 12 : 6h 13 : 6.5h 14 : 7h 15 : 7.5h ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Register Description Figure 97: ChargerSupervision Addr:85h Bit 7 Bit Name ntc_high_on ChargerSupervision Default b1 Access Bit Description RW Enables the battery high temperature supervision via NTC resistor (depends on ntc_mode) 0 : NTC battery 45/60deg temp supervision disabled 1 : NTC battery 45/60deg temp supervision enabled 6 ntc_low_on b0 RW Enables the battery low temperature supervision via NTC resistor 0 : NTC battery 0deg temp supervision disabled 1 : NTC battery 0deg temp supervision enabled 5 ntc_10k b0 RW Select NTC resistor 0 : 100k (ntc_current = 15uA) 1 : 10k (ntc_current = 150uA) RW Defines the temperature level for the battery high temperature supervision 0 : 45deg 1 : 60deg RW Defines the NTC input 0 : no NTC input 1 : XIRQ_NTC pin 2 : GPIO3 pin 3 : GPIO4 pin RW Sets the ntc beta 0 : 3000 (0deg:1.41V & 45deg:0.59V/60deg:0.42V) 1 : 3500 (0deg:1.49V & 45deg:0.54V/60deg:0.37V) 2 : 4000 (0deg:1.56V & 45deg:0.50V/60deg:0.31V) 3 : 4500 (0deg:1.63V & 45deg:0.46V/60deg:0.27V) 4 3:2 1:0 ntc_mode NTC_input ntc_beta ams Datasheet [v1-07] 2016-Apr-05 b0 b00 b00 Page 83 Document Feedback AS3701 − Register Description Figure 98: ChargerStatus1 Addr:86h ChargerStatus1 Bit Bit Name Default Access Bit Description 7 NoBat b0 R Bit is set when battery detection circuit indicates that no battery is connected to the system. 6:5 temp_cond b00 R Indicates temperature condition 0 : Battery is in typical condition (0deg < battemp < 45/60deg) 1 : Battery is in cold condition (battemp < 0deg) 2 : Battery is in hot condition (battemp > 45/60deg) 3 : NA 4 EOC b0 R Bit is set if End of charge state has been reached 3 CVM b0 R Bit is set if charger is operating in constant voltage mode 2 Trickle b0 R Bit is set, if charger is operating in trickle current. Vbat0 writing stepdown voltage to 0 should be possible all the time to allow switching ON the regulator. Writing a nonzero value after that should restore the old value 0 : No lock 1 : Lock of voltage of LDOs (LDOx_vsel) (all bits) and voltage of StepDownBits(sdx_vsel) [5:6] only 2 : Lock voltage of StepDownBits(sdx_vsel) [5:6] only 3 : Lock voltage of StepDown (all bits) and LDOs (all bits). Figure 101: ASIC_ID1 Addr:90h ASIC_ID1 Bit Bit Name Default Access 7:0 ID1 b00010001 RO Bit Description   Figure 102: ASIC_ID2 Addr:91h ASIC_ID2 Bit Bit Name Default Access 3:0 revision b0000 RO ams Datasheet [v1-07] 2016-Apr-05 Bit Description   Page 85 Document Feedback AS3701 − Register Description Figure 103: Fuse5 Addr:a5h Fuse5 Bit Bit Name Default Access Bit Description 7 del_time b0 RW   6 sequ_on b0 RW   Figure 104: Fuse6 Addr:a6h Fuse6 Bit Bit Name Default Access Bit Description 2 on_tast_sw b0 RW Selects mode of ON input 0 : ON key works as push-button 1 : ON key works as switch 1 onkey_lpress_ reset b0 RW Selects behavior for ONKEY longpress 0 : Long onkey press forces change to power_off mode (if on_tast_sw=0 and onkey_lpress_en=1) 1 : Long onkey press forces a reset (if on_tast_sw=0 and onkey_lpress_en=1) 0 on_invert b0 RW Inverts the ON input 0 : ON input is active high (default) 1 : ON input is active low Page 86 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Register Description Figure 105: Fuse7 Addr:a7h Bit Bit Name 7 auto_off 6 chg_pwr_off_ en Fuse7 Default b0 b0 Access Bit Description RW Defines startup behavior at first battery insertion 0 : Startup of chip if VBAT>ResVoltRise 1 : Enter power OFF mode (Startup with ON key or charger insertion) RW Enable power OFF mode, if charger is detected 0 : Exit of Power OFF mode, if charger is detected (level) 1 : Exit of Power OFF mode, if charger insertion is detected (rising edge only) 5:4 res_timer b00 RW Set RESTime, after the last regulator has started 0 : RESTIME=10ms 1 : RESTIME=50ms 2 : RESTIME=100ms 3 : RESTIME=150ms 3 sd1_fsel b0 RW Selects between high and low frequency range 0 : 1 MHz if sd1_frequ=0, 3MHz if sd1_frequ=1 1 : 2 MHz if sd1_frequ=0, 4MHz if sd1_frequ=1 RW Selects a faster regulation mode for SD1 suitable for larger load changes. 0 : Normal mode, Cext=10uF 1 : Fast mode, Cext=22uF required 2 sd1_fast b0 1 power_off_at_ vsuplow b0 RW Switch ON Power OFF mode if low VSUP is detected during active or standby mode (Pin ON= low and bit auto_off=0) 0 : If low battery is detected, continuously monitor battery voltage and startup if battery voltage is above ResVoltrise 1 : If low battery is detected, enter power OFF mode 0 i2c_deva_bit1 b0 RW   ams Datasheet [v1-07] 2016-Apr-05 Page 87 Document Feedback AS3701 − Register Description Figure 106: Fuse8 Addr:a8h Bit 7:4 Bit Name usb_current Fuse8 Default b0000 Access Bit Description RW Sets the USB input current limit. 0 : 94mA (default) 1 : 141mA 2 : 189mA 3 : 237mA 4 : 285mA 5 : 332mA 6 : 380mA 7 : 428mA 8 : 470mA 9 : 517mA 10 : 600mA 11 : 764mA 12 : 889mA 13 : 1065mA 14 : NA (1065mA) 15 : NA (1065mA) 3:1 ResVoltRise b000 RW This value determines the reset level ResVoltRise for rising VBAT. ResVoltFall is set to ResVoltRise-200mV by default 0 : 2.7V 1 : 2.9V 2 : 3.1V 3 : 3.2V 4 : 3.3V 5 : 3.4V 6 : 3.5V 7 : 3.6V 0 on_lpress_delay b0 RW Selects default state of the bit on_lpress_delay Page 88 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Register Description Figure 107: Fuse9 Addr:a9h Fuse9 Bit Bit Name Default Access 7 Reg4_del b0 RW Define delay for timeslot4 (regulator 4) 6 Reg3_del b0 RW Define delay for timeslot3 (regulator 3) 5 Reg2_del b0 RW Define delay for timeslot2 (regulator 2) 4 Reg1_del b0 RW Define delay for timeslot1 (regulator 1) 3 SupResEn b0 RW Presets that bit 2 onkey_lpress_en b0 RW Select default state of the onkey_lpress_en RW Defines the NTC input 0 : No NTC input 1 : XIRQ_NTC pin 2 : GPIO3 pin 3 : GPIO4 pin 1:0 NTC_input ams Datasheet [v1-07] 2016-Apr-05 b00 Bit Description Page 89 Document Feedback AS3701 − Register Description Figure 108: Fuse10 Addr:aah Bit 7:4 3:0 Bit Name Reg2_addr Reg1_addr Fuse10 Default b0000 b0000 Access Bit Description RW Define startup regulator 2 0 : NA (00h) 1 : SD1 (01h) 2 : LDO1 (02h) 3 : LDO2 (03h) 4 : NA (04h) 5 : NA (05h) 6 : NA (06h) 7 : NA (07h) 8 : NA (08h) 9 : GPIO1 (09h) 10 : GPIO2 (0ah) 11 : GPIO3 (0bh) 12 : GPIO4 (0ch) 13 : GPIO5 (0dh) 14 : NA (0eh) 15 : NA (0fh) RW Define startup regulator 1 0 : NA (00h) 1 : SD1 (01h) 2 : LDO1 (02h) 3 : LDO2 (03h) 4 : NA (04h) 5 : NA (05h) 6 : NA (06h) 7 : NA (07h) 8 : NA (08h) 9 : GPIO1 (09h) 10 : GPIO2 (0ah) 11 : GPIO3 (0bh) 12 : GPIO4 (0ch) 13 : GPIO5 (0dh) 14 : NA (0eh) 15 : NA (0fh) Figure 109: Fuse11 Addr:abh Fuse11 Bit Bit Name Default Access 7:0 reg1_V b00000000 RW Page 90 Document Feedback Bit Description Define startup voltage for regulator 1 ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Register Description Figure 110: Fuse12 Addr:ach Fuse12 Bit Bit Name Default Access 7:0 reg2_V b00000000 RW Bit Description Define startup voltage for regulator 2 Figure 111: Fuse13 Addr:adh Bit 7:4 3:0 Bit Name Reg4_addr Reg3_addr ams Datasheet [v1-07] 2016-Apr-05 Fuse13 Default b0000 b0000 Access Bit Description RW Define startup regulator 4 0 : NA (00h) 1 : SD1 (01h) 2 : LDO1 (02h) 3 : LDO2 (03h) 4 : NA (04h) 5 : NA (05h) 6 : NA (06h) 7 : NA (07h) 8 : NA (08h) 9 : GPIO1 (09h) 10 : GPIO2 (0ah) 11 : GPIO3 (0bh) 12 : GPIO4 (0ch) 13 : GPIO5 (0dh) 14 : NA (0eh) 15 : NA (0fh) RW Define startup regulator 3 0 : NA (00h) 1 : SD1 (01h) 2 : LDO1 (02h) 3 : LDO2 (03h) 4 : NA (04h) 5 : NA (05h) 6 : NA (06h) 7 : NA (07h) 8 : NA (08h) 9 : GPIO1 (09h) 10 : GPIO2 (0ah) 11 : GPIO3 (0bh) 12 : GPIO4 (0ch) 13 : GPIO5 (0dh) 14 : NA (0eh) 15 : NA (0fh) Page 91 Document Feedback AS3701 − Register Description Figure 112: Fuse14 Addr:aeh Fuse14 Bit Bit Name Default Access 7:0 reg3_V b00000000 RW Bit Description Define startup voltage for regulator 3 Figure 113: Fuse15 Addr:afh Fuse15 Bit Bit Name Default Access 7:0 reg4_V b00000000 RW Page 92 Document Feedback Bit Description Define startup voltage for regulator 4 ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Application Information Application Information Figure 114: Application Schematic *1' *1' 4.7μF *1' 10μF *1' 2.2μF *1' % 9683B&+* 9%$7 9683 6'$ 6&/ XIRQ_NTC % ON ' XRES ' SDA & SCL ' ;,54B17& 21 ;5(6 6'$ 6&/ 10M $ ;5(6 *1' /'2V 3RZHU3DWK *1' ;,54B17& 9683 10μF &KDUJHU 4.7μF /'2 /'2 $ *1' 2.2μF *1' $ 9683 9683B6' '&'& $ 1M0 986% /;B6' )%B6' 966B6' 6LQNV $ LDO2 2.2μF  Micro-PMIC 9%$7 /RJLF &RQWURO 9683 *3,2V 986% LDO1 AS3701 *3,2B&855 *3,2B&855 *3,2B17& *3,2B17& *3,2 2.2μF ' ' 1μH LX SD1 % FB 10μF & & GPIO1 % GPIO2 % GPIO3 & GPIO4 & GPIO5 *1' *3,2 *3,2 *3,2 *3,2 *3,2 *1' 21 10K *1' ams Datasheet [v1-07] 2016-Apr-05 Page 93 Document Feedback AS3701 − Application Information                                                             Figure 115: Layout Guidelines for AS3701A Page 94 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Application Information LDO2 COUT GND GND CVUSB CVSUP COUT CVBAT LDO1 VUSB VSUP GND GND LDO1 CVUSB CVSUP LDO2 Figure 116: Layout Guidelines for AS3701B GND XIRQ_NTC VBAT A1 A2 A3 A4 A5 GND B1 B2 B3 B4 B5 GPIO2_CURR2 C1 C2 C3 C4 C5 GPIO1_CURR1 D1 D2 D3 D4 D5 SD1 ams Datasheet [v1-07] 2016-Apr-05 SCL CIN GPIO4 L1 XRES LX SDA LX ON SD1 FB_SD1 GPIO5 FB COUT VSS_SD1 SD1 GND VSUP_SD1 GPIO3 GND Page 95 Document Feedback Page 96 Document Feedback 3. All dimensions are in μm 2. ccc Coplanarity 1. Pin 1 = A1 Note(s): Figure 117: CSP-17 0.4mm Pitch Package Drawing Package Drawings & Markings ams Datasheet [v1-07] 2016-Apr-05 Green RoHS A S 3 7 0 1 − Pack age Drawings & Markings ams Datasheet [v1-07] 2016-Apr-05 3. All dimensions are in μm 2. ccc Coplanarity 1. Pin 1 = A1 Note(s): Figure 118: CSP-20 0.4mm Pitch Package Drawing A S 3 7 0 1 − Package Drawings & Markings Page 97 Document Feedback Green RoHS AS3701 − Package Drawings & Mark ings Figure 119: AS3701A Marking AS3701A Marking: Shows the package marking of the AS3701A product version 3701A 1V1-zz XXXX Figure 120: AS3701B Marking AS3701B Marking: Shows the package marking of the AS3701B product version 3701B 1V1-zz XXXX Figure 121: Package Code XXXX Trace code Page 98 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Package Drawings & Markings Figure 122: Start-Up Revision Code 1V1-zz Sequence 1V1-ES Engineering samples, no sequence programmed or sequence programmed on request 1V1-00 Standard programming (no sequence programmed) 1V1-?? Other customer specified sequence programmed during production test (1) Start-Up Revision Code: Shows the coding of the different startup sequences Note(s): 1. Dedicated OTP startup sequence settings available upon request. Please contact www.ams.com/Technical-Support ams Datasheet [v1-07] 2016-Apr-05 Page 99 Document Feedback AS3701 − Ordering & Contact Information Ordering & Contact Information Figure 123: Ordering Information Marking OTP Programming Delivery Form Package AS3701A-BWLT-ES 3701A 1V1-ES Sequence programmable on request T&R 17-Ball WL-CSP AS3701A-BWLT-?? 3701A 1V1-?? Customer specified sequence T&R 17-Ball WL-CSP AS3701B-BWLT-ES 3701B 1V1-ES Sequence programmable on request T&R 20-Ball WL-CSP AS3701B-BWLT-00 3701B 1V1-00 Default sequence T&R 20-Ball WL-CSP AS3701B-BWLT-?? 3701B 1V1-?? Customer specified sequence T&R 20-Ball WL-CSP Ordering Code Buy our products or get free samples online at: www.ams.com/ICdirect Technical Support is available at: www.ams.com/Technical-Support Provide feedback about this document at: www.ams.com/Document-Feedback For further information and requests, e-mail us at: ams_sales@ams.com For sales offices, distributors and representatives, please visit: www.ams.com/contact Headquarters ams AG Tobelbaderstrasse 30 8141 Premstaetten Austria, Europe Tel: +43 (0) 3136 500 0 Website: www.ams.com Page 100 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − RoHS Compliant & ams Green Statement RoHS Compliant & ams Green Statement RoHS: The term RoHS compliant means that ams AG products fully comply with current RoHS directives. Our semiconductor products do not contain any chemicals for all 6 substance categories, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, RoHS compliant products are suitable for use in specified lead-free processes. ams Green (RoHS compliant and no Sb/Br): ams Green defines that in addition to RoHS compliance, our products are free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material). Important Information: The information provided in this statement represents ams AG knowledge and belief as of the date that it is provided. ams AG bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. ams AG has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. ams AG and ams AG suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. ams Datasheet [v1-07] 2016-Apr-05 Page 101 Document Feedback AS3701 − Copyrights & Disclaimer Copyrights & Disclaimer Copyright ams AG, Tobelbader Strasse 30, 8141 Premstaetten, Austria-Europe. Trademarks Registered. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner. Devices sold by ams AG are covered by the warranty and patent indemnification provisions appearing in its General Terms of Trade. ams AG makes no warranty, express, statutory, implied, or by description regarding the information set forth herein. ams AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior to designing this product into a system, it is necessary to check with ams AG for current information. This product is intended for use in commercial applications. Applications requiring extended temperature range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or life-sustaining equipment are specifically not recommended without additional processing by ams AG for each application. This product is provided by ams AG “AS IS” and any express or implied warranties, including, but not limited to the implied warranties of merchantability and fitness for a particular purpose are disclaimed. ams AG shall not be liable to recipient or any third party for any damages, including but not limited to personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of ams AG rendering of technical or other services. Page 102 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Document Status Document Status Document Status Product Preview Preliminary Datasheet Datasheet Datasheet (discontinued) ams Datasheet [v1-07] 2016-Apr-05 Product Status Definition Pre-Development Information in this datasheet is based on product ideas in the planning phase of development. All specifications are design goals without any warranty and are subject to change without notice Pre-Production Information in this datasheet is based on products in the design, validation or qualification phase of development. The performance and parameters shown in this document are preliminary without any warranty and are subject to change without notice Production Information in this datasheet is based on products in ramp-up to full production or full production which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade Discontinued Information in this datasheet is based on products which conform to specifications in accordance with the terms of ams AG standard warranty as given in the General Terms of Trade, but these products have been superseded and should not be used for new designs Page 103 Document Feedback AS3701 − Revision Information Revision Information Changes from 1-06 (2015-Nov-19) to current revision 1-07 (2016-Apr-05) Page Updated Figure 44 37 Updated Figure 49 43 Note(s): 1. Page and figure numbers for the previous version may differ from page and figure numbers in the current revision. 2. Correction of typographical errors is not explicitly mentioned. Page 104 Document Feedback ams Datasheet [v1-07] 2016-Apr-05 AS3701 − Content Guide Content Guide 1 1 2 3 General Description Key Benefits & Features Applications Block Diagram 5 7 9 Pin Assignments Absolute Maximum Ratings Electrical Characteristics 10 Detailed Description – Power Management Functions Step Down Converter Mode Settings Low-Ripple, Low-Noise Operation High-Efficiency Operation (Default Setting) Low Power Mode Operation (Automatically Controlled) Dynamic Voltage Management Fast Regulation Mode Selectable Frequency Operation Parameters Universal IO LDO Regulator Parameters Linear Charger Charging Cycle Description Charge Adapter Detection Low Current (Trickle) Charging Constant Current Charging Constant Voltage Charging Resume Stop Charging Conditions Battery Presence Indication NTC Supervision Configuration NTC Resistor High/Low Temperature NTC ß-Correction Charger High/Low Temperature Supervision Parameters Current Sinks Parameters 10 11 12 14 15 15 16 16 16 19 19 23 25 25 25 25 25 26 27 27 27 27 28 28 28 30 31 32 32 33 33 33 33 36 36 36 36 36 37 37 37 ams Datasheet [v1-07] 2016-Apr-05 Detailed Description – System Functions Start-Up Normal Start-Up Parameter Reset RESET Reasons Voltage Detection Software Forced Reset External Triggered Reset Long ON-Key Press Over-Temperature Reset Parameter Page 105 Document Feedback AS3701 − Content Guide Page 106 Document Feedback 38 38 39 39 39 40 40 40 41 41 41 42 42 42 43 43 43 43 43 44 44 44 45 46 46 46 46 46 47 47 48 48 48 49 49 50 52 Stand-By Enter Via GPIO Enter Via SW Leaving Stand-By Power OFF Voltage Detection Software Forced Power OFF Long ON-Key Press Auto-OFF Internal References GPIO Pins IO Functions Normal IO Operation Interrupt Output VSUP_low Output PWRGOOD Output Charger Active Output EOC Output PWM Output GPIO Interrupt Input Current Sink PWM Input Vselect Input Stand-By and Vselect Input Charger Current Range 1 Charger Current Range 2 100/500mA Charger Input 800/1100mA Charger Input Charging Enable Input Supervisor Temperature Supervision Interrupt Generation Wire-Serial Control Interface Feature List I²C Protocol I²C Write Access I²C Read Access I²C Parameter 53 57 Register Description Detailed Register Description 92 95 99 100 101 102 103 Application Information Package Drawings & Markings Ordering & Contact Information RoHS Compliant & ams Green Statement Copyrights & Disclaimer Document Status Revision Information ams Datasheet [v1-07] 2016-Apr-05