WIZ811MJ

WIZ811MJ Datasheet (Ver. 1.2) © 2013 WIZnet Co., Ltd. All Rights Reserved. For more information, visit our website at www.wiznet.co.kr WIZ811MJ Datasheet Document History Information Revision Ver. 1.0 Ver. 1.1 Data March 11, 2008 January 28, 2009 Ver. 1.2 January 25, 2013 Description Release with WIZ811MJ Launching Added temperature specification Hardware revision(Rev1.1) Changed operation temperature range, Partlist and schematic as H/W revision. 2 TOP WIZ8 10M J Data shee t WIZnet’s Online Technical Support If you have something to ask about WIZnet Products, Write down your question on Q&A Board in WIZnet website (www.wiznet.co.kr). WIZnet Engineer will give an answer as soon as possible. © Copyright 2013 WIZnet Co., Ltd. All rights reserved WIZ811MJ Datasheet Table of Contents 1. Introduction .............................................................................. 4 1.1. 1.2. 1.3. 2. Pin Assignments & descriptions ................................................... 6 2.1. 2.2. 2.3. 2.4. 3. Features ............................................................................. 4 Block Diagram ...................................................................... 4 Difference between WIZ810MJ and WIZ811MJ .............................. 5 Pin Assignments ................................................................... 6 Power & Ground ................................................................... 6 MCU Interfaces ..................................................................... 7 Miscellaneous Signals ............................................................ 8 Timing Diagrams ....................................................................... 9 3.1. 3.2. 3.3. 3.4. Reset Timing ...................................................................... 9 Register/Memory READ Timing ................................................. 9 Register/Memory WRITE Timing .............................................. 10 SPI Timing......................................................................... 10 4. Dimensions ............................................................................. 11 5. Schematic .............................................................................. 12 6. Partlist ................................................................................... 13 © Copyright 2013 WIZnet Co., Ltd. All rights reserved 3 TOP WIZ8 10M J Data shee t WIZ811MJ Datasheet 1. Introduction WIZ811MJ is the network module that includes W5100 (TCP/IP hardwired chip, include PHY), MAG-JACK (RJ45 with X’FMR) with other glue logics. It can be used as a component and no effort is required to interface W5100 and Transformer. The WIZ811MJ is an ideal option for users who want to develop their Internet enabling systems rapidly. For the detailed information on implementation of Hardware TCP/IP, refer to the W5100 Datasheet. WIZ811MJ consists of W5100 and MAG-JACK.  TCP/IP, MAC protocol layer: W5100  Physical layer: Included in W5100  Connector: MAG-JACK(RJ45 with Transformer) 1.1. Features               Supports 10/100 Base TX Supports half/full duplex operation Supports auto-negotiation and auto cross-over detection IEEE 802.3/802.3u Compliance Operates 3.3V with 5V I/O signal tolerance Supports network status indicator LEDs Includes Hardware Internet protocols: TCP, IP Ver.4, UDP, ICMP, ARP, PPPoE, IGMP Includes Hardware Ethernet protocols: DLC, MAC Supports 4 independent connections simultaneously Supports MCU bus Interface and SPI Interface Supports Direct/Indirect mode bus access Supports Socket API for easy application programming Interfaces with two 2.54mm pitch 2 x 10 header pin Temperature : [PCB rev1.0] : 0 ~ 70℃ (Operation), -40 ~ 85℃ (Storage) [PCB rev1.1] : -40 ~ 85℃ (Operation), -40 ~ 85℃ (Storage) 1.2. Block Diagram © Copyright 2013 WIZnet Co., Ltd. All rights reserved 4 TOP WIZ8 10M J Data shee t WIZ811MJ Datasheet 1.3. Difference between WIZ810MJ and WIZ811MJ WIZ810MJ WIZ811MJ 5 Two 2mm pitch 14x2 header Two 2.54mm pitch 10x2 header Not has PCB through Hole Two PCB Through Hole(Ø 3.00mm) 52 x 25 x 21mm (W x H x D) 55.5 x 25 x 23.5mm (W x H x D) Share SPI and BUS signal pin (need to Separate SPI signal pin (SPI_EN control SPI_EN pin) controlled automatically by /SCS signal) © Copyright 2013 WIZnet Co., Ltd. All rights reserved TOP WIZ8 10M J Data shee t WIZ811MJ Datasheet 2. Pin Assignments & descriptions 2.1. Pin Assignments 6 TOP WIZ8 10M J Data shee t I : Input I/O : Bi-directional Input and output O : Output P : Power 2.2. Power & Ground Symbol Type VCC GND P P Pin No. J1:12 , J1:11, J2:19, J2:1 J2:9, J2:20 Description J2:10, © Copyright 2013 WIZnet Co., Ltd. All rights reserved Power : 3.3 V power supply Ground WIZ811MJ Datasheet 2.3. MCU Interfaces Symbol Type Pin No. Description SCLK I J2:3 SCLK(Serial Clock) This pin is used to SPI Clock Signal pin. /SCS I J2:4 /SCS (Slave Select) * This pin is used to SPI Slave Select signal Pin. This pin controls SPI_EN signal of W5100. When /SCS signal assert low, W5100 drive SPI mode by SPI_EN signal toggled high. MOSI (Master Out Slave In) * This pin is used to SPI MOSI signal pin. MOSI I J1:1 MISO I/O J1:2 MISO (Master In Slave Out) * This pin is used to SPI MISO signal pin. A14~A8 I J1:13 ~ J1:19 Address Used as Address[14-8] pin A7~A0 I J2:11 ~ J2:18 Address Used as Address[7-0] pin D7~D0 I/O J1:3 ~ J1:10 Data 8 bit-wide data bus /CS I J2:7 Module Select : Active low. /CS of W5100 /RD I J2:6 Read Enable : Active low. /RD of W5100 /WR I J2:5 /INT O J2:8 Write Enable : Active low /WR of W5100 Interrupt : Active low After reception or transmission it indicates that the W5100 requires MCU attention. By writing values to the Interrupt Status Register of W5100 the interrupt will be cleared. All interrupts can be masked by writing values to the IMR of W5100 (Interrupt Mask Register). For more details refer to the W5100 Datasheet © Copyright 2013 WIZnet Co., Ltd. All rights reserved 7 TOP WIZ8 10M J Data shee t WIZ811MJ Datasheet 2.4. Miscellaneous Signals Symbol Type Pin No. /RESET I J2:2 NC - J1 : 20 Description Reset : This pin is active low input to initialize or re-initialize W5100. By asserting this pin low for at least 2us, all internal registers will be re-initialized to their default states. Not Connect 8 TOP WIZ8 10M J Data shee t © Copyright 2013 WIZnet Co., Ltd. All rights reserved WIZ811MJ Datasheet 3. Timing Diagrams WIZ811MJ provides following interfaces of W5100. -. Direct/Indirect mode bus access -. SPI access Reset Timing 3.1. 9 TOP 1 2 3.2. Description Reset Cycle Time /RESET to internal PLOCK Min 2 us - Max 10 ms Register/Memory READ Timing 1 2 3 4 5 6 Description Read Cycle Time Valid Address to /CS low time /CS low to /RD low time /RD high to /CS high time /RD low to Valid Data Output time /RD high to Data High-Z Output time © Copyright 2013 WIZnet Co., Ltd. All rights reserved Min 80 ns 8 ns - Max 1 ns 1 ns 80 ns 1 ns WIZ8 10M J Data shee t WIZ811MJ Datasheet 3.3. Register/Memory WRITE Timing 10 TOP 1 2 3 4 5 6 3.4. 1 2 3 4 5 6 Description Write Cycle Time Valid Address to /CS low time /CS low to /WR high time /CS low to /WR low time /WR high to /CS high time /WR low to Valid Data time Min 70 ns 7 ns 70 ns - Max 1 ns 1 ns 14 ns Min 21 ns 7 ns 28 ns 7 ns 21 ns 70 ns Max 14 ns - SPI Timing Description /SS low to SCLK Input setup time Input hold time Output setup time Output hold time SCLK time © Copyright 2013 WIZnet Co., Ltd. All rights reserved Mode Slave Slave Slave Slave Slave Slave WIZ8 10M J Data shee t WIZ811MJ Datasheet 4. Dimensions A B C D 11 TOP WIZ8 10M J Data shee t E F G K L M H J I Symbols Dimensions (mm) A 25.00 B 22.46 C 17.00 D 3.00 E 4.00 F 52.00 G 3.20 H 9.00 I 2.54 J 2.54 K 15.90 L 13.50 M 6.00 © Copyright 2013 WIZnet Co., Ltd. All rights reserved © Copyright 2013 WIZnet Co., Ltd. All rights reserved C11 10uF/16V 0.1uF C12 3V3D R7 300 (1%) R6 12K (1%) A8 A10 A12 A14 MOSI D1 D3 D5 D7 0.1uF C13 R1 1M J1 2 4 6 8 10 12 14 16 18 20 RSET_BG VCC3V3A NC GNDA RXIP RXIN VCC1V8A TXOP TXON GNDA 1V8_OUT VCC3V3D GNDD GNDD VCC1V8D VCC1V8D GNDD VCC3V3D DATA7 DATA6 U1 3V3D 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 HEADER 10X2 2.54 Pitch 1 3 5 7 9 11 13 15 17 19 0.1uF C14 D7 D6 1V8D 1V8D 1V8_OUT RXIP RXIN 1V8A TXOP TXON 3V3D 3V3A XTLN RSET_BG Y1 MISO D0 D2 D4 D6 A9 A11 A13 XTLP XTLN 1V8A 3V3D FB1 A0 A2 A4 A6 SCLK /WR /CS C7 10uF/16V 3V3A 1uH D5 D4 D3 D2 D1 D0 MISO MOSI /SCS SCLK SPI_EN C2 15pF FDX_LED 1V8D 1V8D XTLP LINK_LED 80 79 78 77 76 75 74 73 72 71 70 69 68 67 66 65 64 63 62 61 NC NC NC GNDA XTLP XTLN VCC1V8A TXLED RXLED COLLED FDXLED VCC1V8D GNDD SPDLED LINKLED OPMODE2 OPMODE1 OPMODE0 NC NC 1 3 5 7 9 11 13 15 17 19 J2 2 4 6 8 10 12 14 16 18 20 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 HEADER 10X2 2.54 Pitch 3V3D W5100 NC /RESET /RD /WR /INT /CS ADDR0 ADDR1 ADDR2 ADDR3 ADDR4 ADDR5 ADDR6 ADDR7 ADDR8 ADDR9 VCC3V3D GNDD ADDR10 ADDR11 C9 0.01uF DATA5 DATA4 DATA3 DATA2 DATA1 DATA0 MISO MOSI /SCS SCLK SEN GNDD VCC1V8D TEST_MODE3 TEST_MODE2 TEST_MODE1 TEST_MODE0 ADDR14 ADDR13 ADDR12 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 A14 A13 A12 25MHz (SMD) A1 A3 A5 A7 /RESET /SCS /RD /INT A10 A11 /RESET /RD /WR /INT /CS A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 R11 4.7K 3V3D 1V8_OUT 3V3D /SCS C18 3.3uF/16V FB2 1 2 3 C19 10uF/16V 1V8D Y Vcc 4 5 SN74AHC1G04 NC A GND U4 1uH 1V8A 49.9 R9 C20 10uF/16V 0.1uF C5 49.9 R8 SPI_EN 3V3D 1V8A RXIP RXIN TXOP TXON 49.9 R2 0.1uF C3 C17 0.1uF C21 0.1uF 0.1uF C4 3V3A 3V3D 49.9 R3 C22 0.1uF 200 R4 3V3D 9 10 1 2 3 4 5 6 7 8 CON8 CON8 Date: Size A3 C25 0.1uF 0.1uF C10 0.1uF C6 Tuesday , Nov ember 27, 2012 3V3D CHGND CHGND C24 0.1uF Document Number WIZ811MJ CHGND 1 2 3 4 5 6 7 8 GH2 1 2 3 4 5 6 7 8 C23 0.1uF BS-RB10005 CH_GND1 CH_GND2 L2L1+ L4L3+ GH1 CHGND Title U2 TD+ TDTCT NC1 NC2 NC3 RD+ RD- 1V8D CHGND 13 14 LINK_LED 11 12 FDX_LED 200 R5 Sheet VCC 1 GH3 CON1 C26 0.1uF 1 C1 15pF of 1 Rev 1.1 WIZ811MJ Datasheet 5. Schematic 12 TOP WIZ8 10M J Data shee t WIZ811MJ Datasheet 6. Partlist Item 1 Q.ty 2 2 15 3 4 4 5 6 1 1 2 Reference C1,C2 C3,C4,C5,C6, C10,C12,C13 ,C14, C17,C21,C22, C23,C24,C25, C26 C7,C11,C19,C 20 C9 C18 FB1,FB2 7 2 J1,J2 8 9 10 11 12 13 14 15 16 17 18 1 4 2 1 1 1 1 1 1 1 1 R1 R2,R3,R8,R9 R4,R5 R6 R7 R11 U1 U2 U4 Y1 Part 15pF Tech. Characteristics 50V-20% Ceramic Package CASE 0603 0.1uF 50V-20% Ceramic CASE 0603 10uF/16V 16Vmin 10% EIA/IECQ 3216 0.01uF 3.3uF/16V 1uH Chip Ferrite Inductor 2X10 20PIN 2.54mm DIP STRAIGHT Header 1M 49.9 (1%) 200 12K (1%) 300 (1%) 50V-20% Ceramic 16Vmin 10% CASE 0603 EIA/IECQ 3216 CASE 0805 4.7K W5100 BS-RB10005 74AHC1G04GW 25MHz (SMD) PCB © Copyright 2013 WIZnet Co., Ltd. All rights reserved 2 X 10 2.54mm pitch 1/10W-5% SMD 1/10W-1% SMD 1/10W-5% SMD 1/10W-1% SMD 1/10W-1% SMD 1/10W-5% SMD WIZnet Hardware TCP/IP Transformer + RJ45 Inverting Buffer SMD Type, CL=18pF, Industrial WIZ811MJ REV1.1 1.6T 4LAYER CASE 0603 CASE 0603 CASE 0603 CASE 0603 CASE 0603 CASE 0603 LQFP80 TSSOP5 SX-1 13 TOP WIZ8 10M J Data shee t