0
登录后你可以
  • 下载海量资料
  • 学习在线课程
  • 观看技术视频
  • 写文章/发帖/加入社区
会员中心
创作中心
发布
  • 发文章

  • 发资料

  • 发帖

  • 提问

  • 发视频

创作活动
74LV4052DB,112

74LV4052DB,112

  • 厂商:

    NEXPERIA(安世)

  • 封装:

    SSOP16

  • 描述:

    IC MUX/DEMUX DUAL 4X1 16SSOP

  • 数据手册
  • 价格&库存
74LV4052DB,112 数据手册
74LV4052 Dual 4-channel analog multiplexer/demultiplexer Rev. 6 — 24 September 2021 Product data sheet 1. General description The 74LV4052 is a dual single-pole quad-throw analog switch suitable for use in 4:1 multiplexer/ demultiplexer applications. Each switch features four independent inputs/outputs (nY0, nY1, nY2 and nY3) and a common input/output (nZ). A digital enable input (E) and two digital select inputs (S0, S1) are common to both switches. When E is HIGH, the switches are turned off. Digital inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess VCC. 2. Features and benefits • • • • • • • • • • • Wide supply voltage range from 1.0 to 6.0 V CMOS low power dissipation Latch-up performance exceeds 100 mA per JESD 78 Class II Level B Optimized for low-voltage applications: 1.0 V to 6.0 V Accepts TTL input levels between VCC = 2.7 V and VCC = 3.6 V Low ON resistance: • 145 Ω (typical) at VCC - VEE = 2.0 V • 90 Ω (typical) at VCC - VEE = 3.0 V • 60 Ω (typical) at VCC - VEE = 4.5 V Logic level translation: • To enable 3 V logic to communicate with ± 3 V analog signals Typical ‘break before make’ built in Complies with JEDEC standards: • JESD8-7 (1.65 V to 1.95 V) • JESD8-5 (2.3 V to 2.7 V) • JESD8C (2.7 V to 3.6 V) • JESD36 (4.5 V to 5.5 V) ESD protection: • HBM JESD22-A114E exceeds 2000 V • MM JESD22-A115-A exceeds 200 V Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LV4052D -40 °C to +125 °C SO16 plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 74LV4052PW -40 °C to +125 °C TSSOP16 plastic thin shrink small outline package; 16 leads; body width 4.4 mm SOT403-1 74LV4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer 4. Functional diagram VCC 16 13 1Z 12 1Y0 14 1Y1 15 1Y2 10 S0 11 LOGIC LEVEL CONVERSION 9 S1 1Y3 1-OF-4 DECODER 1 2Y0 6 E 5 2Y1 2 2Y2 4 Fig. 1. 8 7 GND VEE 2Y3 3 2Z aaa-008169 Functional diagram 13 1Z 1Y0 12 10 S0 1Y1 14 9 S1 1Y2 15 1Y3 11 2Y0 1 2Y1 5 2Y2 2 2Y3 4 6 E 10 0 9 1 6 G4 4× 0 3 MDX 3 0 1 1 5 2 2 3 4 12 14 13 15 2Z 3 Fig. 2. Logic symbol 74LV4052 Product data sheet 11 001aah824 001aah825 Fig. 3. IEC logic symbol All information provided in this document is subject to legal disclaimers. Rev. 6 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 2 / 18 74LV4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer nYn VCC VEE VCC VCC VCC VEE from logic VEE nZ mnb043 Fig. 4. Schematic diagram (one switch) 5. Pinning information 5.1. Pinning 74LV4052 2Y0 1 2Y2 2 16 VCC 15 1Y2 2Z 3 14 1Y1 2Y3 4 13 1Z 2Y1 5 12 1Y0 E 6 11 1Y3 VEE 7 10 S0 GND 8 9 S1 aaa-008171 Fig. 5. Pin configuration SOT109-1 (SO16) and SOT403-1 (TSSOP16) 5.2. Pin description Table 2. Pin description Symbol Pin Description 2Y0, 2Y1, 2Y2, 2Y3 1, 5, 2, 4 independent input or output E 6 enable input (active LOW) VEE 7 negative supply voltage GND 8 ground (0 V) S0, S1 10, 9 select logic input 1Y0, 1Y1, 1Y2, 1Y3 12, 14, 15, 11 independent input or output 1Z, 2Z 13, 3 common input or output VCC 16 positive supply voltage 74LV4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 3 / 18 74LV4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer 6. Functional description Table 3. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care. Input Channel on E S1 S0 L L L nY0 and nZ L L H nY1 and nZ L H L nY2 and nZ L H H nY3 and nZ H X X none 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to VSS = 0 V (ground). Symbol Parameter VCC supply voltage IIK input clamping current ISK Min Max Unit [1] -0.5 +7.0 V VI < -0.5 V or VI > VCC + 0.5 V [2] - ±20 mA switch clamping current VSW < -0.5 V or VSW > VCC + 0.5 V [2] - ±20 mA ISW switch current VSW > -0.5 V or VSW < VCC + 0.5 V; source or sink current [2] - ±25 mA Tstg storage temperature -65 +150 °C Ptot total power dissipation - 500 mW [1] [2] [3] Conditions Tamb = -40 °C to +125 °C [3] To avoid drawing VCC current out of terminal nZ, when switch current flows into terminals nYn, the voltage drop across the bidirectional switch must not exceed 0.4 V. If the switch current flows into terminal nZ, no VCC current flows out of terminals nYn. In this case, there is no limit for the voltage drop across the switch, but the voltages at nYn and nZ may not exceed VCC or VEE. The minimum input voltage rating may be exceeded if the input current rating is observed. For SOT109-1 (SO16) package: Ptot derates linearly with 12.4 mW/K above 110 °C. For SOT403-1 (TSSOP16) package: Ptot derates linearly with 8.5 mW/K above 91 °C. 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions VCC supply voltage see Fig. 6 Min Typ Max 1 3.3 6 V VI input voltage 0 - VCC V VSW switch voltage 0 - VCC V Tamb ambient temperature -40 - +125 °C Δt/ΔV input transition rise and fall rate VCC = 1.0 V to 2.0 V - - 500 ns/V VCC = 2.0 V to 2.7 V - - 200 ns/V VCC = 2.7 V to 6.0 V - - 100 ns/V [1] [1] in free air Unit The static characteristics are guaranteed from VCC = 1.2 V to 6.0 V. However, LV devices are guaranteed to function down to VCC = 1.0 V (with input levels GND or VCC). 74LV4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 4 / 18 74LV4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer 001aak344 8.0 VCC - GND (V) 6.0 operating area 4.0 2.0 0 Fig. 6. 0 2.0 4.0 6.0 8.0 VCC - VEE (V) Guaranteed operating area as a function of the supply voltages 9. Static characteristics Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter VIH VIL II IS(OFF) HIGH-level input voltage Conditions -40 °C to +85 °C Min Typ[1] Max Min Max VCC = 1.2 V 0.9 - - 0.9 - V VCC = 2.0 V 1.4 - - 1.4 - V VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V VCC = 4.5 V 3.15 - - 3.15 - V VCC = 6.0 V 4.20 - - 4.20 - V - - 0.3 - 0.3 V - - 0.6 - 0.6 V VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V VCC = 4.5 V - - 1.35 - 1.35 V VCC = 6.0 V - - 1.80 - 1.80 V VCC = 3.6 V - - 1.0 - 1.0 μA VCC = 6.0 V - - 2.0 - 2.0 μA - - 1.0 - 1.0 μA - - 2.0 - 2.0 μA - - 1.0 - 1.0 μA - - 2.0 - 2.0 μA VCC = 3.6 V - - 20 - 40 μA VCC = 6.0 V - - 40 - 80 μA - - 500 - 850 μA LOW-level input VCC = 1.2 V voltage VCC = 2.0 V input leakage current VI = VCC or GND VI = VIH or VIL; see Fig. 7 OFF-state leakage current VCC = 3.6 V VCC = 6.0 V IS(ON) VI = VIH or VIL; see Fig. 8 ON-state leakage current VCC = 3.6 V VCC = 6.0 V ICC ΔICC supply current additional supply current 74LV4052 Product data sheet -40 °C to +125 °C Unit VI = VCC or GND; IO = 0 A per input; VI = VCC - 0.6 V; VCC = 2.7 V to 3.6 V All information provided in this document is subject to legal disclaimers. Rev. 6 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 5 / 18 74LV4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer Symbol Parameter CI input capacitance Csw switch capacitance [1] Conditions -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ[1] Max Min Max - 3.5 - - - pF independent pins nYn - 5 - - - pF common pins nZ - 12 - - - pF nYn 1 switch Typical values are measured at Tamb = 25 °C. 9.1. Test circuits VCC S0 to S1 VIH or VIL nZ E IS VCC nYn 1 nZ nYn 2 GND = VEE VCC S0 to S1 VIH or VIL switch nYn 2 E IS GND = VEE GND VI VO VO VI aaa-008172 aaa-008173 VI = VCC or VEE and VO = VEE or VCC. Fig. 7. IS VI = VCC or VEE and VO = open circuit. Test circuit for measuring OFF-state leakage current Fig. 8. Test circuit for measuring ON-state leakage current 9.2. ON resistance Table 7. ON resistance At recommended operating conditions; voltages are referenced to GND (ground = 0 V); for test circuit and graph see Fig. 9 and Fig. 10. Symbol Parameter RON(peak) ON resistance (peak) ΔRON ON resistance mismatch between channels 74LV4052 Product data sheet Conditions -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ[1] Max Min Max - - - - - Ω VCC = 2.0 V; ISW = 1000 μA - 145 325 - 375 Ω VCC = 2.7 V; ISW = 1000 μA - 90 200 - 235 Ω VCC = 3.0 V to 3.6 V; ISW = 1000 μA - 80 180 - 210 Ω VCC = 4.5 V; ISW = 1000 μA - 60 135 - 160 Ω VCC = 6.0 V; ISW = 1000 μA - 55 125 - 145 Ω VI = 0 V to VCC - VEE VCC = 1.2 V; ISW = 100 μA [2] VI = 0 V to VCC - VEE VCC = 1.2 V; ISW = 100 μA - - - - - Ω VCC = 2.0 V; ISW = 1000 μA [2] - 5 - - - Ω VCC = 2.7 V; ISW = 1000 μA - 4 - - - Ω VCC = 3.0 V to 3.6 V; ISW = 1000 μA - 4 - - - Ω VCC = 4.5 V; ISW = 1000 μA - 3 - - - Ω VCC = 6.0 V; ISW = 1000 μA - 2 - - - Ω All information provided in this document is subject to legal disclaimers. Rev. 6 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 6 / 18 74LV4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer Symbol RON(rail) Parameter Conditions -40 °C to +85 °C Max Min Max - 225 - - - Ω VCC = 2.0 V; ISW = 1000 μA [2] - 110 235 - 270 Ω VCC = 2.7 V; ISW = 1000 μA - 70 145 - 165 Ω VCC = 3.0 V to 3.6 V; ISW = 1000 μA - 60 130 - 150 Ω VCC = 4.5 V; ISW = 1000 μA - 45 100 - 115 Ω VCC = 6.0 V; ISW = 1000 μA - 40 85 - 100 Ω - 250 - - - Ω VCC = 2.0 V; ISW = 1000 μA - 120 320 - 370 Ω VCC = 2.7 V; ISW = 1000 μA - 75 195 - 225 Ω VCC = 3.0 V to 3.6 V; ISW = 1000 μA - 70 175 - 205 Ω VCC = 4.5 V; ISW = 1000 μA - 50 130 - 150 Ω VCC = 6.0 V; ISW = 1000 μA - 45 120 - 135 Ω ON resistance (rail) VI = VCC - VEE VCC = 1.2 V; ISW = 100 μA [1] [2] Typ[1] ON resistance (rail) VI = GND VCC = 1.2 V; ISW = 100 μA RON(rail) Min -40 °C to +125 °C Unit [2] Typical values are measured at Tamb = 25 °C. When supply voltages (VCC - VEE) near 1.2 V the analog switch ON resistance becomes extremely non-linear. When using a supply of 1.2 V, only use these devices for transmitting digital signals. 9.3. On resistance test circuit and graph 001aak412 180 RON (Ω) V VCC VIH or VIL S0 to S1 nZ E VSW 120 nYn 1 VCC = 3.0 V switch nYn 2 VCC = 4.5 V 60 GND = VEE GND VCC = 2.0 V VI ISW 0 0 1.2 2.4 3.6 aaa-008174 RON = VSW / ISW. Fig. 9. Test circuit for measuring RON 74LV4052 Product data sheet VI (V) 4.8 Vi = 0 V to VCC - VEE Fig. 10. Typical RON as a function of input voltage All information provided in this document is subject to legal disclaimers. Rev. 6 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 7 / 18 74LV4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer 10. Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit, see Fig. 13. Symbol Parameter Conditions -40 °C to +85 °C Min Typ[1] Max Min VCC = 1.2 V - VCC = 2.0 V - 25 - - - ns 9 17 - 20 ns VCC = 2.7 V - 6 13 - 15 ns - 5 10 - 12 ns - 4 9 - 10 ns - 3 7 - 8 ns VCC = 1.2 V - 190 - - - ns VCC = 2.0 V - 65 121 - 146 ns VCC = 2.7 V - 48 89 - 108 ns VCC = 3.0 V to 3.6 V; CL = 15 pF [3] - 30 - - - ns VCC = 3.0 V to 3.6 V - 36 71 - 86 ns VCC = 4.5 V - 32 60 - 73 ns VCC = 6.0 V - 25 46 - 56 ns VCC = 1.2 V - 125 - - - ns VCC = 2.0 V - 43 80 - 95 ns VCC = 2.7 V - 33 59 - 71 ns VCC = 3.0 V to 3.6 V; CL = 15 pF [3] - 22 - - - ns VCC = 3.0 V to 3.6 V - 26 48 - 57 ns VCC = 4.5 V - 23 41 - 49 ns VCC = 6.0 V - 18 32 - 38 ns - 57 - - - pF propagation delay nYn to nZ, nZ to nYn; see Fig. 11 tpd VCC = 3.0 V to 3.6 V [3] VCC = 6.0 V enable time tdis disable time CPD [1] [2] [3] [4] power dissipation capacitance E, Sn to nYn, nZ; see Fig. 12 E, Sn to nYn, nZ; see Fig. 12 CL = 50 pF; fi = 1 MHz; VI = GND to VCC Max [2] VCC = 4.5 V ten -40 °C to +125 °C Unit [2] [3] [2] [3] [4] All typical values are measured at Tamb = 25 °C. tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. Typical values are measured at nominal supply voltage (VCC = 3.3 V). CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD x VCC x fi x N + Σ((CL + Csw) x VCC x fo) where: fi = input frequency in MHz, fo = output frequency in MHz CL = output load capacitance in pF Csw = maximum switch capacitance in pF; VCC = supply voltage in Volts N = number of inputs switching 2 Σ(CL x VCC x fo) = sum of the outputs. 74LV4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 8 / 18 74LV4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer 10.1. Waveforms and test circuit VCC nYn or nZ input VM VEE tPLH tPHL VO nZ or nYn output VM VEE 001aak351 Measurement points are given in Table 9. VOL and VOH are typical voltage output levels that occur with the output load. Fig. 11. nYn, nZ to nZ, nYn propagation delays VCC Sn, E input VM VSS tPLZ nYn or nZ output LOW-to-OFF OFF-to-LOW tPZL VO 90 % 10 % VEE tPHZ nYn or nZ output HIGH-to-OFF OFF-to-HIGH VO tPZH 90 % 10 % VEE switch ON switch OFF switch ON 001aak352 Measurement points are given in Table 9. VOL and VOH are typical voltage output levels that occur with the output load. Fig. 12. Enable and disable times Table 9. Measurement points Supply voltage Input Output VCC VM VM < 2.7 V 0.5VCC 0.5VCC 2.7 V to 3.6 V 1.5 V 1.5 V > 3.6 V 0.5VCC 0.5VCC 74LV4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 9 / 18 74LV4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer VI negative pulse tW 90 % VM 0V VI positive pulse 0V VM 10 % tf tr tr tf 90 % VM VM 10 % tW VEXT VCC G VI RL VO DUT RT VEE CL RL 001aak353 Test data is given in Table 10. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig. 13. Test circuit for measuring switching times Table 10. Test data Supply voltage Input Load VEXT VCC VI tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ < 2.7 V VCC ≤ 6 ns 50 pF 1 kΩ open VEE 2VCC 2.7 V to 3.6 V 2.7 V ≤ 6 ns 15 pF, 50 pF 1 kΩ open VEE 2VCC > 3.6 V VCC ≤ 6 ns 50 pF 1 kΩ open VEE 2VCC 10.2. Additional dynamic parameters Table 11. Additional dynamic characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V); VI = GND or VCC (unless otherwise specified); tr = tf ≤ 6.0 ns; Tamb = 25 °C. Symbol Parameter THD Conditions Min Typ Max Unit VCC = 3.0 V; VI = 2.75 V (p-p) - 0.8 - % VCC = 6.0 V; VI = 5.5 V (p-p) - 0.4 - % - 2.4 - % - 1.2 - % VCC = 3.0 V - 180 - MHz VCC = 6.0 V - 200 - MHz total harmonic distortion fi = 1 kHz; CL = 50 pF; RL = 10 kΩ; see Fig. 14 fi = 10 kHz; CL = 50 pF; RL = 10 kΩ; see Fig. 14 VCC = 3.0 V; VI = 2.75 V (p-p) VCC = 6.0 V; VI = 5.5 V (p-p) f(-3dB) -3 dB frequency response 74LV4052 Product data sheet CL = 50 pF; RL = 50 Ω; see Fig. 15 and Fig. 16 All information provided in this document is subject to legal disclaimers. Rev. 6 — 24 September 2021 [1] © Nexperia B.V. 2021. All rights reserved 10 / 18 74LV4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer Symbol Parameter Conditions αiso fi = 1 MHz; CL = 50 pF; RL = 600 Ω; see Fig. 17 and Fig. 18 isolation (OFF-state) Vct crosstalk voltage Xtalk [1] [2] crosstalk Min Typ Max Unit VCC = 3.0 V - -50 - dB VCC = 6.0 V - -50 - dB VCC = 3.0 V - 0.11 - V VCC = 6.0 V - 0.12 - V VCC = 3.0 V - -60 - dB VCC = 6.0 V - -60 - dB [2] between digital inputs and switch; fi = 1 MHz; CL = 50 pF; RL = 600 Ω; see Fig. 19 between switches; fi = 1 MHz; CL = 50 pF; RL = 600 Ω; [2] see Fig. 20 To obtain 0 dBm level at output for 1 MHz (0 dBm = 1 mW into 50 Ω), adjust fi voltage. To obtain 0 dBm level at output for 1 MHz (0 dBm = 1 mW into 600 Ω), adjust fi voltage. 10.2.1. Test circuits VCC S0 to S1 VIH or VIL nZ 2RL nYn 1 switch nYn 2 E 10 µF VCC GND = VEE GND 2RL CL D fi aaa-008177 Fig. 14. Test circuit for measuring total harmonic distortion VCC S0 to S1 VIH or VIL nZ 0.1 µF GND E VCC 2RL nYn 1 switch nYn 2 GND = VEE 2RL CL dB fi aaa-008175 Fig. 15. Test circuit for measuring frequency response 74LV4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 11 / 18 74LV4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer 001aak361 5 (dB) 0 -5 102 10 103 104 105 f (kHz) 106 VCC = 3.0 V; GND = 0 V; VEE = - 3.0 V; RL = 50 Ω; RSOURCE = 1 kΩ. Fig. 16. Typical frequency response VCC S0 to S1 VIH or VIL nZ E 0.1 µF VCC 2RL nYn 1 switch nYn 2 GND = VEE VCC 2RL CL dB fi aaa-008176 Fig. 17. Test circuit for measuring isolation (OFF-state) 001aak360 0 (dB) - 50 - 100 10 102 103 104 105 f (kHz) 106 VCC = 3.0 V; GND = 0 V; VEE = - 3.0 V; RL = 50 Ω; RSOURCE = 1 kΩ. Fig. 18. Typical isolation (OFF-state) as function of frequency 74LV4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 12 / 18 74LV4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer VCC VCC 2RL 2RL S0 to S1 nYn 1 nZ G switch nYn 2 E 2RL VCC GND = VEE VIH or VIL 2RL V CL VO aaa-008178 a. Test circuit logic input (Sn, E) off on off VO Vct 001aaj908 b. Input and output pulse definitions VI may be connected to Sn or E. Fig. 19. Test circuit for measuring crosstalk voltage between digital inputs and switch VCC S0 to S1 VIH or VIL RL nZ 2RL 2RL nYn nYn E 0.1 µF VCC VCC GND = VEE GND 2RL VO CL dB 2RL VI aaa-008179 a. Switch on channel. VCC VCC 2RL S0 to S1 VIH or VIL nZ E 2RL VO CL 2RL 2RL nYn nYn GND = VEE GND VCC VCC RL VI 2RL dB aaa-008180 b. Switch off channel. Fig. 20. Test circuit for measuring crosstalk between switches 74LV4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 13 / 18 74LV4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer 11. Package outline SO16: plastic small outline package; 16 leads; body width 3.9 mm SOT109-1 D E A X c y HE v M A Z 16 9 Q A2 A (A 3) A1 pin 1 index θ Lp 1 L 8 e w M bp 0 2.5 detail X 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 10.0 9.8 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 inches 0.069 0.010 0.057 0.004 0.049 0.01 0.019 0.0100 0.39 0.014 0.0075 0.38 0.16 0.15 0.05 0.039 0.016 0.028 0.020 0.01 0.01 0.004 0.028 0.012 0.244 0.041 0.228 θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT109-1 076E07 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig. 21. Package outline SOT109-1 (SO16) 74LV4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 14 / 18 74LV4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer TSSOP16: plastic thin shrink small outline package; 16 leads; body width 4.4 mm D SOT403-1 E A X c y HE v M A Z 9 16 Q A2 pin 1 index (A 3 ) A1 A θ Lp 1 L 8 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.40 0.06 8o 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT403-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 Fig. 22. Package outline SOT403-1 (TSSOP16) 74LV4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 15 / 18 74LV4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer 12. Abbreviations Table 12. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 13. Revision history Table 13. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LV4052 v.6 20210924 Product data sheet - 74LV4052 v.5 Modifications: • • • • • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. Section 1 and Section 2 updated. Section 7: Derating values for Ptot total power dissipation updated. Type number 74LV4052DB (SOT338-1/SSOP16) removed. 74LV4052 v.5 20160317 Modifications: • 74LV4052 v.4 20130701 Modifications: • • Product data sheet - 74LV4052 v.4 Type number 74LV4052N (SOT38-4) removed. Product data sheet - 74LV4052 v.3 The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. 74LV4052 v.3 19980623 Product specification - 74LV4052 v.2 74LV4052 v.2 19970715 Product specification - - 74LV4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 16 / 18 74LV4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer 14. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the internet at https://www.nexperia.com. Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between Nexperia and its customer, unless Nexperia and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the Nexperia product is deemed to offer functions and qualities beyond those described in the Product data sheet. Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, Nexperia does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. Nexperia takes no responsibility for the content in this document if provided by an information source outside of Nexperia. In no event shall Nexperia be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal 74LV4052 Product data sheet Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 6 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 17 / 18 74LV4052 Nexperia Dual 4-channel analog multiplexer/demultiplexer Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................1 4. Functional diagram.......................................................2 5. Pinning information......................................................3 5.1. Pinning.........................................................................3 5.2. Pin description............................................................. 3 6. Functional description................................................. 4 7. Limiting values............................................................. 4 8. Recommended operating conditions..........................4 9. Static characteristics....................................................5 9.1. Test circuits..................................................................6 9.2. ON resistance..............................................................6 9.3. On resistance test circuit and graph............................ 7 10. Dynamic characteristics............................................ 8 10.1. Waveforms and test circuit........................................ 9 10.2. Additional dynamic parameters............................... 10 10.2.1. Test circuits...........................................................11 11. Package outline........................................................ 14 12. Abbreviations............................................................ 16 13. Revision history........................................................16 14. Legal information......................................................17 © Nexperia B.V. 2021. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 24 September 2021 74LV4052 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 24 September 2021 © Nexperia B.V. 2021. All rights reserved 18 / 18
74LV4052DB,112 价格&库存

很抱歉,暂时无法提供与“74LV4052DB,112”相匹配的价格&库存,您可以联系我们找货

免费人工找货