ISD1700
ISD ChipCorder®
ISD1700 Series
Datasheet
The information described in this document is the exclusive intellectual property of
Nuvoton Technology Corporation and shall not be reproduced without permission from Nuvoton.
Nuvoton is providing this document only for reference purposes of Audio Product Line based system
design. Nuvoton assumes no responsibility for errors or omissions.
All data and specifications are subject to change without notice.
For additional information or questions, please contact: Nuvoton Technology Corporation.
www.nuvoton.com
Jun 28, 2021
Page 1 of 26
Rev2.3
ISD1700
TABLE OF CONTENTS
1
GENERAL DESCRIPTION .................................................................................. 3
2
FEATURES.......................................................................................................... 4
3
BLOCK DIAGRAM ............................................................................................... 6
4
PINOUT CONFIGURATION ................................................................................ 7
5
PIN DESCRIPTION ............................................................................................. 8
6
MODES OF OPERATIONS ................................................................................. 9
6.1 Standalone (Push-Button) Mode ................................................................... 9
6.2 SPI Mode....................................................................................................... 9
7
TIMING DIAGRAMS .......................................................................................... 10
7.1 Basic Operation ........................................................................................... 10
7.2 SPI Operation .............................................................................................. 14
8
ABSOLUTE MAXIMUM RATINGS .................................................................... 15
8.1 Operating Conditions ................................................................................... 16
9
ELECTRICAL CHARACTERISTICS .................................................................. 17
9.1 DC Parameters............................................................................................ 17
9.2 AC Parameters ............................................................................................ 18
10 TYPICAL APPLICATION CIRCUITS ................................................................. 19
11 PACKAGING ..................................................................................................... 22
11.1 28-Lead 300-Mil Plastic Small Outline Integrated Circuit (SOIC) ........... 22
11.2 28-Lead 600-Mil Plastic Dual Inline Package (PDIP) ............................. 23
12 ORDERING INFORMATION ............................................................................. 24
13 REVISION HISTORY ......................................................................................... 25
Important Notice ....................................................................................................... 26
Jun 28, 2021
Page 2 of 26
Rev2.3
ISD1700
1 GENERAL DESCRIPTION
The Nuvoton® ISD1700 ChipCorder® Series is a high quality, fully integrated, singlechip multi-message voice record and playback device ideally suited to a variety of
electronic systems. The message duration is user selectable in ranges from 26 seconds
to 120 seconds, depending on the specific device. The sampling frequency of each
device can also be adjusted from 4 kHz to 12 kHz with an external resistor, giving the
user greater flexibility in duration versus recording quality for each application.
Operating voltage spans a range from 2.4 V to 5.5 V to ensure that the ISD1700 devices
are optimized for a wide range of battery or line-powered applications.
The ISD1700 is designed for operation in either standalone or microcontroller (SPI)
mode. The device incorporates a proprietary message management system that allows
the chip to self-manage address locations for multiple messages. This unique feature
provides sophisticated messaging flexibility in a simple push-button environment. The
devices include an on-chip oscillator (with external resistor control), microphone
preamplifier with Automatic Gain Control (AGC), an auxiliary analog input, anti-aliasing
filter, Multi-Level Storage (MLS) array, smoothing filter, volume control, Pulse Width
Modulation (PWM) Class D speaker driver, and current/voltage output.
The ISD1700 devices also support an optional “vAlert” (voiceAlert) feature that can be
used as a new message indicator. With vAlert, the device flashes an external LED to
indicate that a new message is present. Besides, four special sound effects are
reserved for audio confirmation of operations, such as “Start Record”, “Stop Record”,
“Erase”, “Forward”, “Global Erase”, and etc.
Recordings are stored into on-chip Flash memory, providing zero-power message
storage. This unique single-chip solution is made possible through Nuvoton’s patented
Multi-Level Storage (MLS) technology. Audio data are stored directly in solid-state
memory without digital compression, providing superior quality voice and music
reproduction.
Voice signals can be fed into the chip through two independent paths: a differential
microphone input and a single-ended analog input. For outputs, the ISD1700 provides
a Pulse Width Modulation (PWM) Class D speaker driver and a separate analog output
simultaneously. The PWM can directly drive a standard 8Ω speaker or typical buzzer,
while the separate analog output can be configured as a single-ended current or voltage
output to drive an external amplifier.
While in Standalone mode, the ISD1700 devices automatically enter into power down
mode for power conservation after an operation is completed.
In the SPI mode, the user has full control via the serial interface in operating the device.
This includes random access to any location inside the memory array by specifying the
start address and end address of operations. SPI mode also allows access to the
Jun 28, 2021
Page 3 of 26
Rev2.3
ISD1700
Analog Path Configuration (APC) register. This register allows flexible configuration of
audio paths, inputs, outputs and mixing. The APC default configuration for standalone
mode can also be modified by storing the APC data into a non-volatile register
(NVCFG) that is loaded at initialization. Utilizing the capabilities of ISD1700 Series,
designers have the control and flexibility to implement voice functionality into the highend products.
2 FEATURES
Integrated message management systems for single-chip, push-button
applications
o REC : level-trigger for recording
o PLAY : edge-trigger for individual message or level-trigger for looping playback
sequentially
o ERASE : edge-triggered erase for first or last message or level-triggered erase for
all messages
o FWD : edge-trigger to advance to the next message or fast message scan during
the playback
o VOL : 8 levels output volume control
o RDY INT : ready or busy status indication
o RESET : return to the default state
o Automatic power-down after each operation cycle
Selectable sampling frequency controlled by an external oscillator resistor
Sampling Frequency
Rosc
12 kHz
53 kΩ
8 kHz
80 kΩ
6.4 kHz
100 kΩ
5.3 kHz
120 kΩ
4 kHz
160 kΩ
Selectable message duration
o A wide range selection from 20 secs to 480 secs pending upon sampling
frequency chosen
Sample Freq.
12 kHz
8 kHz
6.4 kHz
5.3 kHz
4 kHz
ISD1730
20 secs
ISD1760
40 secs
ISD17120
80 secs
ISD17240
160 secs
30 secs
37 secs
45 secs
60 secs
60 secs
75 secs
90 secs
120 secs
120 secs
150 secs
181 secs
240 secs
240 secs
300 secs
362 secs
480 secs
Message and operation indicators
o Four customizable Sound Effects (SEs) for audible indication
o Optional vAlert (voiceAlert) to indicate the presence of new messages
o LED: stay on during recording, blink during playback, forward and erase
operations
Dual operating modes
o Standalone mode:
Integrated message management techniques
Automatic power-down after each operation cycle
o SPI mode:
Jun 28, 2021
Page 4 of 26
Rev2.3
ISD1700
Fully user selectable and controllable options via APC register and various
SPI commands
Two individual input channels
o MIC+/MIC-: differential microphone inputs with AGC (Automatic Gain Control)
o AnaIn: single-ended auxiliary analog input for recording or feed-through
Dual output channels
o Differential PWM Class D speaker outputs directly drives an 8 Ω speaker or a
typical buzzer
o Configurable AUD (current) or AUX (voltage) single-ended output drives external
audio amplifier
ChipCorder standard features
o High-quality, natural voice and audio reproduction
o 2.4V to 5.5V operating voltage
o 100-year message retention (typical)
o 100,000 record cycles (typical)
Temperature options:
o Commercial: 0°C to +50°C (die); 0°C to +70°C (packaged units)
o Industrial: -40°C to +85°C (packaged units)
Packaging types: available in Die, PDIP and SOIC
Package option: Lead-free packaged units
Jun 28, 2021
Page 5 of 26
Rev2.3
ISD1700
3 BLOCK DIAGRAM
Jun 28, 2021
Page 6 of 26
Rev2.3
ISD1700
4 PINOUT CONFIGURATION
Refer to Design Guide for details before performing any design or PCB layout.
Jun 28, 2021
Page 7 of 26
Rev2.3
ISD1700
5 PIN DESCRIPTION
Refer to Design Guide for details before performing any design or PCB layout.
PIN NAME
VCCD
LED
RESET
FUNCTIONS
Digital Power Supply: Power supply for digital circuitry.
LED: An LED output.
RESET: When active, the device enters into a known state.
MISO
Master In Slave Out: Data is shifted out on the falling edge of SCLK. When
the SPI is inactive ( SS = high), it’s tri-state.
MOSI
Master Out Slave In: Data input of the SPI interface when ISD1700 is a
slave. Data is latched into the device on the rising edge of SCLK.
Serial Clock: Clock of the SPI interface.
Slave Select: Selects as a slave device and enables the SPI interface.
SCLK
SS
VSSA
AnaIn
MIC+
MICVSSP2
SPVCCP
SP+
VSSP1
AUD/AUX
AGC
VOL
ROSC
VCCA
FT
PLAY
REC
ERASE
FWD
RDY INT
VSSD
Jun 28, 2021
Analog Ground: Ground path for analog circuitry.
AnaIn: Auxiliary analog input to the device for recording or feed-through.
MIC+: Non-inverting input of the differential microphone signal.
MIC-: Inverting input of the differential microphone signal.
Ground: Ground path for negative PWM speaker drive.
SP-: The negative Class D PWM speaker output.
Power Supply for PWM Speaker Driver: Power for PWM speaker drive.
SP+: The positive Class D PWM speaker output.
Ground: Ground path for positive PWM speaker drive.
Auxiliary Output: Either an AUD (current) or AUX (voltage) output.
Automatic Gain Control (AGC): The AGC adjusts the gain of the
microphone preamplifier circuitry.
Volume: This control has 8 levels of volume adjustment.
Oscillator Resistor: A resistor determines the sample frequency of the
device, which sets the duration.
Analog Power Supply. Power supply for analog circuitry.
Feed-through: Enable the feed-through path for AnaIn signal to the
outputs.
Playback: Plays the recorded message individually, or plays messages
sequential in a looping mode.
Record: When active, starts recording message.
Erase: When active, can erase individual message or do global erase.
Forward: Advances to the next message from the current location.
An open drain output. Can review ready or interrupt status.
Digital Ground: Ground path for digital circuitry
Page 8 of 26
Rev2.3
ISD1700
6 MODES OF OPERATIONS
The ISD1700 Series can operate in either Standalone (Push-Button) or microcontroller
(SPI) mode.
6.1 STANDALONE (PUSH-BUTTON) MODE
One can utilize the REC , PLAY , FT , FWD , ERASE , VOL or RESET control to initiate
a desired operation. As completed, the device automatically enters into the powerdown state.
6.2 SPI MODE
In SPI mode, control of the device is achieved through the 4-wire serial interface
via SPI commands.
For technical details, please refer to the design guide.
Jun 28, 2021
Page 9 of 26
Rev2.3
ISD1700
7 TIMING DIAGRAMS
The following estimated timing diagrams are not in proper scale.
7.1 BASIC OPERATION
Tr
Tf
REC
TDeb
RDY
TSc1
TRU
TER
TRD
TSet1
LED
Mic+/-,
AnaIn
Figure 12.1: Record Operation with No Sound Effect
> TDeb
Tr
Tf
TDeb
PLAY
TDeb
TRDTSet1
RDY
TSc1 TSc2 TRU TLH
TCyc
LED
Sp+, Sp-
Figure 12.2: Start and Stop Playback Operation
Jun 28, 2021
Page 10 of 26
Rev2.3
ISD1700
> TDeb
Tr
Tf
ERASE
TDeb
TRD
RDY
TSc1 TSc2 TE
TLS2
TSc2
LED
Figure 12.3: Single Erase Operation with No Sound Effect
> T Deb
Tr
Tf
FWD
TDeb
TRD
RDY
TSc1 TSc2
TLS1 or T LS2
LED
Figure 12.4: Forward Operation with No Sound Effect
Jun 28, 2021
Page 11 of 26
Rev2.3
ISD1700
Tf
Tr
ERASE
TDeb
TRD
RDY
TSc1 TSc2 TGE1 or (TE + TLS2 or TSE2) 3x(T LS1 or TSE1) TGE2
TLS4 or TSE4
LED
Sp+, SpNote: If SEs are recorded, then Sp+/- will have output.
Figure 12.5: Global Erase Operation with or without Sound Effects
Tr
Tf
RESET
TReset
TSet2
Device returns to Power Down state
RDY
LED
Figure 12.6: Reset Operation
Jun 28, 2021
Page 12 of 26
Rev2.3
ISD1700
> T Deb
Tr
Tf
PLAY
TDeb
TRD
RDY
TSc1 TSc2 TRU TLH
TCyc
LED
TRU
TRD
AUD
Figure 12.7: Playback Operation with ramp up and ramp down effect at AUD output
Jun 28, 2021
Page 13 of 26
Rev2.3
ISD1700
7.2 SPI OPERATION
TSSmin
TSSH
SS
TSCKlow
TSSS
TSCKhi
SCLK
TDIS
TDIH
LSB
MOSI
MSB
TPD
TDF
(TRISTATE)
MISO
MSB
LSB
Figure 12.8: SPI Operation
PARAMETER
SYMBOL
MIN
TYP
MAX
UNITS
TSSS
500
nsec
TSSH
500
nsec
Data in Setup Time
TDIS
200
nsec
Data in Hold Time
TDIH
200
nsec
SS
Setup Time
SS
Hold Time
Output Delay
TPD
500
nsec
Output Delay to HighZ
TDF
500
nsec
SS
TSSmin
HIGH
1
µsec
SCLK High Time
TSCKhi
400
nsec
SCLK Low Time
TSCKlow
400
nsec
CLK Frequency
Power-Up Delay
Notes:
[1]
Jun 28, 2021
F0
[1]
TPUD
1,000
50
KHz
msec
The value shown is based upon 8 kHz sampling frequency. Delay increases proportionally for
slower sampling frequency.
Page 14 of 26
Rev2.3
ISD1700
8 ABSOLUTE MAXIMUM RATINGS
ABSOLUTE MAXIMUM RATINGS (DIE) [1]
CONDITIONS
Junction temperature
Storage temperature range
Voltage Applied to any pads
Power supply voltage to ground potential
VALUES
1500C
-650C to +1500C
(VSS - 0.3V) to (VCC + 0.3V)
-0.3V to +7.0V
ABSOLUTE MAXIMUM RATINGS (PACKAGED PARTS) [1]
CONDITIONS
Junction temperature
Storage temperature range
Voltage Applied to any pins
Voltage applied to any pin (Input current limited to +/-20 mA)
Power supply voltage to ground potential
[1]
VALUES
1500C
-650C to +1500C
(VSS - 0.3V) to (VCC + 0.3V)
(VSS – 1.0V) to (VCC + 1.0V)
-0.3V to +7.0V
Stresses above those listed may cause permanent damage to the device. Exposure to the absolute
maximum ratings may affect device reliability. Functional operation is not implied at these conditions.
Jun 28, 2021
Page 15 of 26
Rev2.3
ISD1700
8.1
OPERATING CONDITIONS
OPERATING CONDITIONS (DIE)
CONDITIONS
VALUES
Operating temperature range
Supply voltage (VCC) [1]
Ground voltage (VSS) [2]
Input voltage (VCC) [1]
Voltage applied to any pins
0°C to +50°C
+2.4 V to +5.5 V
0V
0 V to 5.5 V
(VSS –0.3 V) to (VCC +0.3 V)
OPERATING CONDITIONS (PACKAGED PARTS)
CONDITIONS
VALUES
Operating temperature range (Case temperature)
Supply voltage (VDD) [1]
Ground voltage (VSS) [2]
Input voltage (VDD) [1]
Voltage applied to any pins
-40°C to +85°C
+2.4V to +5.5V
0V
0V to 5.5V
(VSS –0.3V) to (VDD +0.3V)
[1] V
CC
[2]
= VCCA = VCCD= VCCP
VSS = VSSA = VSSD = VSSP1 VSSP2
Jun 28, 2021
Page 16 of 26
Rev2.3
ISD1700
9 ELECTRICAL CHARACTERISTICS
9.1 DC PARAMETERS
PARAMETER
SYMBOL
Supply Voltage
VDD
Input Low Voltage
VIL
Input High Voltage
VIH
Output Low Voltage
VOL
Output High Voltage
VOH
Record Current
IDD_Record
Playback Current
IDD_Playback
Erase Current
IDD_Erase
Standby Current
ISB
Input Leakage Current
IILPD1
Input Current Low
IILPD2
Preamp Input Impedance RMIC+,RMICAnaIn Input Impedance
RAnaIn
MIC Differential Input
VIN1
AnaIn Input Voltage
VIN2
Gain from MIC to SP+/AMSP
MIN
2.4
VSS-0.3
0.7xVDD
VSS-0.3
0.7xVDD
Speaker Output Load
RSPK
AUX Output Load
RAux
Speaker Output Power
Pout
8
5
Speaker Output Voltage
AUX Output Swing
AUX Output DC Level
AUD
Volume Output
[1]
[2]
[3]
[4]
[5]
MAX
5.5
0.3xVDD
VDD
0.3xVDD
VDD
20
20
20
1
10
±1
-10
-3
7
42
15
6
40
670
313
117
49
VDD
1
1.2
IAUD
AVol
V
V
-3.0
0 to -28
THD
UNITS
V
V
V
V
V
mA
mA
mA
µA
µA
µA
kΩ
kΩ
300
1
dB
Ω
kΩ
VOUT1
VOUT2
VOUT3
Total Harmonic Distortion
Notes:
TYP [1]
dB
1
CONDITIONS
IOL = 4.0 mA[2]
IOH = -1.6 mA[2]
VDD = 5.5 V, No load,
Sampling freq = 12 kHz
[3] [4]
Force VDD
Force VSS , others at Vcc
Power-up AGC
When active
mV
Peak-to-Peak[5]
V
Peak-to-Peak
VIN = 15~300 mV, AGC =
4.7 µF, VCC = 2.4V~5.5V
Across both Speaker pins
When active
mW
VDD = 5.5 V 1Vp-p,
mW
VDD = 4.4 V 1 kHz sine
wave at
mW
VDD= 3 V
AnaIn. RSPK
mW
VDD= 2.4 V
= 8 Ω.
RSPK = 8Ω (Speaker),
V
Typical buzzer
Peak-to-Peak
When active
mA
VDD =4.5 V, REXT= 390 Ω
8 steps of 4dB each
reference to output
15 mV p-p 1 kHz sine
%
wave, Cmessage
weighted
Conditions: VCC = 4.5V, 8 kHz sampling frequency and TA = 25°C, unless otherwise stated.
LED output during Record operation.
VCCA, VCCD and VCCP are connected together. VSSA, VSSP1, VSSP2 and VSSD are connected together.
REC , PLAY , FT , FWD , ERASE , VOL and RESET must be at VCCD.
Balanced input signal applied between MIC+ and MIC- as shown in the applications example. Single-ended MIC+ or
MIC- input is recommended no more than 150 mV p-p.
Jun 28, 2021
Page 17 of 26
Rev2.3
ISD1700
9.2 AC PARAMETERS
CHARACTERISTIC
Sampling Frequency [2]
Duration [3]
SYMBOL
FS
TDur
Rising Time
Falling Time
Debounce Time
Ramp Up Time
Ramp Down Time
Initial Scan Time after
power is applied
Initial Scan Time from PD
state
End Recording Time
LED High Time
LED Flash Time for SE1
LED Flash Time for SE2
LED Flash Time for SE3
LED Flash Time for SE4
SE1 Recorded Duration
SE2 Recorded Duration
SE3 Recorded Duration
SE4 Recorded Duration
Erase Time
Tr
Tf
TDeb
TRU
TRD
TSc1
MIN
4
TYP [1]
MAX
12
Refer to
duration
table
100
100
UNITS
kHz
sec
CONDITIONS
[2] [4]
[3]
DRN/8/FS
nsec
nsec
msec
msec
msec
msec
TSc2
DRN/16/FS
msec
After a PB operation
is run [4]
TER
TLH
TLS1
TLS2
TLS3
TLS4
TSE1
TSE2
TSE3
TSE4
TE
32/FS
0.5K/FS
msec
msec
sec
sec
sec
sec
sec
sec
sec
sec
sec
[4]
192/FS
128/FS
128/FS
3.5K/FS
7.5K/FS
11.5K/FS
15.5K/FS
4K/FS
4K/FS
4K/FS
4K/FS
10MRN/FS
[4]
DRN= device row# [4]
[4]
SE1 not recorded [5]
SE2 not recorded [5]
SE3 not recorded [5]
SE4 not recorded [5]
[4] [5]
[4] [5]
[4] [5]
[4] [5]
MRN=message row #
[4]
Global Erase Wait Time
Global Erase Time
RESET Pulse
TGE1
TGE2
TReset
Settle Time
Settle Time after Reset
LED Error Time
LED Cycle frequency
TSet1
TSet2
TLErr
TCyc
Notes:
20K/FS
34/FS
1
1
128/FS
64/FS
27.5K/FS
4
sec
sec
µsec
msec
msec
msec
Hz
[4] [5]
All Fs [4]
[4]
[4]
[4] [5]
Pending upon FS
[1]
Typical values: VCC = 4.5 V, FS = 8 kHz and @ TA = 25°C, unless otherwise stated.
Characterization data shows that sampling frequency resolution is ±5 percent across temperature and voltage
ranges.
[3]
Characterization data shows that duration resolution is ±5 percent across temperature and voltage ranges.
[4]
Vcc=2.4 V~5.5V
[5]
K = 1024
[2]
Jun 28, 2021
Page 18 of 26
Rev2.3
ISD1700
10 TYPICAL APPLICATION CIRCUITS
The following typical applications examples on ISD1700 Series are for references only.
They make no representation or warranty that such applications shall be suitable for
the use specified. Each design has to be optimized in its own system for the best
performance on voice quality, current consumption, functionalities and etc.
The below notes apply to the following applications examples:
*
**
These capacitors may be needed in order to optimize for the best voice quality, which is also dependent upon
the layout of the PCB. Depending on system requirements, they can be 10 µF, 4.7 µF or other values. Please
refer to the applications notes or consult Nuvoton for layout advice.
It is important to have a separate path for each ground and power back to the related terminals to minimize
the noise. Also, the power supplies should be decoupled as close to the device as possible.
Example #1: Recording using microphone input via push-button controls
Reset
24
23
25
26
19
22
VCC
7
6
4.7 K Ω
5
4.7 µ F
4
3
REC
PLAY
ERASE
RESET
LED
0.1µ F
2
D1
1 KΩ
FWD
VCCD 1
VOL
FT
VSSD 28
SCLK
MOSI
ISD1700
**
VCCA
VCCD
VCCP
VCCD
0.1 µF
*
Gnd
Vcc
**
VCCA
VCCA 21
VSSA 8
SS
vAlert
0.1µ F
*
VCCP
VCCP 14
VSSP1 16 0.1µF
*
*
0.1 µ F
VSSP2 12
MISO
4.7 K Ω
10
0.1 µ F
11
0.1 µ F
Rosc ***
AnaIn
20
ROSC
18
4.7 µ F
15
Speaker
or Buzzer
SP- 13
VCC
Speaker
MIC -
9
4.7 KΩ
SP+
MIC+
AUD
AUD/AUX 17
8050C
VCCD
INT/RDY
27
100 K Ω
AUX
390 Ω
0.1 µ F
Optional
AGC
Optional: based upon the applications
*** At 8kHz sampling freq, Rosc = 80 K
: Digital ground;
Jun 28, 2021
: Analog ground;
Page 19 of 26
: Ground for SP+;
: Ground for SP-
Rev2.3
ISD1700
Example #2: Recording using AnaIn input via push-button controls
Jun 28, 2021
Page 20 of 26
Rev2.3
ISD1700
Example #3: Connecting the SPI Interface to a microcontroller
10.1
GOOD AUDIO DESIGN PRACTICES
Nuvoton’s ChipCorder are very high-quality single-chip voice recording and playback
devices. To ensure the highest quality voice reproduction, it is important that good
audio design practices on layout and power supply decoupling are followed. See
Application Information links below for details.
•
Design considerations for ISD1600B Series (AN-CC1001.pdf)
•
Good Audio Design Practices (apin11.pdf)
•
Single-Chip Board Layout Diagrams (apin12.pdf)
Jun 28, 2021
Page 21 of 26
Rev2.3
ISD1700
11 PACKAGING
11.1 28-LEAD 300-MIL PLASTIC SMALL OUTLINE INTEGRATED CIRCUIT (SOIC)
28 27 26 25 24 23 22 21 20 19 18 17 16 15
2 3 4 5
1
6 7 8 9 10 11 12 13 14
A
G
C
B
D
E
H
F
Plastic Small Outline Integrated Circuit (SOIC) Dimensions
INCHES
MILLIMETERS
Min
Nom
Max
Min
Nom
Max
A
0.701
0.706
0.711
17.81
17.93
18.06
B
0.097
0.101
0.104
2.46
2.56
2.64
C
0.292
0.296
0.299
7.42
7.52
7.59
D
0.005
0.009
0.0115
0.127
0.22
0.29
E
0.014
0.016
0.019
0.35
0.41
0.48
0.050
F
1.27
G
0.400
0.406
0.410
10.16
10.31
10.41
H
0.024
0.032
0.040
0.61
0.81
1.02
Note:
Lead coplanarity to be within 0.004 inches.
Jun 28, 2021
Page 22 of 26
Rev2.3
ISD1700
11.2 28-LEAD 600-MIL PLASTIC DUAL INLINE PACKAGE (PDIP)
Plastic Dual Inline Package (PDIP) (P) Dimensions
INCHES
A
B1
B2
C1
C2
D
D1
E
F
G
H
J
S
0
Jun 28, 2021
Min
1.445
0.065
0.600
0.530
0.015
0.125
0.015
0.055
0.008
0.070
0°
Nom
1.450
0.150
0.070
0.540
0.018
0.060
0.100
0.010
0.075
MILLIMETERS
Max
1.455
Min
36.70
0.075
0.625
0.550
0.19
1.65
15.24
13.46
0.135
0.022
0.065
0.38
3.18
0.38
1.40
0.012
0.080
15°
0.20
1.78
0°
Page 23 of 26
Nom
36.83
3.81
1.78
13.72
0.46
1.52
2.54
0.25
1.91
Max
36.96
1.91
15.88
13.97
4.83
3.43
0.56
1.65
0.30
2.03
15°
Rev2.3
ISD1700
12 ORDERING INFORMATION
Jun 28, 2021
Page 24 of 26
Rev2.3
ISD1700
13 REVISION HISTORY
VERSION
DATE
1.0
Sep, 2006
Initial version
1.1
Nov, 2006
Revise Pinout Configuration & Pin Description sections
1.2
Jan, 2007
Revise Rosc resistor value
Revise Selectable Message Duration section
Update standby current, sampling frequency & duration
parameters
1.3
Oct 31, 2008
Change logo.
2.0
Feb 4, 2010
Remove preliminary sign.
2.1
Mar, 2017
2.2
Apr 1, 2020
2.3
Jun 28, 2021
Jun 28, 2021
DESCRIPTION
Removed TSOP pakage option (Not recommended for
new Desig)
Update Document Format
Update Ordering Information
Page 25 of 26
Rev2.3
ISD1700
Important Notice
Nuvoton Products are neither intended nor warranted for usage in systems or equipment, any
malfunction or failure of which may cause loss of human life, bodily injury or severe property
damage. Such applications are deemed, “Insecure Usage”.
Insecure usage includes, but is not limited to: equipment for surgical implementation, atomic
energy control instruments, airplane or spaceship instruments, the control or operation of
dynamic, brake or safety systems designed for vehicular use, traffic signal instruments, all types
of safety devices, and other applications intended to support or sustain life.
All Insecure Usage shall be made at customer’s risk, and in the event that third parties lay claims
to Nuvoton as a result of customer’s Insecure Usage, customer shall indemnify the damages and
liabilities thus incurred by Nuvoton.
Jun 28, 2021
Page 26 of 26
Rev2.3
工商网监
湘ICP备2023018690号
