HEF4541BT,653

HEF4541B Programmable timer Rev. 6 — 25 November 2021 Product data sheet 1. General description The HEF4541B is a programmable timer. It consists of a 16-stage binary counter, an integrated oscillator to be used with external timing components, an automatic power-on reset and output control logic. The external components RTC and CTC determines the frequency of the oscillator within the frequency range 1 Hz to 100 kHz. An external clock signal at input RS can replace the oscillator. The timer advances on the positive-going transition of RS. A LOW on the auto reset input (AR) and a LOW on the master reset input (MR) enables the internal power-on reset. A HIGH level at input MR resets the counter independent on all other inputs. Resetting, disables the oscillator to provide no active power dissipation. A HIGH at input AR turns off the power-on reset to provide a low quiescent power dissipation of the 8 10 13 16 timer. The 16-stage counter divides the oscillator frequency by 2 , 2 , 2 or 2 depending on the state of the address inputs (A0, A1). The divided oscillator frequency is available at output O. The phase input (PH) features a complementary output signal. When the mode select input (MODE) is n LOW the timer is a single transition timer and when HIGH the timer is a 2 frequency divider. It operates over a recommended VDD power supply range of 3 V to 15 V referenced to VSS (usually ground). Unused inputs must be connected to VDD, VSS, or another input. 2. Features and benefits • • • • • • • • • Wide supply voltage range from 3.0 V to 15.0 V CMOS low power dissipation High noise immunity Fully static operation 5 V, 10 V, and 15 V parametric ratings Standardized symmetrical output characteristics Complies with JEDEC standard JESD 13-B ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-A exceeds 200 V Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package HEF4541BT Temperature range Name Description Version -40 °C to +125 °C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 HEF4541B Nexperia Programmable timer 4. Functional diagram AR MR PH 5 6 RS CTC RTC 3 2 1 A0 12 CP POWER-ON RESET CD A1 MODE 13 10 CONTROL INPUTS 8 OUTPUT STAGE BINARY COUNTER O 9 001aai581 Fig. 1. Functional diagram CTC RTC 28 COUNTER CP RESET RS 28 28 COUNTER CP RESET 22 25 28 A0 MUX A1 AR POWER-ON RESET LATCH MR MODE PH O 001aai583 Fig. 2. Logic diagram HEF4541B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 25 November 2021 © Nexperia B.V. 2021. All rights reserved 2 / 14 HEF4541B Nexperia Programmable timer 5. Pinning information 5.1. Pinning HEF4541B RTC 1 14 VDD CTC 2 13 A1 RS 3 12 A0 n.c. 4 11 n.c. AR 5 10 MODE MR 6 9 PH VSS 7 8 O 001aai582 Fig. 3. Pin configuration for SOT108-1 (SO14) 5.2. Pin description Table 2. Pin description Symbol Pin Description RTC 1 external resistor connection CTC 2 external capacitor connection RS 3 external resistor connection (RS) or external clock input n.c. 4, 11 not connected AR 5 auto reset input (active low) MR 6 master reset input VSS 7 ground (0 V) O 8 timer output PH 9 phase input MODE 10 mode select input A0, A1 12, 13 address inputs VDD 14 supply voltage HEF4541B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 25 November 2021 © Nexperia B.V. 2021. All rights reserved 3 / 14 HEF4541B Nexperia Programmable timer 6. Functional description Table 3. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care. MODE Input AR MR PH MODE H L X X auto reset disabled L L X X auto reset enabled[1] X H X X master reset active X L X H normal operation selected division to output X L X L single-cycle mode[2] X L L X output initially LOW after reset X L H X output initially HIGH, after reset [1] [2] For correct power-on reset, the supply voltage should be above 8.5 V. For VDD < 8.5 V, disable the auto reset and connect AR to VDD. n-1 The timer is initialized on a reset pulse and the output changes state after 2 counts and remains in that state (latched). A master reset or a LOW to HIGH transition on the MODE input, resets this latch. Table 4. Frequency selection table A0 A1 Number of counter stages n L L 13 8192 L H 10 1024 H L 8 256 H H 16 65536 7. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Symbol Parameter Min Max Unit VDD supply voltage -0.5 +18 V IIK input clamping current - ±10 mA VI input voltage IOK output clamping current VO < -0.5 V or VO > VDD + 0.5 V -0.5 VDD + 0.5 - ±10 mA II/O input/output current O output - ±10 mA Tstg storage temperature -65 +150 °C Tamb ambient temperature -40 +125 °C Ptot total power dissipation - 500 mW P power dissipation - 100 mW [1] Conditions VI < -0.5 V or VI > VDD + 0.5 V Tamb = -40 °C to +125 °C [1] V For SOT108-1 (SO14) package: Ptot derates linearly with 10.1 mW/K above 100 °C. HEF4541B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 25 November 2021 © Nexperia B.V. 2021. All rights reserved 4 / 14 HEF4541B Nexperia Programmable timer 8. Recommended operating conditions Table 6. Recommended operating conditions Symbol Parameter Conditions Min Max Unit VDD supply voltage 3 15 V VI input voltage 0 VDD V Tamb ambient temperature in free air -40 +125 °C Δt/ΔV input transition rise and fall rate VDD = 5 V - 3.75 μs/V VDD = 10 V - 0.5 μs/V VDD = 15 V - 0.08 μs/V 9. Static characteristics Table 7. Static characteristics VSS = 0 V; VI = VSS or VDD; unless otherwise specified. Symbol Parameter VIH VIL VOH VOL IOH Conditions VDD Tamb = -40 °C Tamb = 25 °C Tamb = 85 °C Tamb = 125 °C Unit Min Max Min Max Min Max Min Max 5V 3.5 - 3.5 - 3.5 - 3.5 - V 10 V 7.0 - 7.0 - 7.0 - 7.0 - V 15 V 11.0 - 11.0 - 11.0 - 11.0 - V 5V - 1.5 - 1.5 - 1.5 - 1.5 V 10 V - 3.0 - 3.0 - 3.0 - 3.0 V 15 V - 4.0 - 4.0 - 4.0 - 4.0 V 5V 4.95 - 4.95 - 4.95 - 4.95 - V 10 V 9.95 - 9.95 - 9.95 - 9.95 - V 15 V 14.95 - 14.95 - 14.95 - 14.95 - V 5V - 0.05 - 0.05 - 0.05 - 0.05 V 10 V - 0.05 - 0.05 - 0.05 - 0.05 V 15 V - 0.05 - 0.05 - 0.05 - 0.05 V CTC, RTC; HIGH-level output current VO = 2.5 V 5V - -1.4 - -1.2 - -0.95 - -0.95 mA VO = 4.6 V 5V - -0.5 - -0.4 - -0.3 - -0.3 VO = 9.5 V 10 V - -1.4 - -1.2 - -0.95 - -0.95 mA VO = 13.5 V 15 V - -4.8 - -4.0 - -3.2 - -3.2 mA VO = 2.5 V 5V - -1.7 - -1.4 - -1.1 - -1.1 mA VO = 4.6 V 5V - -0.64 - -0.5 - -0.36 - -0.36 mA VO = 9.5 V 10 V - -1.6 - -1.3 - -0.9 - -0.9 mA VO = 13.5 V 15 V - -4.2 - -3.4 - -2.4 - -2.4 mA HIGH-level input voltage |IO| < 1 μA LOW-level input voltage |IO| < 1 μA HIGH-level |IO| < 1 μA output voltage LOW-level |IO| < 1 μA output voltage mA O; HEF4541B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 25 November 2021 © Nexperia B.V. 2021. All rights reserved 5 / 14 HEF4541B Nexperia Programmable timer Symbol Parameter IOL Conditions CTC, RTC; LOW-level output current VO = 0.4 V VDD Tamb = -40 °C Tamb = 25 °C Tamb = 85 °C Tamb = 125 °C Unit Min Max Min Max Min Max Min Max 5V 0.33 - 0.27 - 0.20 - 0.20 - mA VO = 0.5 V 10 V 1.0 - 0.85 - 0.68 - 0.68 - mA VO = 1.5 V 15 V 3.2 - 2.7 - 2.3 - 2.3 - mA VO = 0.4 V 5V 0.64 - 0.5 - 0.36 - 0.36 - mA VO = 0.5 V 10 V 1.6 - 1.3 - 0.9 - 0.9 - mA VO = 1.5 V 15 V 4.2 - 3.2 - 2.4 - 2.4 - mA O; II input leakage current 15 V - ±0.1 - ±0.1 - ±1.0 - ±1.0 μA IDD supply current IO = 0 A 5V - 5 - 5 - 150 - 150 μA 10 V - 10 - 10 - 300 - 300 μA 15 V - 20 - 20 - 600 - 600 μA - - - - 7.5 - - - - pF CI input capacitance Table 8. Reset characteristics VSS = 0 V; VI = VSS or VDD; see Table 12 for test conditions; unless otherwise specified. VDD Min Max Min Max Min Max IDD 5V - 80 - 20 80 - 230 - 230 μA 10 V - 750 - 250 600 - 700 - 700 μA 15 V - 1.6 - 0.5 1.3 - 1.5 - 1.5 mA - - - 8.5 5 - - - - - VDD supply current supply voltage HEF4541B Product data sheet supply current for power-on reset enable; AR = MR = 0 V; other inputs at 0 V or VDD supply voltage for automatic reset initialization; AR = MR = 0 V; other inputs at 0 V or VDD Tamb = -40 °C Tamb = +25 °C Tamb = +85 °C Tamb = +125 °C Unit Symbol Parameter Conditions Min Typ Max All information provided in this document is subject to legal disclaimers. Rev. 6 — 25 November 2021 © V Nexperia B.V. 2021. All rights reserved 6 / 14 HEF4541B Nexperia Programmable timer 10. Dynamic characteristics Table 9. Dynamic characteristics VSS = 0 V; Tamb = 25 °C unless otherwise specified. For test circuit, see Fig. 5. Symbol Parameter tpd propagation delay Conditions 10 RS to O; 2 see Fig. 4 13 RS to O; 2 see Fig. 4 tW pulse width fclk(max) fosc 16 selected; selected; selected; Typ[1] Max Unit [2] 348 ns + (0.55 ns/pF)CL - 375 750 ns 10 V 139 ns + (0.23 ns/pF)CL - 150 300 ns 15 V 102 ns + (0.16 ns/pF)CL - 110 220 ns 5V 398 ns + (0.55 ns/pF)CL - 425 850 ns 10 V 154 ns + (0.23 ns/pF)CL - 165 330 ns 15 V 112 ns + (0.16 ns/pF)CL - 120 240 ns 5V 483 ns + (0.55 ns/pF)CL - 510 1020 ns 10 V 179 ns + (0.23 ns/pF)CL - 190 380 ns 15 V 127 ns + (0.16 ns/pF)CL - 135 270 ns 5V 548 ns + (0.55 ns/pF)CL - 575 1150 ns 10 V 199 ns + (0.23 ns/pF)CL - 210 420 ns 15 V 142 ns + (0.16 ns/pF)CL - 150 300 ns 5V RS LOW; MR HIGH; see Fig. 4 maximum clock frequency RS; see Fig. 4 oscillator frequency Rt = 5 kΩ; Ct = 1 nF; RS = 10 kΩ; see Fig. 6 Rt = 56 kΩ; Ct = 1 nF; RS = 120 kΩ; see Fig. 6 [1] [2] [3] Min 5V RS to O; 2 selected; see Fig. 4 RS to O; 2 see Fig. 4 Extrapolation formula VDD 8 60 30 - ns 10 V [3] 30 15 - ns 15 V 24 12 - ns 5V 8 16 - MHz 10 V 15 30 - MHz 15 V 18 36 - MHz 5V - 90 - kHz 10 V - 90 - kHz 15 V - 90 - kHz 5V - 8 - kHz 10 V - 8 - kHz 15 V - 8 - kHz The typical values of the propagation delay and transition times are calculated from the extrapolation formulas shown (CL in pF). tpd is the same as tPHL and tPLH. tW is the same as tWL(min) and tWH(min). Table 10. Dynamic power dissipation PD can be calculated from the formulas shown. VSS = 0 V; tr = tf ≤ 20 ns; Tamb = 25 °C. Symbol Parameter VDD Typical formula[1] PD dynamic power dissipation Per package 2 5V PD = 1300 × fi + (fo × CL × VDD ) μW 10 V PD = 5300 × fi + (fo × CL × VDD ) μW 15 V PD = 12000 × fi + (fo × CL × VDD ) μW 2 2 Total, using the on-chip oscillator 2 PD = 1300 × fosc + foCLVDD + 2CTCVDD fosc + 10VDD μW 10 V PD = 5300 × fosc + foCLVDD + 2CTCVDD fosc + 100VDD μW 15 V [1] 2 5V 2 2 2 2 PD = 12000 × fosc + foCLVDD + 2CTCVDD fosc + 400VDD μW fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VDD = supply voltage in V; fosc = oscillator frequency in MHz; CTC = timing capacitance in pF. HEF4541B Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 25 November 2021 © Nexperia B.V. 2021. All rights reserved 7 / 14 HEF4541B Nexperia Programmable timer 10.1. Waveforms and test circuit (1) 1/fclk(max) VI VM RS input VSS VOH tWH(min) tPLH tWL(min) tPHL VM O output VOL VI MR input VSS tWH(min) aaa-003391 VOL and VOH are typical output voltage levels that occur with the output load. Measurement points are given in Table 11. n (1) 2 pulses as selected by address inputs (A0, A1). Fig. 4. Propagation delay clock (RS) to output (O), clock pulse width and maximum clock frequency Table 11. Measurement points Supply voltage Input Output VDD VM VM 5 V to 15 V 0.5VDD 0.5VDD VDD G VI VO DUT CL RT 001aag182 Test data is given in Table 12. Definitions for test circuit: RL = Load resistance. CL = Load capacitance. RT = Termination resistance should be equal to output impedance of Zo of the pulse generator. Fig. 5. Test circuit for measuring switching times Table 12. Test data Supply Input VDD VI tr, tf CL 5 V to 15 V VSS or VDD ≤ 20 ns 50 pF HEF4541B Product data sheet Load All information provided in this document is subject to legal disclaimers. Rev. 6 — 25 November 2021 © Nexperia B.V. 2021. All rights reserved 8 / 14 HEF4541B Nexperia Programmable timer 11. Application information RC oscillator timing component limitations RTCCTC determines the oscillator frequency, provided RTC