NJU8752/52B
NJU3555
PRELIMINARY
Analog Signal Input Class D Amplifier for Piezo Speaker
! PACKAGE OUTLINE
! GENERAL DESCRIPTION
The NJU8752/NJU8752B is an analog signal input
monaural class D amplifier for Piezo speaker. The
NJU8752/52B includes Inversion operational amplifier
input circuit, PWM modulator, an output-short protector
and a low voltage detector. Input part operates on
3.3V(TYP) as power supply and Output part operates
up to 16.0V(MAX). Therefore, it drives Piezo speaker
with louder sound and High efficiency.
The NJU8752/52B incorporates BTL amplifier, which
eliminate AC coupling capacitors, capable of driving
Piezo speaker with simple external LC low-pass filters.
Class D operation achieves lower power operation for
Piezo speaker, thus the NJU8752/52B is suited for
battery powered applications.
NJU8752V / 52BV
NJU8752BKM1
! FEATURES
#
#
#
#
#
#
#
#
#
NJU8752BKP4
Piezo Speaker Driving
1-channel Analog Signal Input, 1-channel BTL Output
Standby(Hi-Z), Mute Control
Voltage Gain
31dB(NJU8752)
20dB(NJU8752B)
Built-in Low Voltage Detector
Built-in Short Protector
Operating Voltage Input: 2.7 ~ 3.6V (NJU8752)
3.1 ~ 3.6V (NJU8752B)
Output: 6.0 ~ 16.0V
C-MOS Technology
Package Outline
SSOP14 (NJU8752 / 52B)
QFN20 / QFN28 (NJU8752B)
VSS
COM
TEST 2
STBYB
VSS
OUTN
VDDO
20
NC
VDD
NC
VSS
NC
SSOP14 (NJU8752V / 52BV)
1
COM
TEST 2
STBYB
VSS
OUTN
1
COM
NC
TEST 2
STBYB
VSS
NC
OUTN
IN
TEST 1
MUTEB
NC
VSS
NC
OUTP
QFN28 (NJU8752BKP4)
VDDO
VDDO
NC
VDDO
VDDO
IN
TEST 1
MUTEB
VSS
OUTP
28
VDDO
VDDO
NC
NC
NC
VDDO
VDDO
14
13
12
11
10
9
8
1
2
3
4
5
6
7
VDD
IN
TEST 1
MUTEB
VSS
OUTP
VDDO
NC
NC
VDD
NC
VSS
NC
NC
! PIN CONFIGURATION
QFN20 (NJU8752BKM1)
Ver.2004-08-05
-1-
NJU8752/52B
! BLOCK DIAGRAM
VDD
VSS
VDDO
IN
OUTP
+
VSS
Pulse
Width
Modulator
-
VDDO
OUTN
+
COM
VSS
Short
Protector
Soft Start
Control
Low Voltage
Detector
Logic
MUTEB
TEST 1
STBYB
TEST 2
! PIN DESCRIPTION
SSOP14
1
2
No.
QFN20
19
1
QFN28
26
1
3
2
4
SYMBOL
I/O
VDD
IN
−
I
2
TEST 1
I
3
3
MUTEB
I
5,10,14
6
7,8
9
4,12,17
5
6,7,9,10
11
5,17,24
7
8,9,13,14
15
VSS
OUTP
VDDO
OUTN
−
O
−
O
11
13
18
STBYB
I
12
14
19
TEST 2
I
Function
Power Supply: VDD=3.3V
Signal Input
Maker test 1
This pin must be connected to GND.
Mute Control
Low : Mute ON
High : Mute OFF
Power GND: VSS=0V
Positive Output
Output Power Supply : VDDO=16.0V max.
Negative Output
Standby Control
Low : Standby ON
High : Standby OFF
Maker test 2
This pin must be connected to GND.
Analog common
21
COM
−
4,6,10,11,
Non connection
−
8,16,18,20 12,16,20,22,
NC
−
23,25,27,28
*VSS(SSOP14:Pin No.5,10,14, QFN20:Pin No.4,12,17, QFN28:Pin No.5,17,24) should be connected
at a nearest point to the IC.
*VDDO(SSOP14:Pin No.7,8, QFN20:Pin No.6,7,9,10, QFN28:Pin No.8,9,13,14) should be connected
at a nearest point to the IC.
*MUTEB(SSOP14: Pin No.4, QFN20, QFN28:Pin No.3) and STBYB(SSOP14:Pin No.11, QFN20:Pin No.13,
QFN28:Pin No.18) must be connected to VDD, when these pins are not used.
13
-2-
15
Ver.2004-08-05
NJU8752/52B
NJU3555
! FUNCTIONAL DESCRIPTION
(1) Signal Output
The OUTP and OUTN generate PWM output signals, which will be converted to analog signal via external
2nd-order or higher LC filter. A switching regulator with a high response against a voltage fluctuation is the best
selection for the VDDO, which are the power supply for output drivers. To obtain better THD performance, the
stabilization of the power is required.
(2) Standby
By setting the STBYB pin to “L”, the standby mode is enabled. In the standby mode, the entire functions of the
NJU8752/52B enter a low-power state, and the output pins (OUTP and OUTN) are high impedance.
(3) Mute
By setting the MUTEB pin to “L”, the Mute function is enabled. In the Mute mode, the output pins (OUTP and
OUTN) output square wave (Duty: 50%).
(4) Low Voltage Detector
When the power supply voltage drops down to below VDD (MIN), the internal oscillation is halted for prevention
to generate unwanted frequency, and the output pins (OUTP and OUTN) become in high impedance.
(5) Short Circuit Protection
The short protector, which protects the NJU8752/52B against high short-circuit current, turns off the output
driver. After about 5 seconds from the protection, the NJU8752/52B returns to normal operation. The short
protector functions at the following accidents.
• Short
• Short
• Short
between OUTP and OUTN
between OUTP and VSS
between OUTN and VSS
Note 1) The detectable current and the period for the protection depend on the power supply voltage
and ambient temperature.
Note 2) The short protector is not effective for a long term short-circuit but for an instantaneous accident.
Continuous high-current may cause permanent damage to the NJU8752/52B.
Ver.2004-08-05
-3-
NJU8752/52B
! ABSOLUTE MAXIMUM RATINGS
(Ta=25°C)
PARAMETER
SYMBOL
RATING
UNIT
Supply Voltage
VDD
VDDO
-0.3 ~ +4.0
-0.3 ~ +18.0
V
V
Input Voltage
Operating Temperature
Storage Temperature
SSOP14
Power Dissipation QFN20
QFN28
Vin
Topr
Tstg
-0.3 ~ VDD+0.3
V
-40 ~ +85
°C
-40 ~ +125
°C
450
PD
mW
620
640
* : Mounted on two-layer board of based on the JEDEC.
Note 1) All voltage are relative to “VSS =0V” reference.
Note 2) The LSI must be used inside of the “Absolute maximum ratings”. Otherwise, a stress may cause
permanent damage to the LSI.
Note 3) De-coupling capacitors for VDD-VSS and VDDO-VSS should be connected for stable operation.
! ELECTRICAL CHARACTERISTICS
-NJU8752(Ta=25°C, VDD=3.3V, VDDO=12.0V, VSS=0V,Input Signal=1kHz, Input Signal Level=200mVrms,
Frequency Band=20Hz~20kHz, Load Impedance=0.8µF, 2nd-order 34kHz LC Filter(Q=0.75))
PARAMETER
VDD Supply Voltage
VDDO Supply Voltage
Input Impedance
Voltage Gain
Output THD
Maximum Output
S/N
Dynamic Range
Maximum Mute Attenuation
Operating Current(Stanby)
Operating Current
(No signal input)
Input Voltage
Input Leakage Current
-4-
SYMBOL
VDD
VDDO
ZIN
AV
THD
Vo
SN
Drange
MAT
IST
IDD
VIH
VIL
ILK
CONDITIONS
IN pin
Input Signal Level
=200mVrms
Output THD=10%
A weight
A weight
No-load operating
No Signal Input
MUTEB, STBYB pins
MUTEB, STBYB pins
MUTEB, STBYB pins
MIN
2.7
6.0
-
TYP
3.3
12.0
20
31
MAX
3.6
16.0
-
UNIT
V
V
kΩ
dB
Note
-
0.05
0.08
%
4
7
90
-
10
80
83
-
1
Vrms
dB
dB
dB
µA
-
3.5
10
mA
0.7VDD
0
-
-
VDD
0.3VDD
±1.0
V
V
µA
4
4
Ver.2004-08-05
NJU8752/52B
NJU3555
-NJU8752B(Ta=25°C, VDD=3.3V, VDDO=12.0V, VSS=0V,Input Signal=1kHz, Input Signal Level=700mVrms,
Frequency Band=20Hz~20kHz, Load Impedance=0.8µF, 2nd-order 34kHz LC Filter(Q=0.75))
SYMBOL
VDD
VDDO
ZIN
AV
PARAMETER
VDD Supply Voltage
VDDO Supply Voltage
Input Impedance
Voltage Gain
THD
Output THD
Maximum Output
S/N
Dynamic Range
Maximum Mute Attenuation
Operating Current(Stanby)
Operating Current
(No signal input)
Input Voltage
Input Leakage Current
Vo
SN
Drange
MAT
IST
IDD
VIH
VIL
ILK
CONDITIONS
IN pin
Input Signal Level
=700mVrms
Output THD=10%
A weight
A weight
No-load operating
No Signal Input
MUTEB, STBYB pins
MUTEB, STBYB pins
MUTEB, STBYB pins
MIN
3.1
6.0
-
TYP
3.3
12.0
20
20
MAX
3.6
16.0
-
UNIT
V
V
kΩ
dB
Note
-
0.05
0.08
%
4
7
-
10
80
83
90
-
1
Vrms
dB
dB
dB
µA
-
3.5
10
mA
0.7VDD
0
-
-
VDD
0.3VDD
±1.0
V
V
µA
4
4
Note 4) Test system of the output THD, S/N and Dynamic Range
The output THD, S/N and dynamic range are tested in the system shown in Figure 1, where a 2nd-order
LC LPF and another filter incorporated in an audio analyzer are used.
Input Signal
NJU8752/52B
2nd-order
LC LPF
NJU8752/52B Test Board
Filter
20kHz
(AES17)
THD
Measuring
Apparatus
Audio Analyzer
Figure 1. Output THD, S/N and Dynamic Range Test System
2nd-order LPF
Filters
Ver.2004-08-05
: Refer to “Typical Application Circuit”.
: 22Hz HPF + 20kHz LPF(AES17)
(with the A-Weight filter for S/N and Dynamic-range tests)
-5-
NJU8752/52B
! TYPICAL APPLICATION CIRCUIT
•LLB2520 is manufactured by TOKO, INC.
For detail information, please refer its technical papers.
VDD
10µF 0.1µF
5~10Ω
OUTP(6)
VDD(1)
2.2µF
IN
IN(2)
COM(13)
0.01µF
10µF
MUTEB(4)
STBYB(11)
NJU8752/52B
VSS(14)
3.3kΩ
2.2µF
IN
IN(1)
COM(15)
0.01µF
10µF
MUTEB(3)
STBYB(13)
TEST1(2)
TEST2(14)
Figure 2.2
-6-
LLB2520
33~47µH
0.1µF
10µF
0.1µF
10µF
0.5~2µF
0.1µF
VDDO
VSS(5)
5~10Ω
LLB2520
33~47µH
5~10Ω
LLB2520
33~47µH
OUTP(5)
VDD(19)
VSS(17)
3.3kΩ
5~10Ω
VDDO
Application Circuit example (SSOP14)
NJU8752/52B
VDD
VDDO(7)
Piezo Speaker
0.1µF
VSS(10)
TEST2(12)
10µF 0.1µF
OUTN(9)
VDDO(8)
TEST1(3)
Figure 2.1
LLB2520
33~47µH
OUTN(11)
VDDO(6,7)
Piezo Speaker
0.1µF
0.1µF
10µF
0.1µF
10µF
0.5~2µF
0.1µF
VDDO
VSS(4)
VDDO(9,10)
VDDO
VSS(12)
Application Circuit example (QFN20)
Ver.2004-08-05
NJU8752/52B
NJU3555
•LLB2520 is manufactured by TOKO, INC.
For detail information, please refer its technical papers.
VSS(24)
2.2µF
3.3kΩ
IN
IN(1)
COM(21)
0.01µF
10µF
MUTEB(3)
STBYB(18)
TEST1(2)
TEST2(19)
Figure 2.3
LLB2520
33~47µH
5~10Ω
LLB2520
33~47µH
OUTP(7)
VDD(26)
NJU8752/52B
VDD
10µF 0.1µF
5~10Ω
OUTN(15)
VDDO(8,9)
Piezo Speaker
0.1µF
0.1µF
10µF
0.1µF
10µF
0.5~2µF
0.1µF
VDDO
VSS(5)
VDDO(13,14)
VDDO
VSS(17)
Application Circuit example (QFN28)
Note 5) De-coupling capacitors must be connected between each power supply pin and GND.
The capacity value should be adjusted on the application circuit and the operation temperature. It may
malfunction if capacity value is small.
Note 6) The power supply for VDDO require fast driving response performance such as a switching regulator for
better THD.
THD performance becomes worse by ripple if the capacity of De-coupling capacitors is small.
Note 7) The above circuit shows only application example and does not guarantee the any electrical
characteristics. Therefore, please test the circuit carefully to fit your application.
The cutoff frequency of the LC filter influences the quality of sound.
The Q factor of the LC filter must be less than “1”. Otherwise, the operating current increase when the
frequency of input signal is closed to the cutoff frequency.
Note 8) The transition time for MUTEB and STBYB signals must be less than 100µs. Otherwise, a malfunction
may be occurred.
Note 9) (1)-(26) indicates pin number.
[CAUTION]
The specifications on this databook are only
given for information , without any guarantee
as regards either mistakes or omissions. The
application circuits in this databook are
described only to show representative usages
of the product and not intended for the
guarantee or permission of any right including
the industrial rights.
Ver.2004-08-05
-7-