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74AHC1G79GW,165

74AHC1G79GW,165

  • 厂商:

    NEXPERIA(安世)

  • 封装:

    TSSOP5

  • 描述:

    IC FF D-TYPE SNGL 1BIT 5TSSOP

  • 数据手册
  • 价格&库存
74AHC1G79GW,165 数据手册
Important notice Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS semiconductors with its focus on the automotive, industrial, computing, consumer and wearable application markets In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below. Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/, use http://www.nexperia.com Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use salesaddresses@nexperia.com (email) Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on the version, as shown below: - © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights reserved Should be replaced with: - © Nexperia B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e-mail or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and understanding, Kind regards, Team Nexperia 74AHC1G79; 74AHCT1G79 Single D-type flip-flop; positive-edge trigger Rev. 6 — 23 September 2014 Product data sheet 1. General description 74AHC1G79 and 74AHCT1G79 are high-speed Si-gate CMOS devices. They provide a single positive-edge triggered D-type flip-flop. Information on the data input is transferred to the Q output on the LOW-to-HIGH transition of the clock pulse. The D input must be stable one set-up time prior to the LOW-to-HIGH clock transition for predictable operation. The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V. The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V. 2. Features and benefits       Symmetrical output impedance High noise immunity Low power dissipation Balanced propagation delays SOT353-1 and SOT753 package options ESD protection:  HBM JESD22-A114F: exceeds 2000 V  MM JESD22-A115-A: exceeds 200 V  CDM JESD22-C101C: exceeds 1000 V  Specified from 40 C to +125 C 3. Ordering information Table 1. Ordering information Type number 74AHC1G79GW Package Temperature range Name Description Version 40 C to +125 C TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 40 C to +125 C SC-74A plastic surface-mounted package; 5 leads SOT753 74AHCT1G79GW 74AHC1G79GV 74AHCT1G79GV 74AHC1G79; 74AHCT1G79 NXP Semiconductors Single D-type flip-flop; positive-edge trigger 4. Marking Table 2. Marking codes Type number Marking[1] 74AHC1G79GW AP 74AHC1G79GV A79 74AHCT1G79GW CP 74AHCT1G79GV C79 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram  ' 4    &3  '  &3 PQD PQD Fig 1. 4 Logic symbol Fig 2. &3 IEC logic symbol & & ' & & 7* 7* & Fig 3. & & 4 & 7* 7* & & PQD Logic diagram 74AHC_AHCT1G79 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 23 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 2 of 13 74AHC1G79; 74AHCT1G79 NXP Semiconductors Single D-type flip-flop; positive-edge trigger 6. Pinning information 6.1 Pinning $+&* $+&7* '  &3  *1'   9&&  4 DDI Fig 4. Pin configuration 6.2 Pin description Table 3. Pin description Symbol Pin Description D 1 data input CP 2 clock pulse input GND 3 ground (0 V) Q 4 data output VCC 5 supply voltage 7. Functional description Table 4. Function table[1] Inputs Output CP D Q+1  L L  H H L X Q [1] H = HIGH voltage level; L = LOW voltage level;  = LOW-to-HIGH CP transition; X = don’t care; Q + 1 = state after the next LOW-to-HIGH CP transition. 74AHC_AHCT1G79 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 23 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 3 of 13 74AHC1G79; 74AHCT1G79 NXP Semiconductors Single D-type flip-flop; positive-edge trigger 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions VCC supply voltage VI input voltage IIK input clamping current VI < 0.5 V IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V IO output current 0.5 V < VO < VCC + 0.5 V ICC IGND Tstg storage temperature Max Unit 0.5 +7.0 V 0.5 +7.0 V 20 - mA - 20 mA - 25 mA supply current - 75 mA ground current 75 - mA 65 +150 C - 250 mW [1] Tamb = 40 C to +125 C total power dissipation Ptot Min [2] [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For both TSSOP5 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K. 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74AHC1G79 Min Typ 74AHCT1G79 Max Min Typ Unit Max VCC supply voltage 2.0 5.0 5.5 4.5 5.0 5.5 V VI input voltage 0 - 5.5 0 - 5.5 V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature 40 +25 +125 40 +25 +125 C t/V input transition rise and fall rate VCC = 3.3 V  0.3 V - - 100 - - - ns/V VCC = 5.0 V  0.5 V - - 20 - - 20 ns/V 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 2.0 V 1.5 - - 1.5 - 1.5 - V VCC = 3.0 V 2.1 - - 2.1 - 2.1 - V VCC = 5.5 V 3.85 - - 3.85 - 3.85 - V VCC = 2.0 V - - 0.5 - 0.5 - 0.5 V VCC = 3.0 V - - 0.9 - 0.9 - 0.9 V VCC = 5.5 V - - 1.65 - 1.65 - 1.65 V For type 74AHC1G79 VIH VIL HIGH-level input voltage LOW-level input voltage 74AHC_AHCT1G79 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 23 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 4 of 13 74AHC1G79; 74AHCT1G79 NXP Semiconductors Single D-type flip-flop; positive-edge trigger Table 7. Static characteristics …continued Voltages are referenced to GND (ground = 0 V). Symbol Parameter VOH VOL 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max HIGH-level VI = VIH or VIL output voltage IO = 50 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 50 A; VCC = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V IO = 50 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 4.0 mA; VCC = 3.0 V 2.58 - - 2.48 - 2.40 - V IO = 8.0 mA; VCC = 4.5 V 3.94 - - 3.8 - 3.70 - V LOW-level VI = VIH or VIL output voltage IO = 50 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 A; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V IO = 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V - - 0.1 - 1.0 - 2.0 A II input leakage current VI = 5.5 V or GND; VCC = 0 V to 5.5 V ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.0 - 10 - 40 A CI input capacitance - 1.5 10 - 10 - 10 pF For type 74AHCT1G79 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V VOH HIGH-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = 50 A 4.4 4.5 - 4.4 - 4.4 - V 3.94 - - 3.8 - 3.70 - V - 0 0.1 - 0.1 - 0.1 V - - 0.36 - 0.44 - 0.55 V - - 0.1 - 1.0 - 2.0 A IO = 8.0 mA VOL LOW-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = 50 A IO = 8.0 mA II input leakage current ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.0 - 10 - 40 A ICC additional per input pin; VI = 3.4 V; supply current other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.35 - 1.5 - 1.5 mA CI input capacitance - 1.5 10 - 10 - 10 pF 74AHC_AHCT1G79 Product data sheet VI = 5.5 V or GND; VCC = 0 V to 5.5 V All information provided in this document is subject to legal disclaimers. Rev. 6 — 23 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 5 of 13 74AHC1G79; 74AHCT1G79 NXP Semiconductors Single D-type flip-flop; positive-edge trigger 11. Dynamic characteristics Table 8. Dynamic characteristics GND = 0 V; tr = tf =  3.0 ns. For test circuit see Figure 6. For waveforms see Figure 5. Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max - 4.9 8.4 1.0 9.8 1.0 11.5 ns - 6.9 12.0 1.0 14.0 1.0 15.5 ns CL = 15 pF - 3.5 5.6 1.0 7.0 1.0 8.0 ns CL = 50 pF - 5.1 8.0 1.0 10.0 1.0 11.0 ns For type 74AHC1G79 tpd propagation delay [1] CP to Q VCC = 3.0 V to 3.6 V [2] CL = 15 pF CL = 50 pF VCC = 4.5 V to 5.5 V [3] tsu set-up time D to CP 3.0 1.0 - 3.0 - 4.0 - ns th hold time D to CP +2.0 1.0 - 2.0 - 3.0 - ns tW pulse width clock HIGH or LOW 3.0 - - 3.0 - 4.0 - ns fmax maximum frequency 90 - - 90 - 70 - MHz CPD power dissipation capacitance - 15 - - - - - pF - 3.5 5.0 1.0 6.0 1.0 8.0 ns per buffer; CL = 50 pF; f = 1 MHz; VI = GND to VCC [4] CP to Q [1] For type 74AHCT1G79 tpd propagation delay VCC = 4.5 V to 5.5 V [3] CL = 15 pF - 5.0 8.0 1.0 10.0 1.0 11.0 ns tsu set-up time D to CP CL = 50 pF 3.0 1.0 - 3.0 - 4.0 - ns th hold time D to CP +2.0 1.0 - 2.0 - 3.0 - ns tW pulse width clock HIGH or LOW 3.0 - - 3.0 - 4.0 - ns fmax maximum frequency 90 - - 90 - 70 - MHz CPD power dissipation capacitance - 16 - - - - - pF per buffer; CL = 50 pF; f = 1 MHz; VI = GND to VCC [1] tpd is the same as tPLH and tPHL. [2] Typical values are measured at VCC = 3.3 V. [3] Typical values are measured at VCC = 5.0 V. [4] [4] CPD is used to determine the dynamic power dissipation PD (W). PD = CPD  VCC2  fi +  (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts. 74AHC_AHCT1G79 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 23 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 6 of 13 74AHC1G79; 74AHCT1G79 NXP Semiconductors Single D-type flip-flop; positive-edge trigger 12. Waveforms 9, 90 'LQSXW *1' WK WK W VX W VX IPD[ 9, &3LQSXW 90 *1' W: W 3+/ W 3/+ 92+ 90 4RXWSXW 92/ PQD Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output. Fig 5. Clock (CP) to output (Q) propagation delay times, clock pulse width, D to set-up times, the CP to D hold times and maximum clock pulse frequency Table 9. Measurement points Type Inputs Output VI VM VM 74AHC1G79 GND to VCC 0.5  VCC 0.5  VCC 74AHCT1G79 GND to 3.0 V 1.5 V 0.5  VCC 9&& 38/6( *(1(5$725 9, 92 '87 57 &/ PQD Test data is given in Table 8. Definitions for test circuit: CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. Fig 6. Test circuit for measuring switching times 74AHC_AHCT1G79 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 23 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 7 of 13 74AHC1G79; 74AHCT1G79 NXP Semiconductors Single D-type flip-flop; positive-edge trigger 13. Package outline 76623SODVWLFWKLQVKULQNVPDOORXWOLQHSDFNDJHOHDGVERG\ZLGWKPP ( ' 627 $ ; F \ +( Y 0 $ =   $ $ $  $ ș  /S  H / Z 0 ES GHWDLO; H   PP VFDOH ',0(16,216 PPDUHWKHRULJLQDOGLPHQVLRQV  81,7 $ PD[ $ $ $ ES F '   (   H H +( PP                      / /S Y Z \ =   ș      ƒ ƒ 1RWH 3ODVWLFRUPHWDOSURWUXVLRQVRIPPPD[LPXPSHUVLGHDUHQRWLQFOXGHG 287/,1( 9(56,21 627 Fig 7. 5()(5(1&(6 ,(& -('(& -(,7$ 02  6&$ (8523($1 352-(&7,21 ,668('$7(   Package outline SOT353-1 (TSSOP5) 74AHC_AHCT1G79 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 23 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 8 of 13 74AHC1G79; 74AHCT1G79 NXP Semiconductors Single D-type flip-flop; positive-edge trigger 3ODVWLFVXUIDFHPRXQWHGSDFNDJHOHDGV 627 ' % $ ( \ ; +(  Y 0 $  4 $ $ F    /S GHWDLO; ES H Z 0 %   PP VFDOH ',0(16,216 PPDUHWKHRULJLQDOGLPHQVLRQV 81,7 $ $ ES F ' ( H +( /S 4 Y Z \ PP                       287/,1( 9(56,21 5()(5(1&(6 ,(& -('(& -(,7$  6&$ 627 Fig 8. (8523($1 352-(&7,21 ,668('$7(   Package outline SOT753 (SC-74A) 74AHC_AHCT1G79 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 23 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 9 of 13 74AHC1G79; 74AHCT1G79 NXP Semiconductors Single D-type flip-flop; positive-edge trigger 14. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AHC_AHCT1G79 v.6 20140923 Product data sheet - 74AHC_AHCT1G79 v.5 Modifications: • Section 4: table note added. 74AHC_AHCT1G79 v.5 20070702 Product data sheet - 74AHC_AHCT1G79 v.4 74AHC_AHCT1G79 v.4 20020606 Product specification - 74AHC_AHCT1G79 v.3 74AHC_AHCT1G79 v.3 20020218 Product specification - 74AHC_AHCT1G79 v.2 74AHC_AHCT1G79 v.2 20010222 Product specification - 74AHC_AHCT1G79 v.1 74AHC_AHCT1G79 v.1 19990518 Product specification - - 74AHC_AHCT1G79 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 23 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 10 of 13 74AHC1G79; 74AHCT1G79 NXP Semiconductors Single D-type flip-flop; positive-edge trigger 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. Product specification — The information and data provided in a Product data sheet shall define the specification of the product as agreed between NXP Semiconductors and its customer, unless NXP Semiconductors and customer have explicitly agreed otherwise in writing. In no event however, shall an agreement be valid in which the NXP Semiconductors product is deemed to offer functions and qualities beyond those described in the Product data sheet. 16.3 Disclaimers Limited warranty and liability — Information in this document is believed to be accurate and reliable. However, NXP Semiconductors does not give any representations or warranties, expressed or implied, as to the accuracy or completeness of such information and shall have no liability for the consequences of use of such information. NXP Semiconductors takes no responsibility for the content in this document if provided by an information source outside of NXP Semiconductors. In no event shall NXP Semiconductors be liable for any indirect, incidental, punitive, special or consequential damages (including - without limitation - lost profits, lost savings, business interruption, costs related to the removal or replacement of any products or rework charges) whether or not such damages are based on tort (including negligence), warranty, breach of contract or any other legal theory. Notwithstanding any damages that customer might incur for any reason whatsoever, NXP Semiconductors’ aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of NXP Semiconductors. Right to make changes — NXP Semiconductors reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. 74AHC_AHCT1G79 Product data sheet Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 6 — 23 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 11 of 13 74AHC1G79; 74AHCT1G79 NXP Semiconductors Single D-type flip-flop; positive-edge trigger Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74AHC_AHCT1G79 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 6 — 23 September 2014 © NXP Semiconductors N.V. 2014. All rights reserved. 12 of 13 NXP Semiconductors 74AHC1G79; 74AHCT1G79 Single D-type flip-flop; positive-edge trigger 18. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 3 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 4 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 6 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . . 8 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 10 Legal information. . . . . . . . . . . . . . . . . . . . . . . 11 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 11 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 12 Contact information. . . . . . . . . . . . . . . . . . . . . 12 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP Semiconductors N.V. 2014. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 23 September 2014 Document identifier: 74AHC_AHCT1G79
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