74AUP1G74GD,125

74AUP1G74 Low-power D-type flip-flop with set and reset; positive-edge trigger Rev. 12 — 20 June 2022 Product data sheet 1. General description The 74AUP1G74 is a single positive edge triggered D-type flip-flop with individual data (D), clock (CP), set (SD) and reset (RD) inputs, and complementary Q and Q outputs. Data at the D-input that meets the set-up and hold time requirements on the LOW-to-HIGH clock transition will be stored in the flip-flop and appear at the Q output. Schmitt-trigger action at all inputs makes the circuit tolerant of slower input rise and fall times. This device ensures very low static and dynamic power consumption across the entire VCC range from 0.8 V to 3.6 V. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • • • • • • • • • • • • Wide supply voltage range from 0.8 V to 3.6 V CMOS low power dissipation High noise immunity Overvoltage tolerant inputs to 3.6 V Low static power consumption; ICC = 0.9 μA (maximum) Latch-up performance exceeds 100 mA per JESD 78 Class II Low noise overshoot and undershoot < 10 % of VCC IOFF circuitry provides partial Power-down mode operation Complies with JEDEC standards: • JESD8-12 (0.8 V to 1.3 V) • JESD8-11 (0.9 V to 1.65 V) • JESD8-7 (1.2 V to 1.95 V) • JESD8-5 (1.8 V to 2.7 V) • JESD8C (2.7 V to 3.6 V) ESD protection: • HBM JESD22-A114F Class 3A exceeds 5 kV • MM JESD22-A115-A exceeds 200 V • CDM JESD22-C101E exceeds 1 kV Multiple package options Specified from -40 °C to +85 °C and -40 °C to +125 °C 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AUP1G74DC -40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; SOT765-1 body width 2.3 mm 74AUP1G74GT -40 °C to +125 °C XSON8 plastic extremely thin small outline package; no leads; SOT833-1 8 terminals; body 1 × 1.95 × 0.5 mm 74AUP1G74GF -40 °C to +125 °C XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.35 × 1 × 0.5 mm SOT1089 74AUP1G74GM -40 °C to +125 °C XQFN8 plastic, extremely thin quad flat package; no leads; 8 terminals; body 1.6 × 1.6 × 0.5 mm SOT902-2 74AUP1G74GN -40 °C to +125 °C XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.2 × 1.0 × 0.35 mm SOT1116 74AUP1G74GS -40 °C to +125 °C XSON8 extremely thin small outline package; no leads; 8 terminals; body 1.35 × 1.0 × 0.35 mm SOT1203 74AUP1G74GX -40 °C to +125 °C X2SON8 plastic thermal enhanced extremely thin small outline package; no leads; 8 terminals; body 1.35 × 0.8 × 0.32 mm SOT1233-2 4. Marking Table 2. Marking codes Type number Marking code[1] 74AUP1G74DC p74 74AUP1G74GT p74 74AUP1G74GF 54 74AUP1G74GM p74 74AUP1G74GN 54 74AUP1G74GS 54 74AUP1G74GX 54 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 74AUP1G74 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 2 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger 5. Functional diagram SD D CP SD Q D CP Q S FF Q C1 Q 1D RD RD Fig. 1. R 001aah725 001aah726 Logic symbol Fig. 2. IEC logic symbol Q C C C C D RD Q C C SD CP 001aae087 C C Fig. 3. Logic diagram 74AUP1G74 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 3 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger 6. Pinning information 6.1. Pinning 74AUP1G74 CP 1 8 VCC D 2 7 SD Q 3 6 RD GND 4 5 Q 74AUP1G74 CP 1 8 VCC D 2 7 SD Q 3 6 RD GND 4 5 Q 001aae323 Transparent top view 001aae322 Fig. 4. Fig. 5. Pin configuration SOT765-1 (VSSOP8) Pin configuration SOT833-1, SOT1089, SOT1116 and SOT1203 (XSON8) 74AUP1G74 VCC terminal 1 index area 1 74AUP1G74 8 SD 7 CP CP 1 RD 2 6 D Q 3 5 Q 4 2 6 RD 5 Q 4 GND Q GND SD VCC D 3 001aae324 aaa-027030 Transparent top view Fig. 6. 7 8 Transparent top view Pin configuration SOT902-2 (XQFN8) Fig. 7. Pin configuration SOT1233-2 (X2SON8) 6.2. Pin description Table 3. Pin description Symbol Pin Description SOT765-1, SOT833-1, SOT1089, SOT1116, SOT1203 and SOT1233-2 SOT902-2 CP 1 7 clock input D 2 6 data input Q 3 5 complement output GND 4 4 ground (0 V) Q 5 3 true output RD 6 2 asynchronous reset input (active LOW) SD 7 1 asynchronous set input (active LOW) VCC 8 8 supply voltage 74AUP1G74 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 4 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger 7. Functional description Table 4. Function table for asynchronous operation H = HIGH voltage level; L = LOW voltage level; X = don’t care. Input Output SD RD CP D Q Q L H X X H L H L X X L H L L X X H H Table 5. Function table for synchronous operation H = HIGH voltage level; L = LOW voltage level; ↑ = LOW-to-HIGH CP transition; Q n+1, Qn+1 = state after the next LOW-to-HIGH CP transition. Input Output SD RD CP D Qn+1 Q n+1 H H ↑ L L H H H ↑ H H L 8. Limiting values Table 6. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Min Max Unit VCC supply voltage -0.5 +4.6 V VI input voltage [1] -0.5 +4.6 V VO output voltage Active mode and Power-down mode IIK input clamping current VI < 0 V [1] -0.5 +4.6 V -50 - mA IOK output clamping current VO < 0 V -50 - mA IO output current VO = 0 V to VCC - ±20 mA ICC supply current - +50 mA IGND ground current -50 - mA Tstg storage temperature -65 +150 °C Ptot total power dissipation [1] [2] [3] [4] [5] [6] [7] [8] Conditions Tamb = -40 °C to +125 °C SOT765-1 (VSSOP8) SOT833-1 (XSON8) SOT1089 (XSON8) SOT902-2 (XQFN8) SOT1116 (XSON8) SOT1203 (XSON8) [2] [3] [4] [5] [6] [7] - 250 250 250 250 250 250 mW mW mW mW mW mW SOT1233-2 (X2SON8) [8] - 300 mW The minimum input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SOT765-1 (VSSOP8) package: Ptot derates linearly with 4.9 mW/K above 99 °C. For SOT833-1 (XSON8) package: Ptot derates linearly with 3.1 mW/K above 68 °C. For SOT1089 (XSON8) package: Ptot derates linearly with 4.0 mW/K above 88 °C. For SOT902-2 (XQFN8) packages: Ptot derates linearly with 4.1 mW/K above 89 °C. For SOT1116 (XSON8) package: Ptot derates linearly with 4.2 mW/K above 90 °C. For SOT1203 (XSON8) package: Ptot derates linearly with 3.6 mW/K above 81 °C. For SOT1233-2 (X2SON8) package: Ptot derates linearly with 7.7 mW/K above 118 °C. 74AUP1G74 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 5 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger 9. Recommended operating conditions Table 7. Operating conditions Symbol Parameter Conditions VCC supply voltage VI input voltage VO output voltage Tamb ambient temperature Δt/ΔV input transition rise and fall rate Active mode Power-down mode; VCC = 0 V VCC = 0.8 V to 3.6 V Min Max Unit 0.8 3.6 V 0 3.6 V 0 VCC V 0 3.6 V -40 +125 °C - 200 ns/V 10. Static characteristics Table 8. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Typ Max Unit VCC = 0.8 V 0.70 × VCC - - V VCC = 0.9 V to 1.95 V 0.65 × VCC - - V VCC = 2.3 V to 2.7 V 1.6 - - V VCC = 3.0 V to 3.6 V 2.0 - - V VCC = 0.8 V - - 0.30 × VCC V VCC = 0.9 V to 1.95 V - - 0.35 × VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 3.0 V to 3.6 V - - 0.9 V VCC - 0.1 - - V IO = -1.1 mA; VCC = 1.1 V 0.75 × VCC - - V IO = -1.7 mA; VCC = 1.4 V 1.11 - - V IO = -1.9 mA; VCC = 1.65 V 1.32 - - V IO = -2.3 mA; VCC = 2.3 V 2.05 - - V IO = -3.1 mA; VCC = 2.3 V 1.9 - - V IO = -2.7 mA; VCC = 3.0 V 2.72 - - V IO = -4.0 mA; VCC = 3.0 V 2.6 - - V IO = 20 μA; VCC = 0.8 V to 3.6 V - - 0.1 V IO = 1.1 mA; VCC = 1.1 V - - 0.3 × VCC V IO = 1.7 mA; VCC = 1.4 V - - 0.31 V IO = 1.9 mA; VCC = 1.65 V - - 0.31 V IO = 2.3 mA; VCC = 2.3 V - - 0.31 V IO = 3.1 mA; VCC = 2.3 V - - 0.44 V IO = 2.7 mA; VCC = 3.0 V - - 0.31 V IO = 4.0 mA; VCC = 3.0 V - - 0.44 V Tamb = 25 °C VIH VIL VOH HIGH-level input voltage LOW-level input voltage HIGH-level output voltage VI = VIH or VIL IO = -20 μA; VCC = 0.8 V to 3.6 V VOL LOW-level output voltage VI = VIH or VIL II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - ±0.1 μA IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.2 μA 74AUP1G74 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 6 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger Symbol Parameter Conditions Min Typ Max Unit ΔIOFF additional power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V - - ±0.2 μA ICC supply current VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V - - 0.5 μA ΔICC additional supply current VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V; per pin - - 40 μA CI input capacitance VCC = 0 V to 3.6 V; VI = GND or VCC - 0.6 - pF CO output capacitance VO = GND; VCC = 0 V - 1.3 - pF VCC = 0.8 V 0.70 × VCC - - V VCC = 0.9 V to 1.95 V 0.65 × VCC - - V VCC = 2.3 V to 2.7 V 1.6 - - V VCC = 3.0 V to 3.6 V 2.0 - - V VCC = 0.8 V - - 0.30 × VCC V VCC = 0.9 V to 1.95 V - - 0.35 × VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 3.0 V to 3.6 V - - 0.9 V IO = -20 μA; VCC = 0.8 V to 3.6 V VCC - 0.1 - - V IO = -1.1 mA; VCC = 1.1 V 0.7 × VCC - - V IO = -1.7 mA; VCC = 1.4 V 1.03 - - V IO = -1.9 mA; VCC = 1.65 V 1.30 - - V IO = -2.3 mA; VCC = 2.3 V 1.97 - - V IO = -3.1 mA; VCC = 2.3 V 1.85 - - V IO = -2.7 mA; VCC = 3.0 V 2.67 - - V IO = -4.0 mA; VCC = 3.0 V 2.55 - - V IO = 20 μA; VCC = 0.8 V to 3.6 V - - 0.1 V IO = 1.1 mA; VCC = 1.1 V - - 0.3 × VCC V IO = 1.7 mA; VCC = 1.4 V - - 0.37 V IO = 1.9 mA; VCC = 1.65 V - - 0.35 V IO = 2.3 mA; VCC = 2.3 V - - 0.33 V IO = 3.1 mA; VCC = 2.3 V - - 0.45 V IO = 2.7 mA; VCC = 3.0 V - - 0.33 V IO = 4.0 mA; VCC = 3.0 V - - 0.45 V [1] Tamb = -40 °C to +85 °C VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage VI = VIH or VIL VI = VIH or VIL II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - ±0.5 μA IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.5 μA ΔIOFF additional power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V - - ±0.6 μA ICC supply current VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V - - 0.9 μA ΔICC additional supply current VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V; per pin - - 50 μA 74AUP1G74 Product data sheet [1] All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 7 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger Symbol Parameter Conditions Min Typ Max Unit VCC = 0.8 V 0.75 × VCC - - V VCC = 0.9 V to 1.95 V 0.70 × VCC - - V VCC = 2.3 V to 2.7 V 1.6 - - V VCC = 3.0 V to 3.6 V 2.0 - - V VCC = 0.8 V - - 0.25 × VCC V VCC = 0.9 V to 1.95 V - - 0.30 × VCC V VCC = 2.3 V to 2.7 V - - 0.7 V VCC = 3.0 V to 3.6 V - - 0.9 V IO = -20 μA; VCC = 0.8 V to 3.6 V VCC - 0.11 - - V IO = -1.1 mA; VCC = 1.1 V 0.6 × VCC - - V IO = -1.7 mA; VCC = 1.4 V 0.93 - - V IO = -1.9 mA; VCC = 1.65 V 1.17 - - V IO = -2.3 mA; VCC = 2.3 V 1.77 - - V IO = -3.1 mA; VCC = 2.3 V 1.67 - - V IO = -2.7 mA; VCC = 3.0 V 2.40 - - V IO = -4.0 mA; VCC = 3.0 V 2.30 - - V IO = 20 μA; VCC = 0.8 V to 3.6 V - - 0.11 V IO = 1.1 mA; VCC = 1.1 V - - 0.33 × VCC V IO = 1.7 mA; VCC = 1.4 V - - 0.41 V IO = 1.9 mA; VCC = 1.65 V - - 0.39 V IO = 2.3 mA; VCC = 2.3 V - - 0.36 V IO = 3.1 mA; VCC = 2.3 V - - 0.50 V IO = 2.7 mA; VCC = 3.0 V - - 0.36 V IO = 4.0 mA; VCC = 3.0 V - - 0.50 V Tamb = -40 °C to +125 °C VIH HIGH-level input voltage VIL LOW-level input voltage VOH VOL HIGH-level output voltage LOW-level output voltage VI = VIH or VIL VI = VIH or VIL II input leakage current VI = GND to 3.6 V; VCC = 0 V to 3.6 V - - ±0.75 μA IOFF power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V - - ±0.75 μA ΔIOFF additional power-off leakage current VI or VO = 0 V to 3.6 V; VCC = 0 V to 0.2 V - - ±0.75 μA ICC supply current VI = GND or VCC; IO = 0 A; VCC = 0.8 V to 3.6 V - - 1.4 μA ΔICC additional supply current VI = VCC - 0.6 V; IO = 0 A; VCC = 3.3 V; per pin - - 75 μA [1] [1] One input at VCC - 0.6 V, other input at VCC or GND. 74AUP1G74 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 8 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger 11. Dynamic characteristics Table 9. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 10. Symbol Parameter Conditions Tamb = 25 °C Min Tamb = -40 °C to +85 °C Typ[1] Max Tamb = Unit -40 °C to +125 °C Min Max Min Max CL = 5 pF tpd propagation CP to Q, Q; see Fig. 8. delay VCC = 0.8 V [2] - 25.4 - - - - - ns VCC = 1.1 V to 1.3 V 2.9 6.7 14.0 2.6 14.2 2.6 14.2 ns VCC = 1.4 V to 1.6 V 2.4 4.5 7.6 2.3 8.3 2.3 8.6 ns VCC = 1.65 V to 1.95 V 1.9 3.5 5.7 1.7 6.5 1.7 6.8 ns VCC = 2.3 V to 2.7 V 1.7 2.6 3.8 1.4 4.4 1.4 4.7 ns VCC = 3.0 V to 3.6 V 1.5 2.2 3.1 1.2 3.4 1.2 3.7 ns - 19.6 - - - - - ns VCC = 1.1 V to 1.3 V 2.7 5.6 11.0 2.5 11.4 2.5 11.5 ns VCC = 1.4 V to 1.6 V 2.4 4.0 6.3 2.2 6.9 2.2 7.3 ns VCC = 1.65 V to 1.95 V 2.0 3.3 4.9 1.7 5.6 1.7 5.9 ns VCC = 2.3 V to 2.7 V 1.9 2.7 3.7 1.7 4.0 1.7 4.2 ns VCC = 3.0 V to 3.6 V 1.8 2.5 3.2 1.5 3.6 1.5 3.8 ns - 19.2 - - - - - ns VCC = 1.1 V to 1.3 V 2.6 5.5 11.0 2.5 11.3 2.5 11.5 ns VCC = 1.4 V to 1.6 V 2.3 3.9 6.3 2.2 6.8 2.2 7.3 ns VCC = 1.65 V to 1.95 V 1.9 3.2 5.0 1.8 5.6 1.8 5.9 ns VCC = 2.3 V to 2.7 V 1.9 2.6 3.6 1.7 4.1 1.7 4.3 ns VCC = 3.0 V to 3.6 V 1.8 2.4 3.3 1.5 3.6 1.5 3.8 ns VCC = 0.8 V - 53 - - - - - MHz VCC = 1.1 V to 1.3 V - 203 - 170 - 170 - MHz VCC = 1.4 V to 1.6 V - 347 - 310 - 300 - MHz VCC = 1.65 V to 1.95 V - 435 - 400 - 390 - MHz VCC = 2.3 V to 2.7 V - 550 - 490 - 480 - MHz VCC = 3.0 V to 3.6 V - 619 - 550 - 510 - MHz SD to Q, Q; see Fig. 9. [2] VCC = 0.8 V RD to Q, Q; see Fig. 9. VCC = 0.8 V fmax maximum frequency 74AUP1G74 Product data sheet [2] CP; see Fig. 8. All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 9 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger Symbol Parameter Conditions Tamb = 25 °C Min Tamb = -40 °C to +85 °C Typ[1] Max Tamb = Unit -40 °C to +125 °C Min Max Min Max CL = 10 pF tpd propagation CP to Q, Q; see Fig. 8. delay VCC = 0.8 V [2] - 28.9 - - - - - ns VCC = 1.1 V to 1.3 V 3.1 7.5 15.8 2.9 16.1 2.9 16.1 ns VCC = 1.4 V to 1.6 V 2.7 5.1 8.7 2.4 9.4 2.4 9.8 ns VCC = 1.65 V to 1.95 V 2.5 4.1 6.5 2.2 7.2 2.2 7.6 ns VCC = 2.3 V to 2.7 V 2.0 3.2 4.6 1.8 5.3 1.8 5.6 ns VCC = 3.0 V to 3.6 V 1.8 2.8 3.8 1.6 4.1 1.6 4.4 ns - 23.2 - - - - - ns VCC = 1.1 V to 1.3 V 2.9 6.5 12.9 2.8 13.3 2.8 13.5 ns VCC = 1.4 V to 1.6 V 2.7 4.6 7.5 2.3 7.9 2.3 8.3 ns VCC = 1.65 V to 1.95 V 2.6 3.9 5.6 2.3 6.3 2.3 6.6 ns VCC = 2.3 V to 2.7 V 2.3 3.2 4.4 2.0 4.8 2.0 5.2 ns VCC = 3.0 V to 3.6 V 2.2 3.0 3.9 1.9 4.2 1.9 4.4 ns - 22.7 - - - - - ns VCC = 1.1 V to 1.3 V 2.8 6.4 12.8 2.7 13.2 2.7 13.4 ns VCC = 1.4 V to 1.6 V 2.6 4.5 7.5 2.3 8.1 2.3 8.4 ns VCC = 1.65 V to 1.95 V 2.5 3.3 5.8 2.3 6.3 2.3 6.7 ns VCC = 2.3 V to 2.7 V 2.2 3.2 4.4 2.0 4.9 2.0 5.2 ns VCC = 3.0 V to 3.6 V 2.0 2.9 4.0 1.9 4.3 1.9 4.5 ns VCC = 0.8 V - 52 - - - - - MHz VCC = 1.1 V to 1.3 V - 192 - 150 - 150 - MHz VCC = 1.4 V to 1.6 V - 324 - 280 - 230 - MHz VCC = 1.65 V to 1.95 V - 421 - 310 - 250 - MHz VCC = 2.3 V to 2.7 V - 486 - 370 - 360 - MHz VCC = 3.0 V to 3.6 V - 550 - 410 - 360 - MHz SD to Q, Q; see Fig. 9. [2] VCC = 0.8 V RD to Q, Q; see Fig. 9. VCC = 0.8 V fmax maximum frequency 74AUP1G74 Product data sheet [2] CP; see Fig. 8. All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 10 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger Symbol Parameter Conditions Tamb = 25 °C Min Tamb = -40 °C to +85 °C Typ[1] Max Tamb = Unit -40 °C to +125 °C Min Max Min Max CL = 15 pF tpd propagation CP to Q, Q; see Fig. 8. delay VCC = 0.8 V [2] - 32.4 - - - - - ns VCC = 1.1 V to 1.3 V 3.5 8.3 17.6 3.3 17.8 3.3 18.0 ns VCC = 1.4 V to 1.6 V 3.2 5.6 9.5 2.8 10.5 2.8 11.1 ns VCC = 1.65 V to 1.95 V 2.7 4.6 7.2 2.5 8.1 2.5 8.6 ns VCC = 2.3 V to 2.7 V 2.4 3.6 5.2 2.2 5.8 2.2 6.2 ns VCC = 3.0 V to 3.6 V 2.2 3.2 4.4 2.0 4.9 2.0 5.2 ns - 26.7 - - - - - ns VCC = 1.1 V to 1.3 V 3.3 7.3 14.7 3.1 15.2 3.1 15.4 ns VCC = 1.4 V to 1.6 V 3.2 5.2 8.3 2.9 9.0 2.9 9.5 ns VCC = 1.65 V to 1.95 V 2.8 4.3 6.4 2.5 7.1 2.5 7.5 ns VCC = 2.3 V to 2.7 V 2.8 3.7 5.1 2.2 5.5 2.2 5.8 ns VCC = 3.0 V to 3.6 V 2.5 3.5 4.6 2.4 5.0 2.4 5.2 ns - 26.1 - - - - - ns VCC = 1.1 V to 1.3 V 3.2 7.2 14.5 3.1 15.0 3.1 15.2 ns VCC = 1.4 V to 1.6 V 3.1 5.1 8.4 2.7 9.2 2.7 9.7 ns VCC = 1.65 V to 1.95 V 2.7 4.3 6.5 2.6 7.3 2.6 7.7 ns VCC = 2.3 V to 2.7 V 2.6 3.6 5.0 2.4 5.5 2.4 5.8 ns VCC = 3.0 V to 3.6 V 2.4 3.4 4.6 2.3 5.0 2.3 5.2 ns VCC = 0.8 V - 50 - - - - - MHz VCC = 1.1 V to 1.3 V - 181 - 120 - 120 - MHz VCC = 1.4 V to 1.6 V - 301 - 190 - 160 - MHz VCC = 1.65 V to 1.95 V - 407 - 240 - 190 - MHz VCC = 2.3 V to 2.7 V - 422 - 300 - 270 - MHz VCC = 3.0 V to 3.6 V - 481 - 320 - 300 - MHz SD to Q, Q; see Fig. 9. [2] VCC = 0.8 V RD to Q, Q; see Fig. 9. VCC = 0.8 V fmax maximum frequency 74AUP1G74 Product data sheet [2] CP; see Fig. 8. All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 11 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger Symbol Parameter Conditions Tamb = 25 °C Min Tamb = -40 °C to +85 °C Typ[1] Max Tamb = Unit -40 °C to +125 °C Min Max Min Max CL = 30 pF tpd propagation CP to Q, Q; see Fig. 8. delay VCC = 0.8 V [2] - 42.7 - - - - - ns VCC = 1.1 V to 1.3 V 4.2 10.6 22.5 4.0 23.0 4.0 23.3 ns VCC = 1.4 V to 1.6 V 3.7 7.2 12.0 3.7 13.3 3.7 14.0 ns VCC = 1.65 V to 1.95 V 3.5 5.8 9.2 3.4 10.4 3.4 11.0 ns VCC = 2.3 V to 2.7 V 3.3 4.7 6.6 3.0 7.3 3.0 7.8 ns VCC = 3.0 V to 3.6 V 3.0 4.3 5.8 2.8 6.8 2.8 7.3 ns - 37.0 - - - - - ns VCC = 1.1 V to 1.3 V 4.0 9.5 19.8 3.8 20.8 3.8 21.1 ns VCC = 1.4 V to 1.6 V 3.8 6.7 10.9 3.7 12.0 3.7 12.7 ns VCC = 1.65 V to 1.95 V 3.7 5.6 8.4 3.5 9.3 3.5 9.9 ns VCC = 2.3 V to 2.7 V 3.7 4.8 6.6 3.2 7.2 3.2 7.6 ns VCC = 3.0 V to 3.6 V 3.4 4.6 6.0 3.1 6.8 3.1 7.1 ns - 36.4 - - - - - ns VCC = 1.1 V to 1.3 V 3.9 9.4 19.5 3.8 20.2 3.8 20.5 ns VCC = 1.4 V to 1.6 V 3.6 6.6 10.9 3.7 12.0 3.7 12.6 ns VCC = 1.65 V to 1.95 V 3.5 5.5 8.5 3.5 9.5 3.5 10.1 ns VCC = 2.3 V to 2.7 V 3.5 4.7 6.5 3.2 7.1 3.2 7.6 ns VCC = 3.0 V to 3.6 V 3.3 4.4 6.1 3.1 7.1 3.1 7.5 ns VCC = 0.8 V - 28 - - - - - MHz VCC = 1.1 V to 1.3 V - 145 - 70 - 70 - MHz VCC = 1.4 V to 1.6 V - 185 - 120 - 110 - MHz VCC = 1.65 V to 1.95 V - 270 - 150 - 120 - MHz VCC = 2.3 V to 2.7 V - 290 - 190 - 170 - MHz VCC = 3.0 V to 3.6 V - 315 - 200 - 190 - MHz SD to Q, Q; see Fig. 9. [2] VCC = 0.8 V RD to Q, Q; see Fig. 9. VCC = 0.8 V fmax maximum frequency 74AUP1G74 Product data sheet [2] CP; see Fig. 8. All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 12 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger Symbol Parameter Conditions Tamb = 25 °C Min Tamb = -40 °C to +85 °C Typ[1] Max Tamb = Unit -40 °C to +125 °C Min Max Min Max CL = 5 pF, 10 pF, 15 pF and 30 pF tsu set-up time D to CP HIGH; see Fig. 8. VCC = 0.8 V - 3.4 - - - - - ns VCC = 1.1 V to 1.3 V - 0.6 - 1.2 - 1.2 - ns VCC = 1.4 V to 1.6 V - 0.3 - 0.6 - 0.6 - ns VCC = 1.65 V to 1.95 V - 0.4 - 0.5 - 0.5 - ns VCC = 2.3 V to 2.7 V - 0.2 - 0.4 - 0.4 - ns VCC = 3.0 V to 3.6 V - 0.3 - 0.4 - 0.4 - ns VCC = 0.8 V - 3.0 - - - - - ns VCC = 1.1 V to 1.3 V - 0.5 - 1.2 - 1.2 - ns VCC = 1.4 V to 1.6 V - 0.3 - 0.7 - 0.7 - ns VCC = 1.65 V to 1.95 V - 0.4 - 0.7 - 0.7 - ns VCC = 2.3 V to 2.7 V - 0.5 - 0.7 - 0.7 - ns VCC = 3.0 V to 3.6 V - 0.6 - 0.8 - 0.8 - ns VCC = 0.8 V - -1.9 - - - - - ns VCC = 1.1 V to 1.3 V - -0.3 - 0.5 - 0.5 - ns VCC = 1.4 V to 1.6 V - -0.2 - 0.2 - 0.2 - ns VCC = 1.65 V to 1.95 V - -0.2 - 0.1 - 0.1 - ns VCC = 2.3 V to 2.7 V - -0.2 - 0.1 - 0.1 - ns VCC = 3.0 V to 3.6 V - -0.2 - 0.1 - 0.1 - ns VCC = 1.1 V to 1.3 V - -0.5 - -0.9 - -0.9 - ns VCC = 1.4 V to 1.6 V - -0.2 - -0.6 - -0.6 - ns VCC = 1.65 V to 1.95 V - -0.2 - -0.4 - -0.4 - ns VCC = 2.3 V to 2.7 V - -0.1 - -0.1 - -0.1 - ns VCC = 3.0 V to 3.6 V - -0.1 - -0.1 - -0.1 - ns VCC = 1.1 V to 1.3 V - -0.5 - -0.3 - -0.3 - ns VCC = 1.4 V to 1.6 V - -0.4 - -0.1 - -0.1 - ns VCC = 1.65 V to 1.95 V - -0.3 - 0 - 0 - ns VCC = 2.3 V to 2.7 V - -0.2 - 0.1 - 0.1 - ns VCC = 3.0 V to 3.6 V - -0.1 - 0.1 - 0.1 - ns D to CP LOW; see Fig. 8. th trec hold time recovery time D to CP; see Fig. 8. RD; see Fig. 9 SD; see Fig. 9. 74AUP1G74 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 13 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger Symbol Parameter Conditions Tamb = 25 °C Min Tamb = -40 °C to +85 °C Typ[1] Max Tamb = Unit -40 °C to +125 °C Min Max Min Max pulse width CP HIGH or LOW; see Fig. 8. tW VCC = 1.1 V to 1.3 V - 2.1 - 2.7 - 2.7 - ns VCC = 1.4 V to 1.6 V - 1.1 - 1.5 - 1.5 - ns VCC = 1.65 V to 1.95 V - 0.9 - 1.6 - 1.6 - ns VCC = 2.3 V to 2.7 V - 0.6 - 1.7 - 1.7 - ns VCC = 3.0 V to 3.6 V - 0.6 - 1.9 - 1.9 - ns VCC = 1.1 V to 1.3 V - 4.2 - 11.3 - 11.5 - ns VCC = 1.4 V to 1.6 V - 2.3 - 6.2 - 6.4 - ns VCC = 1.65 V to 1.95 V - 1.8 - 4.8 - 5.0 - ns VCC = 2.3 V to 2.7 V - 1.2 - 3.3 - 3.5 - ns VCC = 3.0 V to 3.6 V - 1.1 - 2.6 - 2.8 - ns - 2.8 - - - - - pF VCC = 1.1 V to 1.3 V - 2.9 - - - - - pF VCC = 1.4 V to 1.6 V - 3.0 - - - - - pF VCC = 1.65 V to 1.95 V - 3.0 - - - - - pF VCC = 2.3 V to 2.7 V - 3.5 - - - - - pF VCC = 3.0 V to 3.6 V - 3.9 - - - - - pF SD or RD LOW; see Fig. 9. fi = 1 MHz; power dissipation VI = GND to VCC capacitance VCC = 0.8 V CPD [1] [2] [3] [3] All typical values are measured at nominal VCC. tpd is the same as tPLH and tPHL. CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD × VCC × fi × N + Σ(CL × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; 2 Σ(CL × VCC × fo) = sum of outputs. 74AUP1G74 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 14 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger 11.1. Waveforms and test circuit tW VI CP input VM GND 1/fmax VI VM D input GND th th t su t su t PHL t PLH VOH VM Q output VOL VOH Q output VM VOL t PLH t PHL 001aae365 Measurement points are given in Table 10. The shaded areas indicate when the input is permitted to change for predictable output performance. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 8. The clock input (CP) to output (Q, Q) propagation delays, the data input (D) to clock input (CP) set-up and hold times and the clock input (CP) pulse width and maximum frequency 74AUP1G74 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 15 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger VI CP input VM GND t rec VI SD input VM t rec GND tW tW VI VM RD input GND t PLH t PHL t PHL t PLH VOH VM Q output VOL VOH VM Q output VOL 001aae366 Measurement points are given in Table 10. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 9. The set input (SD) and reset input (RD) to output (Q, Q) propagation delays, the set input (SD) and reset input (RD) pulse widths and the reset input (RD) to clock input (CP) recovery time Table 10. Measurement points Supply voltage Output Input VCC VM VM VI tr = tf 0.8 V to 3.6 V 0.5 × VCC 0.5 × VCC VCC ≤ 3.0 ns 74AUP1G74 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 16 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger VCC G VI DUT VEXT 5 kΩ VO RT CL RL 001aac521 Test data is given in Table 11. Definitions for test circuit: RL = Load resistance; CL = Load capacitance including jig and probe capacitance; RT = Termination resistance should be equal to the output impedance Zo of the pulse generator; VEXT = External voltage for measuring switching times. Fig. 10. Test circuit for measuring switching times Table 11. Test data Supply voltage Load VCC CL RL [1] tPLH, tPHL tPZH, tPHZ tPZL, tPLZ 0.8 V to 3.6 V 5 pF, 10 pF, 15 pF and 30 pF 5 kΩ or 1 MΩ open GND 2 × VCC [1] VEXT For measuring enable and disable times RL = 5 kΩ. For measuring propagation delays, setup and hold times and pulse width RL = 1 MΩ. 74AUP1G74 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 17 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger 12. Package outline VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm D SOT765-1 E A X c y HE v A Z 5 8 Q A A2 A1 pin 1 index (A3) θ Lp 1 detail X 4 e L w bp 0 5 mm scale Dimensions (mm are the original dimensions) Unit mm A max. max nom min 1 A1 A2 0.15 0.85 0.00 0.60 A3 0.12 D(1) E(2) 0.27 0.23 2.1 2.4 0.17 0.08 1.9 2.2 bp c e HE 0.5 3.2 3.0 L 0.4 Lp Q 0.40 0.21 0.15 0.19 v w y 0.2 0.08 0.1 Z(1) θ 0.4 8° 0.1 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. Outline version SOT765-1 References IEC JEDEC JEITA sot765-1_po European projection Issue date 07-06-02 16-05-31 MO-187 Fig. 11. Package outline SOT765-1 (VSSOP8) 74AUP1G74 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 18 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger XSON8: plastic extremely thin small outline package; no leads; 8 terminals; body 1 x 1.95 x 0.5 mm 1 2 SOT833-1 b 4 3 4× (2) L L1 e 8 7 6 e1 5 e1 e1 8× A (2) A1 D E terminal 1 index area 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A(1) max A1 max b D E e e1 L L1 mm 0.5 0.04 0.25 0.17 2.0 1.9 1.05 0.95 0.6 0.5 0.35 0.27 0.40 0.32 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. REFERENCES OUTLINE VERSION IEC JEDEC JEITA SOT833-1 --- MO-252 --- EUROPEAN PROJECTION ISSUE DATE 07-11-14 07-12-07 Fig. 12. Package outline SOT833-1 (XSON8) 74AUP1G74 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 19 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger XSON8: extremely thin small outline package; no leads; 8 terminals; body 1.35 x 1 x 0.5 mm SOT1089 E terminal 1 index area D A A1 detail X (4×)(2) e L (8×)(2) b 4 5 e1 1 terminal 1 index area 8 L1 X 0 0.5 scale Dimensions Unit mm max nom min 1 mm A(1) 0.5 A1 b D E e e1 L L1 0.04 0.20 1.40 1.05 0.35 0.40 0.15 1.35 1.00 0.55 0.35 0.30 0.35 0.12 1.30 0.95 0.27 0.32 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. Outline version SOT1089 sot1089_po References IEC JEDEC JEITA European projection Issue date 10-04-09 10-04-12 MO-252 Fig. 13. Package outline SOT1089 (XSON8) 74AUP1G74 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 20 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger XQFN8: plastic, extremely thin quad flat package; no leads; 8 terminals; body 1.6 x 1.6 x 0.5 mm SOT902-2 X D B A terminal 1 index area E A A1 detail X e v w b 4 3 C C A B C y1 C y 5 e1 terminal 1 index area 2 6 L 1 7 k 8 L2 L k metal area not for soldering L3 L1 0 1 Dimensions Unit(1) mm max nom min 2 mm scale A 0.5 A1 b D E e 0.05 0.25 1.65 1.65 0.20 1.60 1.60 0.55 0.00 0.15 1.55 1.55 e1 0.5 k 0.2 L L1 L2 L3 0.35 0.15 0.25 0.35 0.30 0.10 0.20 0.30 0.25 0.05 0.15 0.25 v 0.1 w y y1 0.05 0.05 0.05 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. References Outline version IEC JEDEC JEITA SOT902-2 --- MO-255 --- sot902-2_po European projection Issue date 16-07-14 16-11-08 Fig. 14. Package outline SOT902-2 (XQFN8) 74AUP1G74 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 21 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger XSON8: extremely thin small outline package; no leads; 8 terminals; body 1.2 x 1.0 x 0.35 mm 1 2 SOT1116 b 4 3 (4×)(2) L L1 e 8 7 e1 6 e1 5 e1 (8×)(2) A1 A D E terminal 1 index area 0 0.5 Dimensions Unit mm 1 mm scale A(1) A1 b D E e max 0.35 0.04 0.20 1.25 1.05 nom 0.15 1.20 1.00 0.55 min 0.12 1.15 0.95 e1 0.3 L L1 0.35 0.40 0.30 0.35 0.27 0.32 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. Outline version sot1116_po References IEC JEDEC JEITA European projection Issue date 10-04-02 10-04-07 SOT1116 Fig. 15. Package outline SOT1116 (XSON8) 74AUP1G74 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 22 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger XSON8: extremely thin small outline package; no leads; 8 terminals; body 1.35 x 1.0 x 0.35 mm SOT1203 b 1 2 3 (4×)(2) 4 L L1 e 8 7 6 e1 e1 5 e1 (8×)(2) A1 A D E terminal 1 index area 0 0.5 Dimensions Unit mm 1 mm scale A(1) A1 b D E e e1 L L1 max 0.35 0.04 0.20 1.40 1.05 0.35 0.40 nom 0.15 1.35 1.00 0.55 0.35 0.30 0.35 min 0.12 1.30 0.95 0.27 0.32 Note 1. Including plating thickness. 2. Visible depending upon used manufacturing technology. Outline version sot1203_po References IEC JEDEC JEITA European projection Issue date 10-04-02 10-04-06 SOT1203 Fig. 16. Package outline SOT1203 (XSON8) 74AUP1G74 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 23 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger X2SON8: plastic thermal enhanced extremely thin small outline package; no leads; 8 terminals; body 1.35 x 0.8 x 0.32 mm SOT1233-2 C Seating Plane X y C A B D E A A3 2x pin 1 index area 2x e A1 detail X u C e 1 pin 1 index area u C b (6x) 2 8 v w 3 y1 C C A B C 4 Dh L (6x) 7 6 5 b1 (6x) e1 0 1 mm scale Dimensions (mm are the original dimensions) Unit mm A max 0.35 nom 0.32 min 0.30 A1 A3 b b1 D Dh E e e1 L u v w y y1 0.04 0.25 0.27 0.27 0.10 0.11 0.02 0.20 1.35 0.22 0.80 0.50 0.54 0.22 0.05 0.10 0.05 0.05 0.05 (Typ.) (ref) 0.00 0.15 0.17 0.17 sot1233-2_po Outline version SOT1233-2 References IEC JEDEC JEITA European projection Issue date 19-11-12 --- Fig. 17. Package outline SOT1233-2 (X2SON8) 74AUP1G74 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 24 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger 13. Abbreviations Table 12. Abbreviations Acronym Description CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model 14. Revision history Table 13. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AUP1G74 v.12 20220620 Product data sheet - 74AUP1G74 v.11 Modifications: • • • 74AUP1G74 v.11 20170703 Modifications: • • • • SOT1233 (X2SON8) package changed to SOT1233-2 (X2SON8) package. Section 1 and Section 2 updated. Table 6: Derating values for Ptot total power dissipation have been updated. Product data sheet - 74AUP1G74 v.10 The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. Fig. 7 and Fig. 17 (drawings SOT1233/X2SON8) updated Type number 74AUP1G74GD removed. 74AUP1G74 v.10 20161028 Modifications: • 74AUP1G74 v.9 20140106 Modifications: • 74AUP1G74 v.8 20130123 Modifications: • 74AUP1G74 v.7 20120522 Product data sheet - 74AUP1G74 v.6 74AUP1G74 v.6 20111128 Product data sheet - 74AUP1G74 v.5 74AUP1G74 v.5 20100726 Product data sheet - 74AUP1G74 v.4 74AUP1G74 v.4 20080603 Product data sheet - 74AUP1G74 v.3 74AUP1G74 v.3 20080207 Product data sheet - 74AUP1G74 v.2 74AUP1G74 v.2 20070515 Product data sheet - 74AUP1G74 v.1 74AUP1G74 v.1 20060825 Product data sheet - - 74AUP1G74 Product data sheet Product data sheet - 74AUP1G74 v.9 Added type number 74AUP1G74GX (SOT1233/X2SON8) Product data sheet - 74AUP1G74 v.8 - 74AUP1G74 v.7 Conditions for fmax corrected (errata). Product data sheet For type number 74AUP1G74GD XSON8U has changed to XSON8. All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 25 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger 15. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the internet at https://www.nexperia.com. Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. 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Notwithstanding any damages that customer might incur for any reason whatsoever, Nexperia’s aggregate and cumulative liability towards customer for the products described herein shall be limited in accordance with the Terms and conditions of commercial sale of Nexperia. Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal 74AUP1G74 Product data sheet Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 26 / 27 74AUP1G74 Nexperia Low-power D-type flip-flop with set and reset; positive-edge trigger Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................2 4. Marking.......................................................................... 2 5. Functional diagram.......................................................3 6. Pinning information......................................................4 6.1. Pinning.........................................................................4 6.2. Pin description............................................................. 4 7. Functional description................................................. 5 8. Limiting values............................................................. 5 9. Recommended operating conditions..........................6 10. Static characteristics..................................................6 11. Dynamic characteristics.............................................9 11.1. Waveforms and test circuit.......................................15 12. Package outline........................................................ 18 13. Abbreviations............................................................ 25 14. Revision history........................................................25 15. Legal information......................................................26 © Nexperia B.V. 2022. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 20 June 2022 74AUP1G74 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 12 — 20 June 2022 © Nexperia B.V. 2022. All rights reserved 27 / 27