NAU8220WG

NAU8220 2Vrms Audio Line Driver 1 General Description The NAU8220 is a high quality 2Vrms analog input and output line driver. This device includes an integrated charge pump enabling true ground referenced inputs and outputs and full 5.6Vpp output levels, while operating from only a single 3.3V positive supply voltage. Additionally, the NAU8220 includes pop/click elimination features and high immunity to power supply and other system noise. This enables fast and efficient system integration while minimizing external component costs. The NAU8220 is specified for operation from -40°C to +85°C, It is packaged in a costeffective and space-saving 14-lead SOP and TSSOP packages. 2 Features














Operating voltage: 3.0-3.6V Full 2Vrms output using only 3.3Vdc supply True Ground Referenced analog outputs Low cost, small footprint package Automatic pop/click elimination and output muting for power-on 108dB SNR A-weighted performance >90dB THD+N 114dB Mute Attenuation < 1mV Output Offset 110dB channel separation at 1kHz Low external parts count High system noise immunity Packages: Pb free 14-pin SOP and TSSOP Operating temperature range: -40 to +85°C ±8 kV HBM protection on line outputs Datasheet Revision 2.0 Page 1 of 19 NAU8220 3 Block diagram 4 Pin Configuration Datasheet Revision 2.0 Page 2 of 19 NAU8220 5 Pin Description Pin No. Pin Name Type Description 1 RINP AI Right Channel Positive Input 2 RINN AI Right Channel Negative Input 3 ROUT O Right Channel Line Output 4 GND P Ground 5 MUTEB I Mute Bar 6 VEE 7 CN 8 CP 9 VDD IO Charge Pump Capacitor Positive Node P Positive Voltage Supply 10 GND P Ground 11 UVP I Under Voltage Protection 12 LOUT O Left Channel Line Output 13 LINN AI Left Channel Negative Input 14 LINP AI Left Channel Positive Input IO Charge Pump Decoupling Output (Negative Voltage) IO Charge Pump Capacitor Negative Node Table 1 Pin Description Datasheet Revision 2.0 Page 3 of 19 NAU8220 6 Table of Contents 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 GENERAL DESCRIPTION .................................................................................................................................1 FEATURES .........................................................................................................................................................1 BLOCK DIAGRAM .............................................................................................................................................2 PIN CONFIGURATION .......................................................................................................................................2 PIN DESCRIPTION .............................................................................................................................................3 TABLE OF CONTENTS ......................................................................................................................................4 ABSOLUTE MAXIMUM RATINGS .....................................................................................................................5 RECOMMENDED OPERATING CONDITIONS ..................................................................................................5 ELECTRICAL CHARACTERISTICS ..................................................................................................................6 FUNCTIONAL DESCRIPTION ............................................................................................................................7 AMPLIFIER CIRCUITS .......................................................................................................................................8 LOW PASS FILTER CIRCUIT ............................................................................................................................9 TYPICAL APPLICATION DIAGRAM ................................................................................................................ 12 TYPICAL CHARACTERISTICS ........................................................................................................................ 14 PACKAGE SPECIFICATION ............................................................................................................................ 17 15.1 SOP-14 Package ....................................................................................................................................... 17 15.2 TSSOP-14 Package (14L 4.4X5.0 MM^2) .................................................................................................. 18 16 ORDERING INFORMATION ............................................................................................................................. 19 Datasheet Revision 2.0 Page 4 of 19 NAU8220 7 Absolute Maximum Ratings DESCRIPTION VDD supply voltage Digital Input Voltage range Analog Input Voltage Operating Temperature Storage Temperature SYMBOL VDD CONDITION VDD−GND MINIMUM -0.3 MAXIMUM +4.0 UNIT V DVIN DVIN− GND GND – 0.3 VDD + 0.30 V AVIN AVIN− VEE VEE – 0.3 VDD + 0.30 V TA -40 +85 °C Tst -65 +150 °C CAUTION: Do not operate at or near the maximum ratings listed for extended periods of time. Exposure to such Conditions may adversely influence product reliability and result in failures not covered by warranty. Follow IC handling procedures to avoid ESD damage. 8 Recommended Operating Conditions DESCRIPTION Supply voltage Ground SYMBOL VDD GND MINIMUM 3.0 Datasheet Revision 2.0 Page 5 of 19 TYPICAL 3.3 0 MAXIMUM 3.6 UNIT V V NAU8220 9 Electrical Characteristics Test Conditions VDD = 3.3V, TA = +25°C, 1 V rms 1 kHz signal, R1 (IN) = 15kΩ, R2 (FB) = 30kΩ, CP = 1µF, RL = 10kΩ unless otherwise stated. Parameter Sym Test Conditions Full Scale Output Voltage Vout Signal to Noise Ratio SNR Dynamic Range DNR Total Harmonic Distortion + Noise THD+N 20 kHz LPF Power Supply Rejection Ratio PSRR VDD = 3.0 V to 3.6 V Power Supply Rejection Ratio 1 AC PSRR Channel Separation Min Typ Max Unit - Vrms 90 108 - dB 90 108 - dB 90 102 - dB 2.0 A-weighted A-weighted 100Hz 100 - 1kHz dB 90 - dB 75 - dB 20kHz - 60 - dB 1kHZ - -110 - dB Noise Voltage VN A-weighted - 8 - µV Mute Noise Voltage VN A-weighted MUTEB=GND - 4 - µV -1 0.5 +1 Output Offset mV Output Impedance when muted ZM MUTEB = GND 0.6 Ω Input to output attenuation when muted MdB MUTEB = GND 114 dB UVP detect voltage VUVP 1.2 Volts UVP feedback current IUVP 5 µA Current Limit ILIMIT Output = GND 30 mA AC Supply Current IDD VDD = 3.3 Volts 15 mA Charge pump switching frequency FCP Pin CP 300 kHz Low input level VIL MUTEB 40 % VDD High input level VIH MUTEB 60 % VDD Input current IIN MUTEB GND or VDD -1 Load Resistance RL Maximum signal 600 10k Load Capacitance Cload 0 - LOUT,R OUT Notes 1. The performance of AC PSRR depends upon the board layout. Datasheet Revision 2.0 Page 6 of 19 +1 µA Ω 200 pF NAU8220 10 Functional Description The NAU8220 uses charge pump mechanism to get the full output signal swing. The charge pump uses the charge pump capacitor to put a negative voltage onto VEE, the charge pump decoupling node. An additional capacitor is needed from VDD to GND, pin 10. A low resistance one micro-farad capacitor is recommended for each of these capacitors. All of these connections need to be short. The negative voltage developed on pin 6 VEE enables the outputs to swing both positive and negative from GND. Signal gain is set by the ratio of external resistors. The input signal can be either single ended or differential. The typical single ended application diagram is shown in figure 1 and differential in figure 2. For single ended inputs, the signal polarity of the output is inverted. A gain of two using R1 = 15 K Ohms and R2 = 30 K Ohms is recommended for good performance. R3 of 10 K Ohms helps to reject unwanted signals by balancing the inputs. For larger gains, R2 can be increased. R1 can also be decreased, but 10 K Ohms is the minimum recommended. For example, a gain of three could use R1 = 10 K Ohms, R2 = 30 K Ohms, and R3 = 7.5 K Ohms. For better performance R3 and R6 should be approximately equal to R1||R2 and R4||R5. Gains larger than ten are not recommended. Large gains will have more noise and distortion than the nominal gain of two. The following table shows the R1 and R2 resistance values for different gain settings. Gain Input Resistance, R1 Feedback Resistance, R2 -1 -2 -3 -10 10k Ohms 15k Ohms 10k Ohms 10k Ohms 10k Ohms 30k Ohms 30k Ohms 100k Ohms Table 2 Recommended resistor values for different gain settings Load of the line driver outputs is from 600 Ohms minimum to 10 K Ohms nominal. With VDD at 3.3 Volts, the maximum output signal is 2 Volts RMS. Capacitive loads up to 200 pF can be driven. If larger capacitive loads such as 2.2 nF (CPC) need to be driven, then a resistance of at least 33 Ohms (RPC) should be added in series to provide both stability and protection. RPC and CPC are resistance and capacitance of the protection circuit as shown in Figure 1 and Figure2. If this resistor and capacitor are added for protection, then the components need to be properly rated. For example, 100 volts rating for the capacitor may be needed to survive an output surge. For best output offset voltages, the inputs can be AC coupled. Upon the application of power to the VDD pin, the part will enter into a pop reduction mode which applies a resistive loading to the two outputs. After the VEE pin reaches more than about 1.5 Volts, a power up sequence begins that places the outputs into the Mute condition. This condition is held until both the MUTEB pin is held high and the UVP pin exceeds about 1.25 Volts. When the MUTEB pin rises, the outputs will follow the input signals. This pin should not be raised until a valid signal is available. The MUTEB pin is driven by a logic signal to GND or VDD. The MUTE condition can be entered from normal operation by pulling MUTEB low. If power is interrupted, the UVP pin can be used to force the part into the MUTE condition. Datasheet Revision 2.0 Page 7 of 19 NAU8220 The UVP pin can force the part into the Mute condition when the power supply voltage drops below the desired voltage. If this function is not needed, the UVP pin should be connected to VDD. Feed back is provided by a nominal 5 µA current developed across the external resistors applied. The turn on voltage sets the ratio of R11 and R12 compared to the internal 1.22 Volt reference. The formula for turn ON voltage is VON = 1.22V * (R11 + R12)/R11 and the formula for the turn off voltage is VOFF= VON - (5uA * R12). For example, for a turn on voltage of 3.0 Volts and a turn off voltage of 2.5 volts, the calculated resistors are R11 = 68.5kΩ and R12 = 100kΩ, or using standard values, R11 = 68kΩ and R12 = 100kΩ. Important note: When using a LDO, the turn-on and turn-off voltages for the UVP should be set higher than the sum of 3.3V and the minimum required voltage drop across the LDO, to ensure proper operation. 11 Amplifier circuits NAU8220 can be used to implement the amplifier configurations in single ended and differential mode. The following diagram shows the NAU8220 in single ended (inverting) and differential amplifier configuration modes. Notice the similarities between these two configurations. The differential input function is accomplished by duplicating the values used in single ended configuration. The required gain can be achieved by properly selecting the R1 and R2 values as per the Table 2. An ac coupling capacitor (Cin) is used to block the dc content from the input source. The input resistance of the amplifier (Rin) together with the Cin will act as a high pass filter. So depending on the required cut off frequency the Cin can be calculated by using the following formula
  1/2   where  is the desired cut off frequency of the High pass filter. Inverting Amplifier Configuration Datasheet Revision 2.0 Page 8 of 19 NAU8220 Differential Amplifier Configuration 12 Low Pass Filter Circuit Many of the today’s Digital to Analog Converters (DACs) requires low pass filter circuit to remove the out of band noise produced by the sigma-delta modulator. Most commonly used filter is multiple feedback nd (MFB) 2 order low pass filter. The advantage of the MFB filter is, it requires fewer components nd compared to the other filter configurations. The following diagrams show the 2 order Low pass filter in single ended and differential mode. The transfer function for the MFB filter (single ended mode) is           ²                  By comparing this equation with following the standard 2nd order Low pass filter equation, the component values can be calculated for a given cut off frequency (  and Datasheet Revision 2.0 Page 9 of 19  (Quality factor) value. NAU8220 2         22   2 ² Where  !"# " $  1/2% &'( $ "  )      Single ended 2nd order Low pass filter Example1: Design a second order single ended MFB Low pass filter with following specifications. Cut off Frequency = 50 kHz, Quality factor, Q= 0.707 and Gain, K = -2. Step 1: Find R1 and R2 depending on the gain. By assuming R1 = 10kOhms and using the equation      the value of the R2 = 20kOhms. Datasheet Revision 2.0 Page 10 of 19 NAU8220 Step2: Using the equation *+, -               , Calculate R3 by assuming C2 = 1000pF R3 = 3.3kOhms Step3: Using the equation2    , the C1 = 150pF  Example2: Design a second order differential mode MFB Low pass filter with following specifications. Cut off Frequency = 50 kHz, Quality factor, Q= 0.707 and Gain, K = -2. The differential mode configuration can be achieved by duplicating the above example 1 values except the C2. The C2 value in this configuration is half of the value of the single ended configuration. Differential 2nd order Low pass filter Datasheet Revision 2.0 Page 11 of 19 NAU8220 13 Typical Application Diagram Right Input Left Input R3 R6 C1 C2 1 RINP LINP 14 2 RINN LINN 13 3 ROUT LOUT 12 R1 R2 2.2 nF(Cpc) Right Output 33 (Rpc) R4 R5 2.2 nF (Cpc) 33 (Rpc) 4 GND 5 6 NAU8220 UVP 11 MUTEB GND 10 VEE VDD 9 CP 8 Left Output R11 MUTEB logic input 1uF 1uF 7 CN R12 Linear low Dropout Regulator 10 uF 1uF R1 = R4 = 15 KOhms R2 = R5 = 30 KOhms R3 = R6 = 10 Kohms C1 = C2 = 2.2 uF Figure 1 Single Input Amplifier Configuration Datasheet Revision 2.0 Page 12 of 19 System Supply NAU8220 Right Input + C1 Left Input + C3 C2 R1 R7 R3 2.2 nF (Cpc) Right Output MUTEB Logic Input R5 R8 R4 R2 C4 1 RINP LINP 14 2 RINN LINN 13 3 ROUT LOUT 12 R6 33 (Rpc) 33 (Rpc) 4 GND 5 6 NAU8220 UVP 11 MUTEB GND 10 VEE VDD 9 CP 8 2.2 nF (Cpc) Left Output R11 1uF 1uF 7 CN R12 Linear low Dropout Regulator 10 uF 1uF R1 = R3 = R5 = R7= 15 KOhms R2 = R4 = R6 = R8 = 30 KOhms C1 = C2 = C3 = C4 = 2.2 uF Figure 2 Differential Input Amplifier Configuration Datasheet Revision 2.0 Page 13 of 19 System Supply NAU8220 14 Typical Characteristics Test Conditions VDD = 3.3V, TA = +25°C, 1kHz signal, R1 (IN) = 15kΩ, R2 (FB) = 30kΩ, CP = 1µF, RL = 10kΩ, CPC = 2200pF, RPC= 33 Ohms unless otherwise stated. Total Harmonic Distortion + Noise Vs Frequency RL = 10k Ohms 0.01 2V RMS 0.01 2V RMS 1V RMS 0.008 1V RMS 0.008 0.006 THD+N (%) THD+N (%) RL= 600 Ohms With out RPC and CPC 0.004 0.006 0.004 0.002 0.002 0 0 10 100 1000 10000 10 100000 100 1000 10000 100000 Frequency (Hz) Frequency (Hz) Total Harmonic Distortion + Noise Vs Output Voltage RL=600 Ohms, F= 100 Hz 10 10 1 1 THD+N (%) THD+N (%) RL=10k Ohms, F = 100 Hz 0.1 0.01 0.1 0.01 0.001 0.001 0.0001 0.0001 0 1 2 3 0 1 2 Vout RMS (V) Vout RMS (V) Datasheet Revision 2.0 Page 14 of 19 3 NAU8220 RL=600 Ohms, F = 1kHz 10 10 1 1 THD+N (%) THD+N (%) RL=10k Ohms, F = 1kHz 0.1 0.01 0.1 0.01 0.001 0.001 0.0001 0.0001 0 1 2 3 0 1 Vout RMS (V) 10 1 1 THD+N (%) THD+N (%) RL=600 Ohms, F = 10kHz 10 0.1 0.1 0.01 0.01 0.001 0.001 0.0001 0.0001 1 2 3 Vout RMS (V) RL=10k Ohms, F = 10kHz 0 2 3 Vout RMS (V) 0 1 2 Vout RMS (V) Datasheet Revision 2.0 Page 15 of 19 3 NAU8220 Cross talk Vs Frequency Crosstalk 0 Right->Left -20 Left -> Right Crosstalk (dB) -40 -60 -80 -100 -120 -140 -160 10 100 1000 10000 Frequency (Hz) Datasheet Revision 2.0 Page 16 of 19 100000 NAU8220 15 Package Specification 15.1 SOP-14 PACKAGE 8 14 c E H E L 7 1 D 0.25 O A Y SEATING PLANE e GAUGE PLANE A1 b Control demensions are in milmeters . SYMBOL A A1 b c E D e HE Y L θ DIMENSION IN MM MAX. MIN. 1.35 1.75 0.10 0.25 0.33 0.51 0.19 0.25 3.80 4.00 8.75 8.55 1.27 BSC 6.20 5.80 0.10 0.40 1.27 0 8 DIMENSION IN INCH MIN. MAX. 0.053 0.069 0.010 0.004 0.013 0.020 0.008 0.010 0.150 0.157 0.344 0.337 0.050 BSC 0.228 0.016 0 Datasheet Revision 2.0 Page 17 of 19 0.244 0.004 0.050 8 NAU8220 15.2 TSSOP-14 PACKAGE (14L 4.4X5.0 MM^2) Datasheet Revision 2.0 Page 18 of 19 NAU8220 16 Ordering Information Nuvoton Part Number Description NAU8220_ _ Package Material: G = Pb-free Package / Green Package Type: S = 14-Pin SOP Package W = 14-Pin TSSOP Package Version History VERSION DATE PAGE 1.8 Feb 2012 9 1.9 March 2012 14 2.0 June, 2012 6,811,12,13 DESCRIPTION Added application circuit diagram with differential configuration. Added TSSOP package dimensions information 1. Corrected Application circuit diagram. Changed value of input DC blocking capacitors to 2.2 uF. 2.Added Load resistance and Load capacitance column in the Electrical characteristics table nd 3.Added amplifier circuit and 2 order LPF circuit Important Notice Nuvoton products are not designed, intended, authorized or warranted for use as components in systems or equipment intended for surgical implantation, atomic energy control instruments, airplane or spaceship instruments, transportation instruments, traffic signal instruments, combustion control instruments, or for other applications intended to support or sustain life. Furthermore, Nuvoton products are not intended for applications wherein failure of Nuvoton products could result or lead to a situation wherein personal injury, death or severe property or environmental damage could occur. Nuvoton customers using or selling these products for use in such applications do so at their own risk and agree to fully indemnify Nuvoton for any damages resulting from such improper use or sales. Datasheet Revision 2.0 Page 19 of 19