74AHC2G241GD,125

74AHC2G241; 74AHCT2G241 Dual buffer/line driver; 3-state Rev. 4 — 16 January 2019 Product data sheet 1. General description The 74AHC2G241; 74AHCT2G241 is a high-speed Si-gate CMOS device. The 74AHC2G241; 74AHCT2G241 is a dual non-inverting buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs 1OE and 2OE. A HIGH level at pin 1OE causes output 1Y to assume a high-impedance OFF-state. A LOW level at pin 2OE causes output 2Y to assume a high-impedance OFF-state. Schmitt-trigger action at all inputs makes the circuit highly tolerant for slower input rise and fall times. The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V. The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V. 2. Features and benefits • • • • • • Symmetrical output impedance High noise immunity ESD protection: • HBM JESD22-A114E: exceeds 2000 V • MM JESD22-A115-A: exceeds 200 V • CDM JESD22-C101C: exceeds 1000 V Low power dissipation Balanced propagation delays Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC2G241DP -40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 74AHC2G241DC -40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; SOT765-1 body width 2.3 mm 74AHCT2G241DC 74AHC2G241; 74AHCT2G241 Nexperia Dual buffer/line driver; 3-state 4. Marking Table 2. Marking Type number Marking code[1] 74AHC2G241DP A241 74AHC2G241DC A41 74AHCT2G241DC C41 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram 1 1OE 2 1A 7 2OE 5 2A 1Y 2 6 1 EN1 5 2Y 3 7 EN2 001aaa409 Fig. 1. 1 2 6 3 001aaa408 Logic symbol Fig. 2. IEC logic symbol 6. Pinning information 6.1. Pinning 74AHC2G241 74AHCT2G241 1OE 1 8 VCC 1A 2 7 2OE 2Y 3 6 1Y GND 4 5 2A 001aaj391 Fig. 3. Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8) 74AHC_AHCT2G241 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 16 January 2019 © Nexperia B.V. 2019. All rights reserved 2 / 14 74AHC2G241; 74AHCT2G241 Nexperia Dual buffer/line driver; 3-state 6.2. Pin description Table 3. Pin description Symbol Pin Description 1OE 1 output enable input (active LOW) 1A 2 data input 2Y 3 data output GND 4 ground (0 V) 2A 5 data input 1Y 6 data output 2OE 7 output enable input (active HIGH) VCC 8 supply voltage 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state. Input Output Input Output 1OE 1A 1Y 2OE 2A 2Y L L L H L L L H H H H H H X Z L X Z 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Min Max Unit VCC VI supply voltage -0.5 +7.0 V input voltage -0.5 +7.0 V IIK input clamping current VI < -0.5 V [1] -20 - mA IOK output clamping current VO < -0.5 V or VO > VCC + 0.5 V [1] - ±20 mA IO output current -0.5 V < VO < VCC + 0.5 V - ±25 mA ICC IGND supply current - 75 mA ground current -75 - mA Tstg storage temperature -65 +150 °C Ptot total power dissipation - 250 mW [1] [2] Conditions Tamb = -40 °C to +125 °C [2] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For TSSOP8 package: above 55 °C the value of Ptot derates linearly with 2.5 mW/K. For VSSOP8 package: above 110 °C the value of Ptot derates linearly with 8 mW/K. 74AHC_AHCT2G241 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 16 January 2019 © Nexperia B.V. 2019. All rights reserved 3 / 14 74AHC2G241; 74AHCT2G241 Nexperia Dual buffer/line driver; 3-state 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74AHC2G241 74AHCT2G241 Unit Min Typ Max Min Typ Max 2.0 5.0 5.5 4.5 5.0 5.5 V VCC supply voltage VI input voltage 0 - 5.5 0 - 5.5 V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature -40 +25 +125 -40 +25 +125 °C Δt/ΔV input transition rise and fall rate VCC = 3.3 V ± 0.3 V - - 100 - - - ns/V VCC = 5.0 V ± 0.5 V - - 20 - - 20 ns/V 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Min Max Min Max VCC = 2.0 V 1.5 - - 1.5 - 1.5 - V VCC = 3.0 V 2.1 - - 2.1 - 2.1 - V VCC = 5.5 V 3.85 - - 3.85 - 3.85 - V VCC = 2.0 V - - 0.5 - 0.5 - 0.5 V VCC = 3.0 V - - 0.9 - 0.9 - 0.9 V 74AHC2G241 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage VCC = 5.5 V - - 1.65 - 1.65 - 1.65 V VI = VIH or VIL HIGH-level output voltage IO = -50 μA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = -50 μA; VCC = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V IO = -50 μA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = -4.0 mA; VCC = 3.0 V 2.58 - - 2.48 - 2.40 - V IO = -8.0 mA; VCC = 4.5 V 3.94 - - 3.8 - 3.70 - V VI = VIH or VIL LOW-level output voltage IO = 50 μA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 μA; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 μA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V IO = 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V IOZ OFF-state VI = VCC or GND; VCC = 5.5 V output current - - 0.25 - 2.5 - 10 μA II input leakage current - - 0.1 - 1.0 - 2.0 μA ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.0 - 10 - 40 μA CI input capacitance - 1.5 10 - 10 - 10 pF 74AHC_AHCT2G241 Product data sheet VI = 5.5 V or GND; VCC = 0 V to 5.5 V All information provided in this document is subject to legal disclaimers. Rev. 4 — 16 January 2019 © Nexperia B.V. 2019. All rights reserved 4 / 14 74AHC2G241; 74AHCT2G241 Nexperia Dual buffer/line driver; 3-state Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Min Max Min Max 74AHCT2G241 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V VOH VI = VIH or VIL; VCC = 4.5 V HIGH-level output voltage IO = -50 μA 4.4 4.5 - 4.4 - 4.4 - V 3.94 - - 3.8 - 3.70 - V - 0 0.1 - 0.1 - 0.1 V IO = -8.0 mA VOL VI = VIH or VIL; VCC = 4.5 V LOW-level output voltage IO = 50 μA - - 0.36 - 0.44 - 0.55 V IOZ OFF-state VI = VCC or GND; VCC = 5.5 V output current IO = 8.0 mA - - 0.25 - 2.5 - 10 μA II input leakage current - - 0.1 - 1.0 - 2.0 μA ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.0 - 10 - 40 μA ΔICC additional per input pin; VI = 3.4 V; supply current other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.35 - 1.5 - 1.5 mA CI input capacitance - 1.5 10 - 10 - 10 pF 74AHC_AHCT2G241 Product data sheet VI = 5.5 V or GND; VCC = 0 V to 5.5 V All information provided in this document is subject to legal disclaimers. Rev. 4 — 16 January 2019 © Nexperia B.V. 2019. All rights reserved 5 / 14 74AHC2G241; 74AHCT2G241 Nexperia Dual buffer/line driver; 3-state 11. Dynamic characteristics Table 8. Dynamic characteristics GND = 0 V; for test circuit see Fig. 7. Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Min Max Min Max CL = 15 pF - 4.7 8.0 1.0 9.5 1.0 11.5 ns CL = 50 pF - 6.6 11.5 1.0 13.0 1.0 14.5 ns CL = 15 pF - 3.4 5.5 1.0 6.5 1.0 7.0 ns CL = 50 pF - 4.7 7.5 1.0 8.5 1.0 9.5 ns - 5.0 8.0 1.0 9.5 1.0 11.5 ns - 6.9 11.5 1.0 13.0 1.0 14.5 ns CL = 15 pF - 3.6 5.1 1.0 6.0 1.0 6.5 ns CL = 50 pF - 4.9 7.5 1.0 8.5 1.0 9.5 ns CL = 15 pF - 4.9 8.0 1.0 9.5 1.0 10.0 ns CL = 50 pF - 7.0 11.5 1.0 13.0 1.0 14.5 ns - 3.6 5.6 1.0 6.3 1.0 7.0 ns - 5.4 8.0 1.0 9.0 1.0 9.5 ns CL = 15 pF - 6.0 9.7 1.0 11.5 1.0 12.5 ns CL = 50 pF - 8.3 13.2 1.0 15.0 1.0 16.5 ns CL = 15 pF - 4.1 6.8 1.0 8.0 1.0 8.5 ns CL = 50 pF - 5.7 8.8 1.0 10.0 1.0 11.0 ns CL = 15 pF - 6.3 9.7 1.0 11.5 1.0 12.5 ns CL = 50 pF - 9.0 13.2 1.0 15.0 1.0 16.5 ns CL = 15 pF - 4.3 6.8 1.0 8.0 1.0 8.5 ns CL = 50 pF - 6.1 8.8 1.0 10.0 1.0 11.0 ns - 10 - - - - - pF 74AHC2G241 tpd propagation delay nA to nY; see Fig. 4 [1] VCC = 3.0 V to 3.6 V [2] VCC = 4.5 V to 5.5 V ten enable time [3] 1OE to 1Y; see Fig. 5 [1] VCC = 3.0 V to 3.6 V [2] CL = 15 pF CL = 50 pF VCC = 4.5 V to 5.5 V [3] 2OE to 2Y; see Fig. 6 [1] VCC = 3.0 V to 3.6 V [2] VCC = 4.5 V to 5.5 V [3] CL = 15 pF CL = 50 pF tdis disable time 1OE to 1Y; see Fig. 5 VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V Product data sheet [3] [1] VCC = 3.0 V to 3.6 V [2] power per buffer; dissipation CL = 50 pF; fi = 1 MHz; capacitance VI = GND to VCC 74AHC_AHCT2G241 [2] 2OE to 2Y; see Fig. 6 VCC = 4.5 V to 5.5 V CPD [1] [3] [4] All information provided in this document is subject to legal disclaimers. Rev. 4 — 16 January 2019 © Nexperia B.V. 2019. All rights reserved 6 / 14 74AHC2G241; 74AHCT2G241 Nexperia Dual buffer/line driver; 3-state Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Min Max Min Max CL = 15 pF - 3.4 5.5 1.0 6.5 1.0 7.0 ns CL = 50 pF - 4.7 7.5 1.0 8.5 1.0 9.5 ns CL = 15 pF - 3.9 5.1 1.0 6.0 1.0 6.5 ns CL = 50 pF - 5.1 7.5 1.0 8.5 1.0 9.5 ns CL = 15 pF - 3.4 5.6 1.0 6.3 1.0 6.5 ns CL = 50 pF - 4.8 7.5 1.0 9.0 1.0 9.5 ns - 4.5 6.8 1.0 8.0 1.0 8.5 ns - 6.1 8.8 1.0 10.0 1.0 11.0 ns CL = 15 pF - 4.0 6.8 1.0 8.0 1.0 8.5 ns CL = 50 pF - 5.7 8.8 1.0 10.0 1.0 11.0 ns - 10 - - - - - pF 74AHCT2G241 tpd ten tdis propagation delay enable time nA to nY; see Fig. 4 [1] VCC = 4.5 V to 5.5 V [3] 1OE to 1Y; see Fig. 5 [1] VCC = 4.5 V to 5.5 V [3] 2OE to 2Y; see Fig. 6 [1] VCC = 4.5 V to 5.5 V [3] disable time 1OE to 1Y; see Fig. 5 VCC = 4.5 V to 5.5 V [1] [3] CL = 15 pF CL = 50 pF CPD [1] [2] [3] [4] 2OE to 2Y; see Fig. 6 [1] VCC = 4.5 V to 5.5 V [3] power per buffer; dissipation CL = 50 pF; fi = 1 MHz; capacitance VI = GND to VCC [4] tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. Typical values are measured at VCC = 3.3 V. Typical values are measured at VCC = 5.0 V. CPD is used to determine the dynamic power dissipation PD (μW). 2 2 PD = CPD x VCC x fi + ∑ (CL x VCC x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts. 74AHC_AHCT2G241 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 16 January 2019 © Nexperia B.V. 2019. All rights reserved 7 / 14 74AHC2G241; 74AHCT2G241 Nexperia Dual buffer/line driver; 3-state 11.1. Waveforms and test circuit VI VM nA input GND tPHL tPLH VOH VM nY output VOL mna230 Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig. 4. The input (nA) to output (nY) propagation delays VI 1OE input VM GND tPLZ output LOW-to-OFF OFF-to-LOW tPZL VCC VM VOL + 0.3 V VOL tPHZ output HIGH-to-OFF OFF-to-HIGH VOH tPZH VOH - 0.3 V VM GND outputs enabled outputs enabled outputs disabled 001aaa411 Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig. 5. The input (1OE) to output 1Y enable and disable times VI 2OE input VM GND tPLZ output LOW-to-OFF OFF-to-LOW tPZL VCC VM VOL + 0.3 V VOL tPHZ output HIGH-to-OFF OFF-to-HIGH VOH tPZH VOH - 0.3 V VM GND outputs enabled outputs disabled outputs enabled 001aaa410 Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig. 6. The input (2OE) to output 2Y enable and disable times 74AHC_AHCT2G241 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 16 January 2019 © Nexperia B.V. 2019. All rights reserved 8 / 14 74AHC2G241; 74AHCT2G241 Nexperia Dual buffer/line driver; 3-state Table 9. Measurement points Type Input Output VM VM 74AHC2G241 0.5VCC 0.5VCC 74AHCT2G241 1.5 V 0.5VCC VI negative pulse tW 90 % VM 0V VI positive pulse 0V VM 10 % tf tr tr tf 90 % VM VM 10 % tW VCC G VI VCC VO DUT RL RT S1 open CL 001aad983 Test data is given in Table 10. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Fig. 7. Test circuit for measuring switching times Table 10. Test data Type Input Load S1 position VI tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ 74AHC2G241 VCC ≤ 3 ns 15 pF, 50 pF 1 kΩ open GND VCC 74AHCT2G241 3V ≤ 3 ns 15 pF, 50 pF 1 kΩ open GND VCC 74AHC_AHCT2G241 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 16 January 2019 © Nexperia B.V. 2019. All rights reserved 9 / 14 74AHC2G241; 74AHCT2G241 Nexperia Dual buffer/line driver; 3-state 12. Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm D E A SOT505-2 X c HE y v M A Z 5 8 A A2 pin 1 index (A3) A1 θ Lp L 1 4 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e HE L Lp v w y Z(1) θ mm 1.1 0.15 0.00 0.95 0.75 0.25 0.38 0.22 0.18 0.08 3.1 2.9 3.1 2.9 0.65 4.1 3.9 0.5 0.47 0.33 0.2 0.13 0.1 0.70 0.35 8° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT505-2 Fig. 8. REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 02-01-16 --- Package outline SOT505-2 (TSSOP8) 74AHC_AHCT2G241 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 16 January 2019 © Nexperia B.V. 2019. All rights reserved 10 / 14 74AHC2G241; 74AHCT2G241 Nexperia Dual buffer/line driver; 3-state VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm D SOT765-1 E A X c y HE v A Z 5 8 Q A A2 A1 pin 1 index (A3) θ Lp 1 detail X 4 e L w bp 0 5 mm scale Dimensions (mm are the original dimensions) Unit mm A max. max nom min 1 A1 A2 0.15 0.85 0.00 0.60 A3 0.12 D(1) E(2) 0.27 0.23 2.1 2.4 0.17 0.08 1.9 2.2 bp c e HE 0.5 3.2 3.0 L 0.4 Lp Q 0.40 0.21 0.15 0.19 v w y 0.2 0.08 0.1 Z(1) θ 0.4 8° 0.1 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. Outline version SOT765-1 Fig. 9. References IEC JEDEC JEITA sot765-1_po European projection Issue date 07-06-02 16-05-31 MO-187 Package outline SOT765-1 (VSSOP8) 74AHC_AHCT2G241 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 16 January 2019 © Nexperia B.V. 2019. All rights reserved 11 / 14 74AHC2G241; 74AHCT2G241 Nexperia Dual buffer/line driver; 3-state 13. Abbreviations Table 11. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14. Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AHC_AHCT2G241 v.4 20190116 Product data sheet - 74AHC_AHCT2G241 v.3 Modifications: • • • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. Type numbers 74AHCT2G241DP, 74AHC2G241GD and 74AHCT2G241GD removed. 74AHC_AHCT2G241 v.3 20130513 Modifications: • 74AHC_AHCT2G241 v.2 20090113 Modifications: • • • 74AHC_AHCT2G241 v.1 74AHC_AHCT2G241 Product data sheet Product data sheet - 74AHC_AHCT2G241 v.2 For type number 74AHC2G241GD and 74AHCT2G241GD XSON8U has changed to XSON8. Product data sheet - 74AHC_AHCT2G241 v.1 The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Added type number 74AHC2G241GD and 74AHCT2G241GD (XSON8U package). 20040310 Product data - All information provided in this document is subject to legal disclaimers. Rev. 4 — 16 January 2019 - © Nexperia B.V. 2019. All rights reserved 12 / 14 74AHC2G241; 74AHCT2G241 Nexperia Dual buffer/line driver; 3-state 15. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. 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In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 4 — 16 January 2019 © Nexperia B.V. 2019. All rights reserved 13 / 14 74AHC2G241; 74AHCT2G241 Nexperia Dual buffer/line driver; 3-state Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................1 4. Marking.......................................................................... 2 5. Functional diagram.......................................................2 6. Pinning information......................................................2 6.1. Pinning.........................................................................2 6.2. Pin description............................................................. 3 7. Functional description................................................. 3 8. Limiting values............................................................. 3 9. Recommended operating conditions..........................4 10. Static characteristics..................................................4 11. Dynamic characteristics.............................................6 11.1. Waveforms and test circuit........................................ 8 12. Package outline........................................................ 10 13. Abbreviations............................................................ 12 14. Revision history........................................................12 15. Legal information......................................................13 © Nexperia B.V. 2019. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 16 January 2019 74AHC_AHCT2G241 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 16 January 2019 © Nexperia B.V. 2019. All rights reserved 14 / 14