74HC3G34GD,125

74HC3G34; 74HCT3G34 Triple buffer gate Rev. 7 — 11 June 2018 1 Product data sheet General description The 74HC3G34; 74HCT3G34 is a triple buffer. Inputs include clamp diodes. This enables the use of current limiting resistors to interface inputs to voltages in excess of VCC. 2 Features and benefits • Wide supply voltage range from 2.0 V to 6.0 V • Input levels: – For 74HC3G34: CMOS level – For 74HCT3G34: TTL level • Complies with JEDEC standard no. 7 A • Symmetrical output impedance • High noise immunity • Low-power dissipation • Balanced propagation delays • Multiple package options • ESD protection: – HBM JESD22-A114E exceeds 2000 V – MM JESD22-A115-A exceeds 200 V • Specified from -40 °C to +85 °C and -40 °C to +125 °C 3 Ordering information Table 1. Ordering information Type number 74HC3G34DP Package Temperature range Name Description Version -40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 -40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 74HCT3G34DP 74HC3G34DC 74HCT3G34DC 74HC3G34; 74HCT3G34 Nexperia Triple buffer gate 4 Marking Table 2. Marking [1] Type number Marking code 74HC3G34DP H34 74HCT3G34DP T34 74HC3G34DC P34 74HCT3G34DC U34 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5 Functional diagram 1 1A 1Y 7 2 3Y 3A 6 3 2A 2Y 5 mna744 1 7 3 1 5 6 1 2 mna745 Figure 1.  Logic symbol 6 1 Figure 2.  IEC logic symbol Pinning information 6.1 Pinning 74HC3G34 74HCT3G34 1A 1 8 VCC 3Y 2 7 1Y 2A 3 6 3A GND 4 5 2Y 001aae470 Figure 3.  Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8) 74HC_HCT3G34 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 11 June 2018 © Nexperia B.V. 2018. All rights reserved. 2 / 13 74HC3G34; 74HCT3G34 Nexperia Triple buffer gate 6.2 Pin description Table 3. Pin description Symbol Pin Description 1A, 2A, 3A 1, 3, 6 data input 1Y, 2Y, 3Y 7, 5, 2 data output GND 4 ground (0 V) VCC 8 supply voltage 7 Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level. Input Output nA nY L L H H 8 Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage IIK input clamping current Conditions Unit -0.5 +7.0 V VI < -0.5 V or VI > VCC + 0.5 V - ±20 mA [1] - ±20 mA - ±25 mA - 50 mA -50 - mA -65 +150 °C - 300 mW output clamping current VO < -0.5 V or VO > VCC + 0.5 V IO output current VO = -0.5 V to (VCC + 0.5 V) ICC quiescent supply current IGND ground current Tstg storage temperature total power dissipation Max [1] IOK Ptot Min Tamb = -40 °C to +125 °C [2] [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For TSSOP8 package: above 55 °C the value of Ptot derates linearly with 2.5 mW/K. For VSSOP8 package: above 110 °C the value of Ptot derates linearly with 8 mW/K. 74HC_HCT3G34 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 11 June 2018 © Nexperia B.V. 2018. All rights reserved. 3 / 13 74HC3G34; 74HCT3G34 Nexperia Triple buffer gate 9 Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74HC3G34 74HCT3G34 Unit Min Typ Max Min Typ Max 2.0 5.0 6.0 4.5 5.0 5.5 V VCC supply voltage VI input voltage 0 - VCC 0 - VCC V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature -40 +25 +125 -40 +25 +125 °C Δt/ΔV input transition rise and fall rate VCC = 2.0 V - - 625 - - - ns/V VCC = 4.5 V - 1.67 139 - 1.67 139 ns/V VCC = 6.0 V - - 83 - - - ns/V 10 Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions -40 °C to +85 °C Min [1] Typ -40 °C to +125 °C Max Min Max Unit 74HC3G34 VIH VIL VOH VOL II HIGH-level input voltage LOW-level input voltage HIGH-level output voltage LOW-level output voltage input leakage current 74HC_HCT3G34 Product data sheet VCC = 2.0 V 1.5 1.2 - 1.5 - V VCC = 4.5 V 3.15 2.4 - 3.15 - V VCC = 6.0 V 4.2 3.2 - 4.2 - V VCC = 2.0 V - 0.8 0.5 - 0.5 V VCC = 4.5 V - 2.1 1.35 - 1.35 V VCC = 6.0 V - 2.8 1.8 - 1.8 V IO = -20 μA; VCC = 2.0 V 1.9 2.0 - 1.9 - V IO = -20 μA; VCC = 4.5 V 4.4 4.5 - 4.4 - V IO = -20 μA; VCC = 6.0 V 5.9 6.0 - 5.9 - V IO = -4.0 mA; VCC = 4.5 V 4.13 4.32 - 3.7 - V IO = -5.2 mA; VCC = 6.0 V 5.63 5.81 - 5.2 - V IO = 20 μA; VCC = 2.0 V - 0 0.1 - 0.1 V IO = 20 μA; VCC = 4.5 V - 0 0.1 - 0.1 V IO = 20 μA; VCC = 6.0 V - 0 0.1 - 0.1 V IO = 4.0 mA; VCC = 4.5 V - 0.15 0.33 - 0.4 V IO = 5.2 mA; VCC = 6.0 V - 0.16 0.33 - 0.4 V - - ±1.0 - ±1.0 μA VI = VIH or VIL VI = VIH or VIL VI = VCC or GND; VCC = 6.0 V All information provided in this document is subject to legal disclaimers. Rev. 7 — 11 June 2018 © Nexperia B.V. 2018. All rights reserved. 4 / 13 74HC3G34; 74HCT3G34 Nexperia Triple buffer gate Symbol Parameter Conditions -40 °C to +85 °C Min ICC supply current per input pin; VI = VCC or GND; IO = 0 A; VCC = 6.0 V CI input capacitance [1] Typ -40 °C to +125 °C Max Min Max Unit - - 10 - 20 μA - 1.5 - - - pF 74HCT3G34 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 1.6 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - 1.2 0.8 - 0.8 V VOH HIGH-level output voltage VI = VIH or VIL IO = -20 μA; VCC = 4.5 V 4.4 4.5 - 4.4 - V IO = -4.0 mA; VCC = 4.5 V 4.13 4.32 - 3.7 - V IO = 20 μA; VCC = 4.5 V - 0 0.1 - 0.1 V IO = 4.0 mA; VCC = 4.5 V - 0.15 0.33 - 0.4 V VOL LOW-level output voltage VI = VIH or VIL II input leakage current VI = VCC or GND; VCC = 5.5 V - - ±1.0 - ±1.0 μA ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 10 - 20 μA ΔICC additional supply current per input; VCC = 4.5 V to 5.5 V; VI = VCC - 2.1 V; IO = 0 A - - 375 - 410 μA CI input capacitance - 1.5 - - - pF [1] All typical values are measured at Tamb = 25 °C. 11 Dynamic characteristics Table 8. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Figure 5. Symbol Parameter Conditions -40 °C to +85 °C Min [1] Typ -40 °C to +125 °C Unit Max Min Max 74HC3G34 tpd propagation delay nA to nY; see Figure 4 [2] VCC = 2.0 V - 29 95 - 125 ns VCC = 4.5 V - 9 19 - 25 ns - 8 16 - 20 ns VCC = 2.0 V - 18 95 - 125 ns VCC = 4.5 V - 6 19 - 25 ns - 5 16 - 20 ns - 10 - - - pF VCC = 6.0 V tt transition time nY; see Figure 4 [3] VCC = 6.0 V CPD power dissipation VI = GND to VCC capacitance 74HC_HCT3G34 Product data sheet [4] All information provided in this document is subject to legal disclaimers. Rev. 7 — 11 June 2018 © Nexperia B.V. 2018. All rights reserved. 5 / 13 74HC3G34; 74HCT3G34 Nexperia Triple buffer gate Symbol Parameter Conditions -40 °C to +85 °C Min [1] Typ -40 °C to +125 °C Unit Max Min Max 74HCT3G34 tpd [2] propagation delay nA to nY; see Figure 4 VCC = 4.5 V tt transition time CPD [1] [2] [3] [4] nY; VCC = 4.5 V; see Figure 4 power dissipation VI = GND to VCC - 1.5 V capacitance - 10 23 - 29 ns [3] - 6 19 - 25 ns [4] - 9 - - - pF All typical values are measured at Tamb = 25 °C. tpd is the same as tPLH and tPHL. tt is the same as tTLH and tTHL. CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD x VCC x fi x N + Σ(CL x VCC x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; 2 Σ(CL x VCC x fo) = sum of outputs. 11.1 Waveform and test circuit VI input nA VM VM GND t PHL t PLH VOH output nY 90 % VM VM 10 % VOL t THL t TLH 001aad982 Measurement points are given in Table 9. VOL and VOH are typical voltage output levels that occur with the output load. Figure 4.  Propagation delay data input (nA) to data output (nY) and transition time output (nY) Table 9. Measurement points Type Input Output VM VM 74HC3G34 0.5 x VCC 0.5 x VCC 74HCT3G34 1.3 V 1.3 V 74HC_HCT3G34 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 11 June 2018 © Nexperia B.V. 2018. All rights reserved. 6 / 13 74HC3G34; 74HCT3G34 Nexperia Triple buffer gate VI negative pulse tW 90 % VM VM 10 % 0V tf tr VI positive pulse 0V tr tf 90 % VM VM 10 % tW VCC VI G DUT VCC VO RT RL S1 open CL 001aad983 Test data is given in Table 10. Definitions for test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Figure 5.  Test circuit for measuring switching times Table 10. Test data Type Input Load S1 position VI tr, tf CL RL tPHL, tPLH 74HC3G34 GND to VCC ≤ 6 ns 50 pF 1 kΩ open 74HCT3G34 GND to 3 V ≤ 6 ns 50 pF 1 kΩ open 74HC_HCT3G34 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 11 June 2018 © Nexperia B.V. 2018. All rights reserved. 7 / 13 74HC3G34; 74HCT3G34 Nexperia Triple buffer gate 12 Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm D E A SOT505-2 X c HE y v M A Z 5 8 A A2 pin 1 index (A3) A1 θ Lp L 1 4 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e HE L Lp v w y Z(1) θ mm 1.1 0.15 0.00 0.95 0.75 0.25 0.38 0.22 0.18 0.08 3.1 2.9 3.1 2.9 0.65 4.1 3.9 0.5 0.47 0.33 0.2 0.13 0.1 0.70 0.35 8° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT505-2 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 02-01-16 --- Figure 6.  Package outline SOT505-2 (TSSOP8) 74HC_HCT3G34 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 11 June 2018 © Nexperia B.V. 2018. All rights reserved. 8 / 13 74HC3G34; 74HCT3G34 Nexperia Triple buffer gate VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm D SOT765-1 E A X c y HE v A Z 5 8 Q A A2 A1 pin 1 index (A3) θ Lp 1 detail X 4 e L w bp 0 5 mm scale Dimensions (mm are the original dimensions) Unit mm A max. max nom min 1 A1 A2 0.15 0.85 0.00 0.60 A3 0.12 D(1) E(2) 0.27 0.23 2.1 2.4 0.17 0.08 1.9 2.2 bp c e HE 0.5 3.2 3.0 L 0.4 Lp Q 0.40 0.21 0.15 0.19 v 0.2 w 0.08 y 0.1 Z(1) θ 0.4 8° 0.1 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. Outline version SOT765-1 References IEC JEDEC JEITA sot765-1_po European projection Issue date 07-06-02 16-05-31 MO-187 Figure 7.  Package outline SOT765-1 (VSSOP8) 74HC_HCT3G34 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 7 — 11 June 2018 © Nexperia B.V. 2018. All rights reserved. 9 / 13 74HC3G34; 74HCT3G34 Nexperia Triple buffer gate 13 Abbreviations Table 11. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 14 Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes 74HC_HCT3G34 v.7 20180611 Product data sheet - 74HC_HCT3G34 v.6 Modifications: • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. • Legal texts have been adapted to the new company name where appropriate. • Type numbers 74HC3G34GD and 74HCT3G34GD removed. 74HC_HCT3G34 v.6 20131211 Modifications: • For type numbers 74HC3G34GD and 74HCT3G34GD XSON8U has changed to XSON8. 74HC_HCT3G34 v.5 20090507 Product data sheet - 74HC_HCT3G34 v.4 74HC_HCT3G34 v.4 20060309 Product data sheet - 74HC_HCT3G34 v.3 74HC_HCT3G34 v.3 20030519 Product specification - 74HC_HCT3G34 v.2 74HC_HCT3G34 v.2 20030210 Product specification - 74HC_HCT3G34 v.1 74HC_HCT3G34 v.1 20031003 Product specification - - 74HC_HCT3G34 Product data sheet Product data sheet - All information provided in this document is subject to legal disclaimers. Rev. 7 — 11 June 2018 74HC_HCT3G34 v.5 © Nexperia B.V. 2018. All rights reserved. 10 / 13 74HC3G34; 74HCT3G34 Nexperia Triple buffer gate 15 Legal information 15.1 Data sheet status Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. 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Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical 74HC_HCT3G34 Product data sheet systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. 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All information provided in this document is subject to legal disclaimers. Rev. 7 — 11 June 2018 © Nexperia B.V. 2018. All rights reserved. 11 / 13 74HC3G34; 74HCT3G34 Nexperia Triple buffer gate Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia's warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia's specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer 74HC_HCT3G34 Product data sheet design and use of the product for automotive applications beyond Nexperia's standard warranty and Nexperia's product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 7 — 11 June 2018 © Nexperia B.V. 2018. All rights reserved. 12 / 13 Nexperia 74HC3G34; 74HCT3G34 Triple buffer gate Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 11.1 12 13 14 15 General description ............................................ 1 Features and benefits .........................................1 Ordering information .......................................... 1 Marking .................................................................2 Functional diagram ............................................. 2 Pinning information ............................................ 2 Pinning ............................................................... 2 Pin description ................................................... 3 Functional description ........................................3 Limiting values .................................................... 3 Recommended operating conditions ................ 4 Static characteristics .......................................... 4 Dynamic characteristics .....................................5 Waveform and test circuit .................................. 6 Package outline ...................................................8 Abbreviations .................................................... 10 Revision history ................................................ 10 Legal information .............................................. 11 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section 'Legal information'. © Nexperia B.V. 2018. All rights reserved. For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 11 June 2018 Document identifier: 74HC_HCT3G34