74LVCH16541ADL,118

74LVCH16541A 16-bit buffer/line driver; 3-state Rev. 4 — 1 May 2019 Product data sheet 1. General description The 74LVCH16541A is a 16-bit buffer/line driver with 3-state outputs. The 3-state outputs are controlled by the output enable inputs (1OEn and 2OEn). A HIGH on nOEn causes the outputs to assume a high-impedance OFF-state. Inputs can be driven from either 3.3 V or 5 V devices. When disabled, up to 5.5 V can be applied to the outputs. These features allow the use of these devices in mixed 3.3 V and 5 V applications. Bus hold on data inputs eliminates the need for external pull-up resistors to hold unused inputs. 2. Features and benefits • • • • • • • • • • • 5 Volt tolerant inputs and outputs for interfacing with 5 V logic Wide supply voltage range from 1.2 V to 3.6 V CMOS low-power consumption MULTIBYTE flow-through standard pin-out architecture Low inductance multiple power and ground pins for minimum noise and ground bounce Direct interface with TTL levels High-impedance outputs when VCC = 0 V All data inputs have bus hold Complies with JEDEC standard: • JESD8-7A (1.65 V to 1.95 V) • JESD8-5A (2.3 V to 2.7 V) • JESD8-C/JESD36 (2.7 V to 3.6 V) ESD protection: • HBM JESD22-A114F exceeds 2000 V • MM JESD22-A115-B exceeds 200 V • CDM JESD22-C101E exceeds 1000 V Specified from -40 °C to +85 °C and -40 °C to +125 °C. 3. Ordering information Table 1. Ordering information Type number Package 74LVCH16541ADGG Temperature range Name Description Version -40 to +125 °C TSSOP48 plastic thin shrink small outline package; 48 leads; SOT362-1 body width 6.1 mm 74LVCH16541A Nexperia 16-bit buffer/line driver; 3-state 4. Functional diagram 1OE1 1 1OE2 48 2OE1 24 25 2OE2 A0 A1 A2 A3 A4 A5 A6 A7 A0 A1 A2 A3 A4 A5 A6 A7 & 1A0 EN & 47 46 1A1 1 1 2 3 44 5 43 6 41 8 40 9 38 11 37 12 36 35 2 2 13 14 33 16 32 17 30 19 29 20 27 22 26 23 1Y0 1A2 1Y1 1Y2 1A3 1Y3 47 2 46 3 44 5 43 6 41 8 40 9 38 11 37 12 1Y0 2A0 1Y1 2A1 1Y2 2A2 1Y3 2A3 1Y4 2A4 1Y5 2A5 1Y6 2A6 1Y7 2A7 36 13 35 14 33 16 32 17 30 19 29 20 27 22 26 23 2Y1 2Y2 2Y3 1Y4 1Y5 1A4 2Y4 1Y6 1Y7 1A5 2Y5 2Y0 2Y1 1A6 2Y2 2Y3 1A7 2Y4 2Y6 2Y7 2Y5 2Y6 1OE1 2Y7 1OE2 1 48 2OE1 24 25 2OE2 mna056 mna057 Fig. 1. 2Y0 IEC logic symbol Fig. 2. Logic diagram VCC data input to internal circuit mna004 Fig. 3. Bus hold circuit 74LVCH16541A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 1 May 2019 © Nexperia B.V. 2019. All rights reserved 2 / 12 74LVCH16541A Nexperia 16-bit buffer/line driver; 3-state 5. Pinning information 5.1. Pinning 74LVCH16541A 1OE1 1 48 1OE2 1Y0 2 47 1A0 1Y1 3 46 1A1 GND 4 45 GND 1Y2 5 44 1A2 1Y3 6 43 1A3 VCC 7 42 VCC 1Y4 8 41 1A4 1Y5 9 40 1A5 GND 10 39 GND 1Y6 11 38 1A6 1Y7 12 37 1A7 2Y0 13 36 2A0 2Y1 14 35 2A1 GND 15 34 GND 2Y2 16 33 2A2 2Y3 17 32 2A3 VCC 18 31 VCC 2Y4 19 30 2A4 2Y5 20 29 2A5 GND 21 28 GND 2Y6 22 27 2A6 2Y7 23 26 2A7 2OE1 24 25 2OE2 mna055 Fig. 4. Pin configuration SOT362-1 (TSSOP48) 5.2. Pin description Table 2. Pin description Name Pin Description 1OE1 1 output enable input (active LOW) 1OE2 48 output enable input (active LOW) 2OE1 24 output enable input (active LOW) 2OE2 25 output enable input (active LOW) GND 4, 10, 15, 21, 28, 34, 39, 45 ground (0 V) VCC 7, 18, 31, 42 positive supply voltage 1Y0, 1Y1, 1Y2, 1Y3, 1Y4, 1Y5, 1Y6, 1Y7 2, 3, 5, 6, 8, 9, 11, 12 data output 2Y0, 2Y1, 2Y2, 2Y3, 2Y4, 2Y5, 2Y6 2Y7 13, 14, 16, 17, 19, 20, 22, 23 data output 1A0, 1A1, 1A2, 1A3, 1A4, 1A5, 1A6, 1A7 47, 46, 44, 43, 41, 40, 38, 37 data input 2A0, 2A1, 2A2, 2A3, 2A4, 2A5, 2A6, 2A7 36, 35, 33, 32, 30, 29, 27, 26 data input 74LVCH16541A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 1 May 2019 © Nexperia B.V. 2019. All rights reserved 3 / 12 74LVCH16541A Nexperia 16-bit buffer/line driver; 3-state 6. Functional description Table 3. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state Output Input nOE1 nOE2 nAn nYn L L L L L L H H X H X Z H X X Z 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit -0.5 +6.5 V -0.5 +6.5 V -50 - mA - ±50 mA VCC supply voltage VI input voltage IIK input clamping current VI < 0 IOK output clamping current VO > VCC or VO < 0 VO output voltage output HIGH or LOW state [2] -0.5 output 3-state [2] -0.5 +6.5 V - ±50 mA [1] IO output current ICC supply current - 100 mA IGND ground current -100 - mA Tstg storage temperature -65 +150 °C Ptot total power dissipation - 500 mW Min Max Unit 1.65 3.6 V 1.2 - V [1] [2] [3] VO = 0 V to VCC VCC + 0.5 V Tamb = -40 °C to +125 °C [3] The minimum input voltage ratings may be exceeded if the input current ratings are observed. The output voltage ratings may be exceeded if the output current ratings are observed. Above 60 °C the value of Ptot derates linearly with 5.5 mW/K. 8. Recommended operating conditions Table 5. Recommended operating operations Symbol Parameter VCC Conditions supply voltage functional VI input voltage VO output voltage 0 5.5 V output HIGH or LOW state 0 VCC V output 3-state or VCC = 0 V 0 5.5 V -40 +125 °C Tamb ambient temperature in free air Δt/ΔV input transition rise and fall rate VCC = 1.65 V to 2.7 V 0 20 ns/V VCC = 2.7 V to 3.6 V 0 10 ns/V 74LVCH16541A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 1 May 2019 © Nexperia B.V. 2019. All rights reserved 4 / 12 74LVCH16541A Nexperia 16-bit buffer/line driver; 3-state 9. Static characteristics Table 6. Static characteristics At recommended operating conditions. Voltages are referenced to GND (ground = 0 V). Symbol Parameter VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage Conditions -40 °C to +85 °C VCC = 1.2 V VCC = 1.65 V to 1.95 V -40 °C to +125 °C Unit Min Typ [1] Max Min Max 1.08 - - 1.08 - V 0.65VCC - - 0.65VCC - V VCC = 2.3 V to 2.7 V 1.7 - - 1.7 - V VCC = 2.7 V to 3.6 V 2.0 - - 2.0 - V VCC = 1.2 V - - 0.12 - 0.12 V VCC = 1.65 V to 1.95 V - - 0.35VCC - VCC = 2.3 V to 2.7 V - - 0.7 - 0.7 V VCC = 2.7 V to 3.6 V - - 0.8 - 0.8 V VCC - 0.2 VCC - VCC - 0.3 - V IO = -4 mA; VCC = 1.65 V 1.2 - - 1.05 - V IO = -8 mA; VCC = 2.3 V 1.8 - - 1.65 - V IO = -12 mA; VCC = 2.7 V 2.2 - - 2.05 - V IO = -18 mA; VCC = 3.0 V 2.4 - - 2.25 - V IO = -24 mA; VCC = 3.0 V 2.2 - - 2.0 - V - - 0.2 - 0.3 V IO = 4 mA; VCC = 1.65 V - - 0.45 - 0.65 V IO = 8 mA; VCC = 2.3 V - - 0.6 - 0.8 V IO = 12 mA; VCC = 2.7 V - - 0.4 - 0.6 V IO = 24 mA; VCC = 3.0 V - - 0.55 - 0.8 V VI = VIH or VIL HIGH-level output voltage IO = -100 μA; VCC = 1.65 V to 3.6 V VI = VIH or VIL LOW-level output voltage IO = 100 μA; VCC = 1.65 V to 3.6 V 0.35VCC V II input leakage current VCC = 3.6 V; VI = 5.5 V or GND [2] - ±0.1 ±5 - ±20 μA IOZ OFF-state output current VI = VIH or VIL; VCC = 3.6 V; VO = 5.5 V or GND [2] - ±0.1 ±5 - ±20 μA IOFF power-off VCC = 0 V; VI or VO = 5.5 V leakage supply - ±0.1 ±10 - ±20 μA ICC supply current VCC = 3.6 V; VI = VCC or GND; IO = 0 A - 0.1 20 - 80 μA ΔICC additional per input pin; supply current VCC = 1.65 V to 3.6 V; VI = VCC - 0.6 V; IO = 0 A - 5 500 - 5000 μA CI input capacitance - 5.0 - - - pF 74LVCH16541A Product data sheet VCC = 0 V to 3.6 V; VI = GND to VCC All information provided in this document is subject to legal disclaimers. Rev. 4 — 1 May 2019 © Nexperia B.V. 2019. All rights reserved 5 / 12 74LVCH16541A Nexperia 16-bit buffer/line driver; 3-state Symbol Parameter Conditions -40 °C to +85 °C bus hold LOW VCC = 1.65; VI = 0.58 V current VCC = 2.3; VI = 0.7 V IBHL [3][4] VCC = 3.0; VI = 0.8 V IBHH bus hold HIGH VCC = 1.65; VI = 1.07 V current VCC = 2.3; VI = 1.7 V [3][4] VCC = 3.0; VI = 2.0 V IBHLO IBHHO [1] [2] [3] [4] [5] bus hold LOW VCC = 1.95 V overdrive VCC = 2.7 V current VCC = 3.6 V [3][5] bus hold HIGH VCC = 1.95 V overdrive VCC = 2.7 V current VCC = 3.6 V [3][5] -40 °C to +125 °C Unit Min Typ [1] Max Min Max 10 - - 10 - μA 30 - - 25 - μA 75 - - 60 - μA -10 - - -10 - μA -30 - - -25 - μA -75 - - -60 - μA 200 - - 200 - μA 300 - - 300 - μA 500 - - 500 - μA -200 - - -200 - μA -300 - - -300 - μA -500 - - -500 - μA All typical values are measured at VCC = 3.3 V (unless stated otherwise) and Tamb = 25 °C. The bus hold circuit is switched off when VI > VCC allowing 5.5 V on the input pin. For data inputs only; control inputs do not have a bus hold circuit. The specified sustaining current at the data inputs holds the input below the specified VI level. The specified overdrive current at the data input forces the data input to the opposite logic input state. 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V). For test circuit see Fig. 7. Symbol Parameter Conditions -40 °C to +85 °C Min tpd propagation delay nAn to nYn; see Fig. 5 enable time - 10 - - - ns 4.7 10.4 1.8 12.0 ns VCC = 2.3 V to 2.7 V 1.5 2.6 5.2 1.5 6.0 ns VCC = 2.7 V 1.0 2.5 5.0 1.0 6.5 ns VCC = 3.0 V to 3.6 V 1.0 2.2 4.2 1.0 5.5 ns - 17 - - - ns VCC = 1.65 V to 1.95 V 1.5 5.5 14.6 1.5 16.8 ns VCC = 2.3 V to 2.7 V 1.0 3.2 7.7 1.0 8.9 ns VCC = 2.7 V 1.5 3.4 6.9 1.5 9.0 ns 1.0 2.6 5.6 1.0 7.0 ns - 9.0 - - - ns VCC = 1.65 V to 1.95 V 2.6 7.3 9.2 2.6 10.6 ns VCC = 2.3 V to 2.7 V 1.0 4.1 5.2 1.0 6.0 ns VCC = 2.7 V 1.5 4.6 6.5 1.5 8.5 ns VCC = 3.0 V to 3.6 V 1.5 4.5 5.5 1.5 7.0 ns - - 1.0 - 1.5 ns nOEn to nYn; see Fig. 6 [2] nOEn to nYn; see Fig. 6 [2] VCC = 1.2 V tsk(o) output skew time 74LVCH16541A Product data sheet Max 1.8 VCC = 3.0 V to 3.6 V disable time Min VCC = 1.65 V to 1.95 V VCC = 1.2 V tdis Max [2] VCC = 1.2 V ten Typ [1] -40 °C to +125 °C Unit nYn; VCC = 3.0 V to 3.6 V [3] All information provided in this document is subject to legal disclaimers. Rev. 4 — 1 May 2019 © Nexperia B.V. 2019. All rights reserved 6 / 12 74LVCH16541A Nexperia 16-bit buffer/line driver; 3-state Symbol Parameter Conditions -40 °C to +85 °C Min CPD [1] [2] [3] [4] power dissipation capacitance per input; VI = GND to VCC -40 °C to +125 °C Unit Typ [1] Max Min Max [4] VCC = 1.65 V to 1.95 V - 8.5 - - - pF VCC = 2.3 V to 2.7 V - 12.1 - - - pF VCC = 3.0 V to 3.6 V - 15.3 - - - pF Typical values are measured at Tamb = 25 °C and VCC = 1.2 V, 1.8 V, 2.5 V, 2.7 V, and 3.3 V respectively. tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. Skew between any two outputs of the same package switching in the same direction. This parameter is guaranteed by design. CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD × VCC × fi × N + Σ(CL × VCC × fo) where: fi = input frequency in MHz; fo = output frequency in MHz CL = output load capacitance in pF VCC = supply voltage in Volts N = number of inputs switching 2 Σ(CL × VCC × fo) = sum of the outputs 10.1. Waveforms and test circuit VI nAn input VM VM GND tPLH tPHL VOH VM nYn output VM VOL mna171 Measurement points are given in Table 8. VOL and VOH are typical output voltage levels that occur with the output load. Fig. 5. Input nAn to output nYn propagation delays VI nOEn input VM GND tPLZ VCC output LOW-to-OFF OFF-to-LOW VOL tPZL VM VX tPHZ VOH output HIGH-to-OFF OFF-to-HIGH GND tPZH VY VM outputs enabled outputs disabled outputs enabled col015 Measurement points are given in Table 8. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig. 6. 3-state enable and disable times 74LVCH16541A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 1 May 2019 © Nexperia B.V. 2019. All rights reserved 7 / 12 74LVCH16541A Nexperia 16-bit buffer/line driver; 3-state Table 8. Measurement points Supply voltage Input Output VCC VI VM VM VX VY 1.2 V VCC 0.5 × VCC 0.5 × VCC VOL + 0.15 V VOH - 0.15 V 1.65 V to 1.95 V VCC 0.5 × VCC 0.5 × VCC VOL + 0.15 V VOH - 0.15 V 2.3 V to 2.7 V VCC 0.5 × VCC 0.5 × VCC VOL + 0.15 V VOH - 0.15 V 2.7 V 2.7 V 1.5 V 1.5 V VOL + 0.3 V VOH - 0.3 V 3.0 V to 3.6 V 2.7 V 1.5 V 1.5 V VOL + 0.3 V VOH - 0.3 V tW VI 90 % negative pulse VM VM 10 % 0V tf tr tr VI tf 90 % positive pulse VM VM 10 % 0V tW VEXT VCC G VI RL VO DUT RT CL RL 001aae331 Test data is given in Table 9. Definitions for test circuit: RL = Load resistance. CL = Load capacitance including jig and probe capacitance. RT = Termination resistance should be equal to output impedance Zo of the pulse generator. VEXT = External voltage for measuring switching times. Fig. 7. Test circuit for measuring switching times Table 9. Test data Supply voltage Input Load VEXT VI tr, tf CL RL tPLH, tPHL tPLZ, tPZL tPHZ, tPZH 1.2 V VCC ≤ 2 ns 30 pF 1 kΩ open 2 × VCC GND 1.65 V to 1.95 V VCC ≤ 2 ns 30 pF 1 kΩ open 2 × VCC GND 2.3 V to 2.7 V VCC ≤ 2 ns 30 pF 500 Ω open 2 × VCC GND 2.7 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open 2 × VCC GND 3.0 V to 3.6 V 2.7 V ≤ 2.5 ns 50 pF 500 Ω open 2 × VCC GND 74LVCH16541A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 1 May 2019 © Nexperia B.V. 2019. All rights reserved 8 / 12 74LVCH16541A Nexperia 16-bit buffer/line driver; 3-state 11. Package outline TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm SOT362-1 D E A X c v HE y A Z 48 25 Q A2 A1 (A3) pin 1 index A θ Lp 1 L 24 bp e detail X w 0 5 mm 2.5 scale Dimensions (mm are the original dimensions) Unit max nom min mm A 1.2 A1 A2 0.15 1.05 0.05 0.85 A3 0.25 bp c D(1) E(2) 0.28 0.2 12.6 6.2 0.17 0.1 12.4 6.0 e HE 0.5 8.3 7.9 L 1 Lp Q 0.8 0.50 0.4 0.35 v w 0.25 0.08 y 0.1 Z θ 0.8 8° 0.4 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. Outline version SOT362-1 Fig. 8. References IEC JEDEC JEITA sot362-1_po European projection Issue date 03-02-19 13-08-05 MO-153 Package outline SOT362-1 (TSSOP48) 74LVCH16541A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 1 May 2019 © Nexperia B.V. 2019. All rights reserved 9 / 12 74LVCH16541A Nexperia 16-bit buffer/line driver; 3-state 12. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 13. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVCH16541A v.4 20190501 Product data sheet - Modifications: • • • • • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. Type number 74LVCH16541ADL (SOT370-1) removed. Package outline drawing SOT362-1 (TSSOP48) updated. Typo corrected in Table 8. 74LVCH16541A v.3 20120215 Modifications: • • • 74LVCH16541A v.3 Product data sheet - 74LVCH16541A v.2 The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Table 4, Table 5, Table 6, Table 7, and Table 9: values added for lower voltage ranges. 74LVCH16541A v.2 20040218 Product specification - 74LVCH16541A v.1 74LVCH16541A v.1 19980519 Product specification - - 74LVCH16541A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 1 May 2019 © Nexperia B.V. 2019. All rights reserved 10 / 12 74LVCH16541A Nexperia 16-bit buffer/line driver; 3-state 14. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the internet at https://www.nexperia.com. Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. 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Right to make changes — Nexperia reserves the right to make changes to information published in this document, including without limitation specifications and product descriptions, at any time and without notice. This document supersedes and replaces all information supplied prior to the publication hereof. Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal 74LVCH16541A Product data sheet Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. 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In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 4 — 1 May 2019 © Nexperia B.V. 2019. All rights reserved 11 / 12 74LVCH16541A Nexperia 16-bit buffer/line driver; 3-state Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................1 4. Functional diagram.......................................................2 5. Pinning information......................................................3 5.1. Pinning.........................................................................3 5.2. Pin description............................................................. 3 6. Functional description................................................. 4 7. Limiting values............................................................. 4 8. Recommended operating conditions..........................4 9. Static characteristics....................................................5 10. Dynamic characteristics............................................ 6 10.1. Waveforms and test circuit........................................ 7 11. Package outline.......................................................... 9 12. Abbreviations............................................................ 10 13. Revision history........................................................10 14. Legal information......................................................11 © Nexperia B.V. 2019. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 1 May 2019 74LVCH16541A Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 1 May 2019 © Nexperia B.V. 2019. All rights reserved 12 / 12