74AHCT2G08GD-Q100H

74AHC2G08-Q100; 74AHCT2G08-Q100 Dual 2-input AND gate Rev. 4 — 21 March 2018 1 Product data sheet General description The 74AHC2G08-Q100 and 74AHCT2G08-Q100 are high-speed Si-gate CMOS devices. They provide two 2-input AND gates. The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V. The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V. This product has been qualified to the Automotive Electronics Council (AEC) standard Q100 (Grade 1) and is suitable for use in automotive applications. 2 Features and benefits • Automotive product qualification in accordance with AEC-Q100 (Grade 1) – Specified from -40 °C to +85 °C and from -40 °C to +125 °C • Symmetrical output impedance • High noise immunity • Low power dissipation • Balanced propagation delays • Multiple package options • ESD protection: • – MIL-STD-883, method 3015 exceeds 2000 V – HBM JESD22-A114F exceeds 2000 V – MM JESD22-A115-A exceeds 200 V (C = 200 pF, R = 0 Ω) 3 Ordering information Table 1. Ordering information Type number 74AHC2G08DP-Q100 Package Temperature range Name Description Version -40 °C to +125 °C TSSOP8 plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm SOT505-2 -40 °C to +125 °C VSSOP8 plastic very thin shrink small outline package; 8 leads; body width 2.3 mm SOT765-1 74AHCT2G08DP-Q100 74AHC2G08DC-Q100 74AHCT2G08DC-Q100 Nexperia 74AHC2G08-Q100; 74AHCT2G08-Q100 Dual 2-input AND gate 4 Marking Table 2. Marking [1] Type number Marking code 74AHC2G08DP-Q100 A08 74AHCT2G08DP-Q100 C08 74AHC2G08DC-Q100 A08 74AHCT2G08DC-Q100 C08 [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5 Functional diagram 1 1 1A 2 1B 5 2A 6 2B 1Y 7 2Y 3 2 5 6 mna724 & 7 & 3 mna725 Figure 1.  Logic symbol Figure 2.  IEC logic symbol A Y B mna221 Figure 3.  Logic diagram (one gate) 74AHC_AHCT2G08_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 21 March 2018 © Nexperia B.V. 2018. All rights reserved. 2 / 14 Nexperia 74AHC2G08-Q100; 74AHCT2G08-Q100 Dual 2-input AND gate 6 Pinning information 6.1 Pinning 74AHC2G08 74AHCT2G08 1A 1 8 VCC 1B 2 7 1Y 2Y 3 6 2B GND 4 5 2A 001aaj389 Figure 4.  Pin configuration SOT505-2 (TSSOP8) and SOT765-1 (VSSOP8) 6.2 Pin description Table 3. Pin description Symbol Pin Description 1A, 2A 1, 5 data input 1B, 2B 2, 6 data input GND 4 ground (0 V) 1Y, 2Y 7, 3 data output VCC 8 supply voltage 7 Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level. Output Input nA nB nY L L L L H L H L L H H H 74AHC_AHCT2G08_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 21 March 2018 © Nexperia B.V. 2018. All rights reserved. 3 / 14 Nexperia 74AHC2G08-Q100; 74AHCT2G08-Q100 Dual 2-input AND gate 8 Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC Conditions Min Max Unit supply voltage -0.5 +7.0 V VI input voltage -0.5 +7.0 V IIK input clamping current VI < -0.5 V [1] -20 - mA [1] - ±20 mA - ±25 mA IOK output clamping current VO < -0.5 V or VO > VCC + 0.5 V IO output current -0.5 V < VO < VCC + 0.5 V ICC supply current - 75 mA IGND ground current -75 - mA Tstg storage temperature -65 +150 °C - 250 mW Ptot total power dissipation [2] Tamb = -40 °C to +125 °C [1] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. [2] For SOT505-2 package: above 96 °C the value of Ptot derates linearly with 4.6 mW/K. For SOT765-1 package: above 99 °C the value of Ptot derates linearly with 4.9 mW/K. 9 Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74AHC2G08-Q100 74AHCT2G08-Q100 Unit Min Typ Max Min Typ Max 2.0 5.0 5.5 4.5 5.0 5.5 V VCC supply voltage VI input voltage 0 - 5.5 0 - 5.5 V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature -40 +25 +125 -40 +25 +125 °C Δt/ΔV input transition rise and fall rate VCC = 3.3 V ± 0.3 V - - 100 - - - ns/V VCC = 5.0 V ± 0.5 V - - 20 - - 20 ns/V 74AHC_AHCT2G08_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 21 March 2018 © Nexperia B.V. 2018. All rights reserved. 4 / 14 Nexperia 74AHC2G08-Q100; 74AHCT2G08-Q100 Dual 2-input AND gate 10 Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Min Max Min Max VCC = 2.0 V 1.5 - - 1.5 - 1.5 - V VCC = 3.0 V 2.1 - - 2.1 - 2.1 - V VCC = 5.5 V 3.85 - - 3.85 - 3.85 - V VCC = 2.0 V - - 0.5 - 0.5 - 0.5 V VCC = 3.0 V - - 0.9 - 0.9 - 0.9 V VCC = 5.5 V - - 1.65 - 1.65 - 1.65 V VI = VIH or VIL HIGH-level output voltage IO = -50 μA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = -50 μA; VCC = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V IO = -50 μA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = -4.0 mA; VCC = 3.0 V 2.58 - - 2.48 - 2.40 - V IO = -8.0 mA; VCC = 4.5 V 3.94 - - 3.8 - 3.70 - V VI = VIH or VIL LOW-level output voltage IO = 50 μA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 μA; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 μA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V IO = 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V - - 0.1 - 1.0 - 2.0 μA 74AHC2G08-Q100 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage II input leakage current ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.0 - 10 - 40 μA CI input capacitance - 1.5 10 - 10 - 10 pF 74AHC_AHCT2G08_Q100 Product data sheet VI = 5.5 V or GND; VCC = 0 V to 5.5 V All information provided in this document is subject to legal disclaimers. Rev. 4 — 21 March 2018 © Nexperia B.V. 2018. All rights reserved. 5 / 14 Nexperia 74AHC2G08-Q100; 74AHCT2G08-Q100 Dual 2-input AND gate Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Min Max Min Max 74AHCT2G08-Q100 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V VOH VI = VIH or VIL; VCC = 4.5 V HIGH-level output voltage IO = -50 μA 4.4 4.5 - 4.4 - 4.4 - V 3.94 - - 3.8 - 3.70 - V - 0 0.1 - 0.1 - 0.1 V IO = 8.0 mA - - 0.36 - 0.44 - 0.55 V VI = 5.5 V or GND; VCC = 0 V to 5.5 V - - 0.1 - 1.0 - 2.0 μA IO = -8.0 mA VOL VI = VIH or VIL; VCC = 4.5 V LOW-level output voltage IO = 50 μA II input leakage current ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.0 - 10 - 40 μA ΔICC additional per input pin; VI = 3.4 V; supply current other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.35 - 1.5 - 1.5 mA CI input capacitance - 1.5 10 - 10 - 10 pF 11 Dynamic characteristics Table 8. Dynamic characteristics GND = 0 V; for test circuit see Figure 6. Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Min Max Min Max - 4.6 8.8 1.0 10.5 1.0 12.0 ns - 6.5 12.3 1.0 14.0 1.0 16.0 ns - 3.2 5.9 1.0 7.0 1.0 8.0 ns - 4.6 7.9 1.0 9.0 1.0 10.5 ns - 17 - - - - - pF 74AHC2G08-Q100 tpd propagation delay nA, nB to nY; see Figure 5 [1] VCC = 3.0 V to 3.6 V [2] CL = 15 pF CL = 50 pF VCC = 4.5 V to 5.5 V [3] CL = 15 pF CL = 50 pF CPD power per buffer; CL = 50 pF; dissipation fi = 1 MHz; capacitance VI = GND to VCC 74AHC_AHCT2G08_Q100 Product data sheet [4] All information provided in this document is subject to legal disclaimers. Rev. 4 — 21 March 2018 © Nexperia B.V. 2018. All rights reserved. 6 / 14 Nexperia 74AHC2G08-Q100; 74AHCT2G08-Q100 Dual 2-input AND gate Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Min Max Min Max - 3.6 6.2 1.0 7.1 1.0 8.0 ns - 5.1 7.9 1.0 9.0 1.0 10.5 ns - 19 - - - - - pF 74AHCT2G08-Q100 tpd propagation delay nA, nB to nY; see Figure 5 [1] VCC = 4.5 V to 5.5 V [3] CL = 15 pF CL = 50 pF CPD [1] [2] [3] [4] [4] power per buffer; CL = 50 pF; dissipation fi = 1 MHz; capacitance VI = GND to VCC tpd is the same as tPLH and tPHL. Typical values are measured at VCC = 3.3 V. Typical values are measured at VCC = 5.0 V. CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD x VCC x fi x N + Σ(CL x VCC x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; 2 Σ(CL x VCC x fo) = sum of the outputs. 11.1 Waveform and test circuit VI VM nA, nB input GND t PHL t PLH VOH nY output VM VOL mna224 Measurement points are given in Table 9. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Figure 5.  The input (nA and nB) to output (nY) propagation delays Table 9. Measurement points Input Output VM VM 74AHC2G08-Q100 0.5VCC 0.5VCC 74AHCT2G08-Q100 1.5 V 0.5VCC Type 74AHC_AHCT2G08_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 21 March 2018 © Nexperia B.V. 2018. All rights reserved. 7 / 14 Nexperia 74AHC2G08-Q100; 74AHCT2G08-Q100 Dual 2-input AND gate VI negative pulse tW 90 % VM 0V VI positive pulse 0V VM 10 % tf tr tr tf 90 % VM VM 10 % tW VCC VI G DUT VCC VO RT RL S1 open CL 001aad983 Test data is given in Table 10. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Figure 6.  Test circuit for measuring switching times Table 10. Test data Type Input Load VI tr, tf CL VCC ≤ 3 ns 74AHCT2G08-Q100 3 V ≤ 3 ns 74AHC2G08-Q100 74AHC_AHCT2G08_Q100 Product data sheet S1 position RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ 15 pF, 50 pF 1 kΩ open GND VCC 15 pF, 50 pF 1 kΩ open GND VCC All information provided in this document is subject to legal disclaimers. Rev. 4 — 21 March 2018 © Nexperia B.V. 2018. All rights reserved. 8 / 14 Nexperia 74AHC2G08-Q100; 74AHCT2G08-Q100 Dual 2-input AND gate 12 Package outline TSSOP8: plastic thin shrink small outline package; 8 leads; body width 3 mm; lead length 0.5 mm D E A SOT505-2 X c HE y v M A Z 5 8 A A2 pin 1 index (A3) A1 θ Lp L 1 4 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e HE L Lp v w y Z(1) θ mm 1.1 0.15 0.00 0.95 0.75 0.25 0.38 0.22 0.18 0.08 3.1 2.9 3.1 2.9 0.65 4.1 3.9 0.5 0.47 0.33 0.2 0.13 0.1 0.70 0.35 8° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT505-2 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 02-01-16 --- Figure 7.  Package outline SOT505-2 (TSSOP8) 74AHC_AHCT2G08_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 21 March 2018 © Nexperia B.V. 2018. All rights reserved. 9 / 14 Nexperia 74AHC2G08-Q100; 74AHCT2G08-Q100 Dual 2-input AND gate VSSOP8: plastic very thin shrink small outline package; 8 leads; body width 2.3 mm D SOT765-1 E A X c y HE v A Z 5 8 Q A A2 A1 pin 1 index (A3) θ Lp 1 detail X 4 e L w bp 0 5 mm scale Dimensions (mm are the original dimensions) Unit mm A max. max nom min 1 A1 A2 0.15 0.85 0.00 0.60 A3 0.12 D(1) E(2) 0.27 0.23 2.1 2.4 0.17 0.08 1.9 2.2 bp c e HE 0.5 3.2 3.0 L 0.4 Lp Q 0.40 0.21 0.15 0.19 v 0.2 w 0.08 y 0.1 Z(1) θ 0.4 8° 0.1 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic or metal protrusions of 0.25 mm maximum per side are not included. Outline version SOT765-1 References IEC JEDEC JEITA sot765-1_po European projection Issue date 07-06-02 16-05-31 MO-187 Figure 8.  Package outline SOT765-1 (VSSOP8) 74AHC_AHCT2G08_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 21 March 2018 © Nexperia B.V. 2018. All rights reserved. 10 / 14 Nexperia 74AHC2G08-Q100; 74AHCT2G08-Q100 Dual 2-input AND gate 13 Abbreviations Table 11. Abbreviations Acronym Description CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MIL Military MM Machine Model TTL Transistor-Transistor Logic 14 Revision history Table 12. Revision history Document ID Release date 74AHC_AHCT2G08_Q100 v.4 20180321 Modifications: Change notice Supersedes Product data sheet - 74AHC_AHCT2G08_Q100 v.3 • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. • Legal texts have been adapted to the new company name where appropriate. • Table 5: total power dissipation derating factors have changed. • Type number 74AHC2G08GD-Q100 and 74AHCT2G08GD-Q100 (SOT996-2/XSON8) removed . 74AHC_AHCT2G08_Q100 v.3 20151120 Modifications: Data sheet status Product data sheet - 74AHC_AHCT2G08_Q100 v.2 • Added type number 74AHC2G08GD-Q100 and 74AHCT2G08GD-Q100 (SOT996-2/XSON8). 74AHC_AHCT2G08_Q100 v.2 20140121 Product data sheet - 74AHC_AHCT2G08_Q100 v.1 74AHC_AHCT2G08_Q100 v.1 20131113 Product data sheet - - 74AHC_AHCT2G08_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 21 March 2018 © Nexperia B.V. 2018. All rights reserved. 11 / 14 Nexperia 74AHC2G08-Q100; 74AHCT2G08-Q100 Dual 2-input AND gate 15 Legal information 15.1 Data sheet status Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nexperia.com. 15.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. Nexperia does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local Nexperia sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 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This document supersedes and replaces all information supplied prior to the publication hereof. or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Suitability for use in automotive applications — This Nexperia product has been qualified for use in automotive applications. Unless otherwise agreed in writing, the product is not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer's own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation 74AHC_AHCT2G08_Q100 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 21 March 2018 © Nexperia B.V. 2018. All rights reserved. 12 / 14 Nexperia 74AHC2G08-Q100; 74AHCT2G08-Q100 Dual 2-input AND gate Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 74AHC_AHCT2G08_Q100 Product data sheet 15.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 4 — 21 March 2018 © Nexperia B.V. 2018. All rights reserved. 13 / 14 Nexperia 74AHC2G08-Q100; 74AHCT2G08-Q100 Dual 2-input AND gate Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 11.1 12 13 14 15 General description ............................................ 1 Features and benefits .........................................1 Ordering information .......................................... 1 Marking .................................................................2 Functional diagram ............................................. 2 Pinning information ............................................ 3 Pinning ............................................................... 3 Pin description ................................................... 3 Functional description ........................................3 Limiting values .................................................... 4 Recommended operating conditions ................ 4 Static characteristics .......................................... 5 Dynamic characteristics .....................................6 Waveform and test circuit ..................................7 Package outline ...................................................9 Abbreviations .................................................... 11 Revision history ................................................ 11 Legal information .............................................. 12 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section 'Legal information'. © Nexperia B.V. 2018. All rights reserved. For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 21 March 2018 Document identifier: 74AHC_AHCT2G08_Q100