74LVT04DB,112

74LVT04 3.3 V Hex inverter Rev. 4 — 12 August 2021 Product data sheet 1. General description The 74LVT04 is a hex inverter. This device is fully specified for partial power down applications using IOFF. The IOFF circuitry disables the output, preventing the potentially damaging backflow current through the device when it is powered down. 2. Features and benefits • • • • • • • • • • • Wide supply voltage range from 2.7 to 3.6 V Overvoltage tolerant inputs to 5.5 V BiCMOS high speed and output drive Direct interface with TTL levels No bus current loading when output is tied to 5 V bus Power-up 3-state IOFF circuitry provides partial Power-down mode operation Latch-up performance exceeds 500 mA per JESD 78 Class II Level B Complies with JEDEC standards: • JESD8C (2.7 V to 3.6 V) ESD protection: • HBM JESD22-A114E exceeds 2000 V • MM JESD22-A115-A exceeds 200 V Specified from -40 °C to +85 °C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVT04D -40 °C to +85 °C SO14 plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 74LVT04PW -40 °C to +85 °C TSSOP14 plastic thin shrink small outline package; 14 leads; body width 4.4 mm SOT402-1 74LVT04 Nexperia 3.3 V Hex inverter 4. Functional diagram 1 1 1A 1Y 2 3 2A 2Y 4 3 5 5 3A 3Y 6 9 4A 4Y 8 11 5A 5Y 10 13 6A 6Y 12 9 11 13 mna342 Fig. 1. 1 2 1 4 1 6 1 8 1 10 1 12 Y A mna343 Logic symbol Fig. 2. mna341 IEC logic symbol Fig. 3. Logic diagram for one gate 5. Pinning information 5.1. Pinning 74LVT04 1A 1 14 VCC 1Y 2 13 6A 2A 3 12 6Y 2Y 4 11 5A 3A 5 10 5Y 3Y 6 9 4A GND 7 8 4Y 74LVT04 1A 1 1Y 2 14 VCC 13 6A 2A 3 12 6Y 2Y 4 11 5A 3A 5 10 5Y 3Y 6 9 4A GND 7 8 4Y aaa-013009 Fig. 4. aaa-033317 Pin configuration SOT108-1 (SO14) Fig. 5. Pin configuration SOT402-1 (TSSOP14) 5.2. Pin description Table 2. Pin description Symbol Pin Description nA 1, 3, 5, 9, 11, 13 data input nY 2, 4, 6, 8, 10, 12 data output GND 7 ground (0 V) VCC 14 supply voltage 74LVT04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 12 August 2021 © Nexperia B.V. 2021. All rights reserved 2 / 10 74LVT04 Nexperia 3.3 V Hex inverter 6. Functional description Table 3. Function table H = HIGH voltage level; L = LOW voltage level; Z = high-impedance OFF-state. Input Output nA nY L H H L 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions Min Max Unit -0.5 +4.6 V [1] -0.5 +7.0 V [1] -0.5 +7.0 V VCC supply voltage VI input voltage VO output voltage output in OFF-state or HIGH-state IIK input clamping current VI < 0 V -50 - mA IOK output clamping current VO < 0 V -50 - mA IO output current output in LOW-state - 64 mA Tstg storage temperature Tj junction temperature Ptot total power dissipation output in HIGH-state [1] [2] [3] Tamb = -40 °C to +85 °C - -32 mA -65 +150 °C [2] - 150 °C [3] - 500 mW The input and output negative voltage ratings may be exceeded if the input and output clamp current ratings are observed. The performance capability of a high-performance integrated circuit in conjunction with its thermal environment can create junction temperatures which are detrimental to reliability. For SOT402-1 (TSSOP14) package: Ptot derates linearly with 7.3 mW/K above 81 °C. 8. Recommended operating conditions Table 5. Recommended operating conditions Symbol Parameter Conditions Min Max Unit 2.7 3.6 V 0 5.5 V VCC supply voltage VI input voltage VIH HIGH-level input voltage 2.0 - V VIL LOW-level input voltage - 0.8 V IOH HIGH-level output current - -20 mA IOL LOW-level output current - 32 mA Tamb ambient temperature in free air -40 +85 °C Δt/ΔV input transition rise and fall rate outputs enabled - 10 ns/V 74LVT04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 12 August 2021 © Nexperia B.V. 2021. All rights reserved 3 / 10 74LVT04 Nexperia 3.3 V Hex inverter 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions VIK input clamp voltage VCC = 2.7 V; IIK = -18 mA VOH LOW-level input voltage VCC = 2.7 V to 3.6 V; IOH = -100 μA VOL LOW-level output voltage II input leakage current -40 °C to +85 °C Unit Min Typ [1] Max - - -1.2 V VCC - 0.2 - - V VCC = 2.7 V; IOH = -6 mA 2.4 - - V VCC = 3.0 V; IOH = -20 mA 2.0 - - V VCC = 2.7 V; IOL = -100 μA - - 0.2 V VCC = 2.7 V; IOL = 24 mA - - 0.5 V VCC = 3.0 V; IOL = 32 mA - - 0.5 V VCC = 0 V or 3.6 V; VI = 5.5 V - - 10 μA VCC = 3.6 V; VI = VCC or GND - - ±1 μA IOFF output off current VCC = 0 V; VI or VO = 0 V to 4.5 V - - ±100 μA ICCH quiescent supply current VCC = 3.6 V; outputs HIGH; VI = GND or VCC, IO = 0 V - - 0.02 mA ICCL quiescent supply current VCC = 3.6 V; outputs LOW; VI = GND or VCC; IO = 0 V - 1.5 3 mA ΔICC additional supply current per input pin; VCC = 3 V to 3.6 V; one input at VCC - 0.6 V; other inputs at VCC or GND - - 0.2 mA CI input capacitance VI = 3 V or 0 V - 3 - pF [1] [2] [2] All typical values are at VCC = 3.3 V and Tamb = 25°C. This is the increase in supply current for each input at the specified voltage level other than VCC or GND. 10. Dynamic characteristics Table 7. Dynamic characteristics GND = 0 V; for test circuit, see Fig. 7. Symbol Parameter tPLH Conditions LOW to OFF-state propagation delay nA to nY; see Fig. 6 OFF-state to LOW propagation delay nA to nY; see Fig. 6 VCC = 2.7 V VCC = 3.3 V ± 0.3 V tPHL VCC = 2.7 V VCC = 3.3 V ± 0.3 V [1] -40 °C to +85 °C Unit Min Typ [1] Max - - 4.7 ns 1.0 2.6 3.9 ns ns - - 3.2 1.0 2.5 3.5 ns All typical values are at VCC = 3.3 V and Tamb = 25°C. 74LVT04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 12 August 2021 © Nexperia B.V. 2021. All rights reserved 4 / 10 74LVT04 Nexperia 3.3 V Hex inverter 10.1. Waveform and test circuit VI VM nA input VM GND t PHL t PLH VOH VM nY output VM VOL mna344 VM = 50%; VI = GND to VCC. VM = 1.5 V; VI = GND to 2.7 V Fig. 6. The input nA to output nY propagation delays tW VI 90 % negative pulse VM VM 10 % 0V VI tf tr tr tf 90 % positive pulse VM VM 10 % 0V tW VCC PULSE GENERATOR VI VO DUT RT CL RL 001aaf615 Test data is given in Table 8. Definitions test circuit: RT = termination resistance should be equal to output impedance Zo of the pulse generator. CL = load capacitance including jig and probe capacitance. RL = Load resistance. Fig. 7. Test circuit for measuring switching times Table 8. Test data Input Load VI fi tW tr, tf CL RL 2.7 V ≤ 10 MHz 500 ns ≤2.5 ns 50 pF 500 Ω 74LVT04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 12 August 2021 © Nexperia B.V. 2021. All rights reserved 5 / 10 74LVT04 Nexperia 3.3 V Hex inverter 11. Package outline SO14: plastic small outline package; 14 leads; body width 3.9 mm SOT108-1 D E A X c y HE v M A Z 8 14 A2 Q A (A 3) A1 pin 1 index θ Lp 1 L 7 e detail X w M bp 0 2.5 5 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y Z (1) mm 1.75 0.25 0.10 1.45 1.25 0.25 0.49 0.36 0.25 0.19 8.75 8.55 4.0 3.8 1.27 6.2 5.8 1.05 1.0 0.4 0.7 0.6 0.25 0.25 0.1 0.7 0.3 inches 0.069 0.010 0.057 0.004 0.049 0.01 0.019 0.0100 0.35 0.014 0.0075 0.34 0.16 0.15 0.05 0.01 0.01 0.004 0.028 0.012 0.244 0.039 0.028 0.041 0.228 0.016 0.024 θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. Fig. 8. REFERENCES OUTLINE VERSION IEC JEDEC SOT108-1 076E06 MS-012 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Package outline SOT108-1 (SO14) 74LVT04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 12 August 2021 © Nexperia B.V. 2021. All rights reserved 6 / 10 74LVT04 Nexperia 3.3 V Hex inverter TSSOP14: plastic thin shrink small outline package; 14 leads; body width 4.4 mm D SOT402-1 E A X c y HE v M A Z 8 14 Q A2 pin 1 index (A 3 ) A1 A θ Lp 1 L 7 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 5.1 4.9 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.72 0.38 8o 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT402-1 Fig. 9. REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-18 MO-153 Package outline SOT402-1 (TSSOP14) 74LVT04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 12 August 2021 © Nexperia B.V. 2021. All rights reserved 7 / 10 74LVT04 Nexperia 3.3 V Hex inverter 12. Abbreviations Table 9. Abbreviations Acronym Description BiCMOS Bipolar Complementary Metal Oxide Semiconductor ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 13. Revision history Table 10. Revision history Document ID Release date Data sheet status Change notice Supersedes 74LVT04 v.4 20210812 Product data sheet - Modifications: • 74LVT04 v.3 20210401 Modifications: • • • • • Type number 74LVT04DB (SOT337-1/SSOP14) removed. 20140428 Modifications: • 74LVT04_1 74LVT04 Product data sheet Product data sheet - 74LVT04 v.2 The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. Section 1 and Section 2 updated. Section 7: Derating values for Ptot total power dissipation updated. Section 9: Unit of ΔICC corrected to mA (Errata). 74LVT04 v.2 • • 74LVT04 v.3 Product data sheet - 74LVT04_1 The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Imported the data sheet into the latest template 19960828 Product specification - All information provided in this document is subject to legal disclaimers. Rev. 4 — 12 August 2021 - © Nexperia B.V. 2021. All rights reserved 8 / 10 74LVT04 Nexperia 3.3 V Hex inverter 14. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. Document status [1][2] Product status [3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] [2] [3] Please consult the most recently issued document before initiating or completing a design. The term 'short data sheet' is explained in section "Definitions". The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. 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Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal 74LVT04 Product data sheet Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. 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Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 4 — 12 August 2021 © Nexperia B.V. 2021. All rights reserved 9 / 10 74LVT04 Nexperia 3.3 V Hex inverter Contents 1. General description...................................................... 1 2. Features and benefits.................................................. 1 3. Ordering information....................................................1 4. Functional diagram.......................................................2 5. Pinning information......................................................2 5.1. Pinning.........................................................................2 5.2. Pin description............................................................. 2 6. Functional description................................................. 3 7. Limiting values............................................................. 3 8. Recommended operating conditions..........................3 9. Static characteristics....................................................4 10. Dynamic characteristics............................................ 4 10.1. Waveform and test circuit.......................................... 5 11. Package outline.......................................................... 6 12. Abbreviations.............................................................. 8 13. Revision history..........................................................8 14. Legal information........................................................9 © Nexperia B.V. 2021. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 12 August 2021 74LVT04 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 12 August 2021 © Nexperia B.V. 2021. All rights reserved 10 / 10