74AHCT273D,112

74AHC273; 74AHCT273 Octal D-type flip-flop with reset; positive-edge trigger Rev. 4 — 23 September 2020 Product data sheet 1. General description The 74AHC273; 74AHCT273 is a high-speed Si-gate CMOS device and is pin compatible with Low-power Schottky TTL (LSTTL). It is specified in compliance with JEDEC standard No. 7-A. The 74AHC273; 74AHCT273 has eight edge-triggered, D-type flip-flops with individual D inputs and Q outputs. The common clock (CP) and master reset (MR) inputs, load and reset (clear) all flip-flops simultaneously. The state of each D input, one set-up time before the LOW-to-HIGH clock transition, is transferred to the corresponding output (Qn) of the flip-flop. All outputs will be forced LOW, independent of clock or data inputs, by a LOW on the MR input. The device is useful for applications where only the true output is required and the clock and master reset are common to all storage elements. 2. Features • • • • • • • • • Balanced propagation delays All inputs have Schmitt-trigger actions Inputs accept voltages higher than VCC Ideal buffer for MOS microcontroller or memory Common clock and master reset Input levels: • For 74AHC273: CMOS level • For 74AHCT273: TTL level ESD protection: • HBM JESD22-A114E exceeds 2000 V • MM JESD22-A115-A exceeds 200 V • CDM JESD22-C101C exceeds 1000 V Multiple package options Specified from -40 °C to +85 °C and from -40 °C to +125 °C 3. Ordering information Table 1. Ordering information Type number Package 74AHC273D Temperature range Name Description Version -40 °C to +125 °C SO20 plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 -40 °C to +125 °C TSSOP20 plastic thin shrink small outline package; 20 leads; body width 4.4 mm SOT360-1 -40 °C to +125 °C DHVQFN20 plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 × 4.5 × 0.85 mm 74AHCT273D 74AHC273PW 74AHCT273PW 74AHC273BQ 74AHCT273BQ SOT764-1 74AHC273; 74AHCT273 Nexperia Octal D-type flip-flop with reset; positive-edge trigger 4. Functional diagram CP 11 MR 11 CP 3 4 7 8 13 14 17 18 D0 Q0 D1 Q1 D2 Q2 D3 Q3 D4 Q4 D5 Q5 D6 Q6 D7 MR 1 Fig. 1. Q7 D0 2 5 D1 6 D2 9 D3 12 D4 15 D5 16 D6 19 D7 C1 1 R 3 2 1D 4 5 7 6 8 9 13 12 14 15 17 16 18 19 mna763 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 mna764 Logic symbol Fig. 2. D0 D1 D Q D2 D CP FF1 IEC logic symbol Q D CP FF2 RD D3 Q D CP FF3 RD Q CP FF4 RD RD CP MR Q0 D4 Q1 D5 D Q D CP FF5 Q Q4 Q D CP FF7 RD Q3 D7 D CP FF6 RD Q2 D6 RD Q5 Q CP FF8 RD Q6 Q7 001aae056 Fig. 3. Logic diagram 74AHC_AHCT273 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 23 September 2020 © Nexperia B.V. 2020. All rights reserved 2 / 16 74AHC273; 74AHCT273 Nexperia Octal D-type flip-flop with reset; positive-edge trigger 3 4 7 8 13 14 17 18 1 11 D0 D1 D2 D3 D4 D5 D6 D7 FF1 TO FF8 Q0 Q1 Q2 Q3 Q4 Q5 Q6 Q7 2 5 6 9 12 15 16 19 MR CP 001aae055 Fig. 4. Functional diagram 5. Pinning information 5.1. Pinning 1 MR terminal 1 index area 1 Q0 2 20 VCC 19 Q7 D0 3 18 D7 D1 4 17 D6 Q1 5 16 Q6 Q2 6 15 Q5 D2 7 14 D5 D3 8 13 D4 Q3 9 12 Q4 GND 10 11 CP 19 Q7 D0 3 18 D7 D1 4 17 D6 Q1 5 16 Q6 Q2 6 15 Q5 D2 7 D3 8 Q3 9 GND(1) 14 D5 13 D4 12 Q4 001aai067 Transparent top view (1) This is not a ground pin. There is no electrical or mechanical requirement to solder the pad. In case soldered, the solder land should remain floating or connected to GND. 001aai066 Fig. 5. 2 CP 11 MR Q0 GND 10 74AHC273 74AHCT273 20 VCC 74AHC273 74AHCT273 Pin configuration SOT163-1 (SO20) and SOT360-1 (TSSOP20) Fig. 6. Pin configuration SOT764-1 (DHVQFN20) 5.2. Pin description Table 2. Pin description Symbol Pin Description MR 1 master reset input (active LOW) Q0, Q1, Q2, Q3, Q4, Q5, Q6, Q7 2, 5, 6, 9, 12, 15, 16, 19 flip-flop output D0, D1, D2, D3, D4, D5, D6, D7 3, 4, 7, 8, 13, 14, 17, 18 data input GND 10 ground (0 V) CP 11 clock input (LOW-to-HIGH edge-triggered) VCC 20 supply voltage 74AHC_AHCT273 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 23 September 2020 © Nexperia B.V. 2020. All rights reserved 3 / 16 74AHC273; 74AHCT273 Nexperia Octal D-type flip-flop with reset; positive-edge trigger 6. Functional description Table 3. Function table H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the LOW-to-HIGH CP transition; L = LOW voltage level; l = LOW voltage level one set-up time prior to the LOW-to-HIGH CP transition; ↑ = LOW-to-HIGH; X = don’t care. Input Output MR CP Dn Qn Reset (clear) L X X L Load ‘1’ H ↑ h H Load ‘0’ H ↑ l L Operating mode Control 7. Limiting values Table 4. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter Min Max Unit VCC supply voltage -0.5 +7.0 V VI input voltage IIK input clamping current VI < -0.5 V [1] -0.5 +7.0 V -20 - mA IOK output clamping current VO < -0.5 V or VO > VCC + 0.5 V [1] -20 +20 mA IO output current VO = -0.5 V to (VCC + 0.5 V) -25 +25 mA ICC supply current - +75 mA IGND ground current -75 - mA Tstg storage temperature -65 +150 °C Ptot total power dissipation - 500 mW [1] [2] Conditions Tamb = -40 °C to +125 °C [2] The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For SOT163-1 (SO20) package: Ptot derates linearly with 12.3 mW/K above 109 °C. For SOT360-1 (TSSOP20) package: Ptot derates linearly with 10.0 mW/K above 100 °C. For SOT764-1 (DHVQFN20) package: Ptot derates linearly with 12.9 mW/K above 111 °C. 8. Recommended operating conditions Table 5. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74AHC273 74AHCT273 Unit Min Typ Max Min Typ Max 2.0 5.0 5.5 4.5 5.0 5.5 V VCC supply voltage VI input voltage 0 - 5.5 0 - 5.5 V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature -40 +25 +125 -40 +25 +125 °C Δt/ΔV input transition rise and VCC = 3.3 V ± 0.3 V fall rate VCC = 5.0 V ± 0.5 V - - 100 - - - ns/V - - 20 - - 20 ns/V 74AHC_AHCT273 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 23 September 2020 © Nexperia B.V. 2020. All rights reserved 4 / 16 74AHC273; 74AHCT273 Nexperia Octal D-type flip-flop with reset; positive-edge trigger 9. Static characteristics Table 6. Static characteristics At recommended operating conditions; voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Min Max Min Max VCC = 2.0 V 1.5 - - 1.5 - 1.5 - V VCC = 3.0 V 2.1 - - 2.1 - 2.1 - V VCC = 5.5 V 3.85 - - 3.85 - 3.85 - V VCC = 2.0 V - - 0.5 - 0.5 - 0.5 V VCC = 3.0 V - - 0.9 - 0.9 - 0.9 V 74AHC273 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage VCC = 5.5 V - - 1.65 - 1.65 - 1.65 V VI = VIH or VIL HIGH-level output voltage IO = -50 μA; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = -50 μA; VCC = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V IO = -50 μA; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = -4.0 mA; VCC = 3.0 V 2.58 - - 2.48 - 2.40 - V IO = -8.0 mA; VCC = 4.5 V 3.94 - - 3.80 - 3.70 - V VI = VIH or VIL LOW-level output voltage IO = 50 μA; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 μA; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 μA; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V IO = 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V - - 0.1 - 1.0 - 2.0 μA II input leakage current ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 4.0 - 40 - 80 μA CI input capacitance - 3 10 - 10 - 10 pF CO output capacitance - 4 - - - - - pF 74AHC_AHCT273 Product data sheet VI = 5.5 V or GND; VCC = 0 V to 5.5 V All information provided in this document is subject to legal disclaimers. Rev. 4 — 23 September 2020 © Nexperia B.V. 2020. All rights reserved 5 / 16 74AHC273; 74AHCT273 Nexperia Octal D-type flip-flop with reset; positive-edge trigger Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ Max Min Max Min Max 74AHCT273 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V VOH VI = VIH or VIL; VCC = 4.5 V HIGH-level output voltage IO = -50 μA 4.4 - - 4.4 - 4.4 - V 3.94 - - 3.80 - 3.70 - V - 0 0.1 - 0.1 - 0.1 V IO = 8.0 mA - - 0.36 - 0.44 - 0.55 V VI = 5.5 V or GND; VCC = 0 V to 5.5 V - - 0.1 - 1.0 - 2.0 μA IO = -8.0 mA VOL VI = VIH or VIL; VCC = 4.5 V LOW-level output voltage IO = 50 μA II input leakage current ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 4.0 - 40 - 80 μA ΔICC additional per input pin; VI = VCC - 2.1 V; supply current other pins at VCC or GND; IO = 0 A; VCC = 4.5 V to 5.5 V - - 1.35 - 1.5 - 1.5 mA CI input capacitance - 3 10 - 10 - 10 pF CO output capacitance - 4 - - - - - pF 10. Dynamic characteristics Table 7. Dynamic characteristics Voltages are referenced to GND (ground = 0 V); for test circuit see Fig. 10. Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ[1] Max Min Max Min Max 74AHC273 tpd propagation CP to Qn; see Fig. 7 delay VCC = 3.0 V to 3.6 V [2] CL = 15 pF - 6.0 13.6 1.0 16.0 1.0 17.0 ns CL = 50 pF - 8.6 17.1 1.0 19.5 1.0 21.5 ns CL = 15 pF - 4.2 9 1.0 10.5 1.0 11.5 ns CL = 50 pF - 6.0 11.0 1.0 12.5 1.0 14.0 ns CL = 15 pF - 5.1 13.6 1.0 16.0 1.0 17.0 ns CL = 50 pF - 7.3 17.1 1.0 19.5 1.0 21.5 ns CL = 15 pF - 3.7 8.5 1.0 10.0 1.0 11.0 ns CL = 50 pF - 5.3 10.5 1.0 12.0 1.0 13.5 ns VCC = 4.5 V to 5.5 V MR to Qn; see Fig. 8 [3] VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V 74AHC_AHCT273 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 23 September 2020 © Nexperia B.V. 2020. All rights reserved 6 / 16 74AHC273; 74AHCT273 Nexperia Octal D-type flip-flop with reset; positive-edge trigger Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ[1] Max fmax maximum frequency Min Max Min Max see Fig. 7 VCC = 3.0 V to 3.6 V CL = 15 pF 75 120 - 65 - 65 - MHz CL = 50 pF 50 75 - 45 - 45 - MHz CL = 15 pF 120 165 - 100 - 100 - MHz CL = 50 pF 80 110 - 70 - 70 - MHz VCC = 3.0 V to 3.6 V 5.0 - - 6.5 - 6.5 - ns VCC = 4.5 V to 5.5 V 5.0 - - 5.0 - 5.0 - ns VCC = 3.0 V to 3.6 V 5.0 - - 6.0 - 6.0 - ns VCC = 4.5 V to 5.5 V 5.0 - - 5.0 - 5.0 - ns VCC = 3.0 V to 3.6 V 3.0 - - 3.0 - 3.0 - ns VCC = 4.5 V to 5.5 V 3.0 - - 3.0 - 3.0 - ns VCC = 3.0 V to 3.6 V 1.0 - - 1.0 - 1.0 - ns VCC = 4.5 V to 5.5 V 1.0 - - 1.0 - 1.0 - ns VCC = 3.0 V to 3.6 V 2.5 - - 2.5 - 2.5 - ns VCC = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - ns - 14 - - - - - pF VCC = 4.5 V to 5.5 V tW pulse width CP HIGH or LOW; see Fig. 7 MR LOW; see Fig. 8 tsu th trec CPD set-up time hold time recovery time Dn to CP; see Fig. 9 Dn to CP; see Fig. 9 MR to CP; see Fig. 8 power fi = 1 MHz; VI = GND to VCC [4] dissipation capacitance 74AHC_AHCT273 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 23 September 2020 © Nexperia B.V. 2020. All rights reserved 7 / 16 74AHC273; 74AHCT273 Nexperia Octal D-type flip-flop with reset; positive-edge trigger Symbol Parameter Conditions 25 °C -40 °C to +85 °C -40 °C to +125 °C Unit Min Typ[1] Max Min Max Min Max 74AHCT273; VCC = 4.5 V to 5.5 V propagation CP to Qn; see Fig. 7 delay CL = 15 pF tpd [2] - 4.0 7.5 1.0 8.8 1.0 9.5 ns - 5.8 9.2 1.0 10.5 1.0 11.5 ns CL = 15 pF - 3.9 10.0 1.0 11.6 1.0 12.5 ns CL = 50 pF - 5.6 11.0 1.0 12.6 1.0 14.0 ns CL = 15 pF 75 120 - 65 - 65 - MHz CL = 50 pF 50 75 - 45 - 45 - MHz CP HIGH or LOW; see Fig. 7 5.0 - - 6.5 - 6.5 - ns MR LOW; see Fig. 8 5.0 - - 6.0 - 6.0 - ns CL = 50 pF MR to Qn; see Fig. 8 fmax maximum frequency tW pulse width [3] see Fig. 7 tsu set-up time Dn to CP; see Fig. 9 3.0 - - 3.0 - 3.0 - ns th hold time Dn to CP; see Fig. 9 1.0 - - 1.0 - 1.0 - ns trec recovery time MR to CP; see Fig. 8 2.5 - - 2.5 - 2.5 - ns CPD power fi = 1 MHz; VI = GND to VCC [4] dissipation capacitance - 18 - - - - - pF [1] [2] [3] [4] Typical values are measured at nominal supply voltage (VCC = 3.3 V and VCC = 5.0 V). tpd is the same as tPLH and tPHL. tpd is the same as tPHL only. CPD is used to determine the dynamic power dissipation (PD in μW). 2 2 PD = CPD x VCC x fi x N + Σ(CL x VCC x fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in V; N = number of inputs switching; 2 Σ(CL x VCC x fo) = sum of the outputs. 10.1. Waveforms and test circuit 1/fmax VI CP input VM GND tW t PHL t PLH VOH VM Qn output VOL 001aac426 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig. 7. Clock pulse width, maximum frequency and input to output propagation delays 74AHC_AHCT273 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 23 September 2020 © Nexperia B.V. 2020. All rights reserved 8 / 16 74AHC273; 74AHCT273 Nexperia Octal D-type flip-flop with reset; positive-edge trigger VI VM MR input GND tW trec VI CP input VM GND tPHL VOH VM Qn output VOL mna464 Measurement points are given in Table 8. VOL and VOH are typical voltage output levels that occur with the output load. Fig. 8. Master reset pulse width, recovery time and propagation delay VI VM CP input GND tsu tsu th th VI VM Dn input GND VOH VM Qn output VOL mna202 Measurement points are given in Table 8. The shaded areas indicate when the input is permitted to change for predictable output performance. VOL and VOH are typical voltage output levels that occur with the output load. Fig. 9. Data set-up and hold times Table 8. Measurement points Type Input Output VM VM 74AHC273 0.5 x VCC 0.5 x VCC 74AHCT273 1.5 V 0.5 x VCC 74AHC_AHCT273 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 23 September 2020 © Nexperia B.V. 2020. All rights reserved 9 / 16 74AHC273; 74AHCT273 Nexperia Octal D-type flip-flop with reset; positive-edge trigger VI negative pulse VM VI GND VM 10 % GND positive pulse tW 90 % tf tr tr tf 90 % VM VM 10 % tW VCC G VI DUT VO RT CL 001aah768 Test data is given in Table 9. Definitions test circuit: RT = termination resistance should be equal to output impedance Zo of the pulse generator. CL = load capacitance including jig and probe capacitance. Fig. 10. Test circuit for measuring switching times Table 9. Test data Type Load Input Test VI tr, tf CL 74AHC273 VCC ≤ 3.0 ns 15 pF, 50 pF tPLH, tPHL 74AHCT273 3.0 V ≤ 3.0 ns 15 pF, 50 pF tPLH, tPHL 74AHC_AHCT273 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 23 September 2020 © Nexperia B.V. 2020. All rights reserved 10 / 16 74AHC273; 74AHCT273 Nexperia Octal D-type flip-flop with reset; positive-edge trigger 11. Package outline SO20: plastic small outline package; 20 leads; body width 7.5 mm SOT163-1 D E A X c y HE v M A Z 20 11 Q A2 A (A 3 ) A1 pin 1 index θ Lp L 1 10 e bp detail X w M 0 5 10 mm scale DIMENSIONS (inch dimensions are derived from the original mm dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (1) e HE L Lp Q v w y mm 2.65 0.3 0.1 2.45 2.25 0.25 0.49 0.36 0.32 0.23 13.0 12.6 7.6 7.4 1.27 10.65 10.00 1.4 1.1 0.4 1.1 1.0 0.25 0.25 0.1 0.9 0.4 inches 0.1 0.012 0.096 0.004 0.089 0.01 0.019 0.013 0.014 0.009 0.51 0.49 0.30 0.29 0.05 0.419 0.043 0.055 0.394 0.016 0.043 0.039 0.01 0.01 0.004 0.035 0.016 Z (1) θ o 8 o 0 Note 1. Plastic or metal protrusions of 0.15 mm (0.006 inch) maximum per side are not included. REFERENCES OUTLINE VERSION IEC JEDEC SOT163-1 075E04 MS-013 JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 Fig. 11. Package outline SOT163-1 (SO20) 74AHC_AHCT273 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 23 September 2020 © Nexperia B.V. 2020. All rights reserved 11 / 16 74AHC273; 74AHCT273 Nexperia Octal D-type flip-flop with reset; positive-edge trigger TSSOP20: plastic thin shrink small outline package; 20 leads; body width 4.4 mm D SOT360-1 E A X c HE y v M A Z 11 20 Q A2 pin 1 index (A 3 ) A1 A θ Lp 1 L 10 detail X w M bp e 0 2.5 5 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D (1) E (2) e HE L Lp Q v w y Z (1) θ mm 1.1 0.15 0.05 0.95 0.80 0.25 0.30 0.19 0.2 0.1 6.6 6.4 4.5 4.3 0.65 6.6 6.2 1 0.75 0.50 0.4 0.3 0.2 0.13 0.1 0.5 0.2 8o 0o Notes 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. 2. Plastic interlead protrusions of 0.25 mm maximum per side are not included. OUTLINE VERSION SOT360-1 REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 99-12-27 03-02-19 MO-153 Fig. 12. Package outline SOT360-1 (TSSOP20) 74AHC_AHCT273 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 23 September 2020 © Nexperia B.V. 2020. All rights reserved 12 / 16 74AHC273; 74AHCT273 Nexperia Octal D-type flip-flop with reset; positive-edge trigger DHVQFN20: plastic dual in-line compatible thermal enhanced very thin quad flat package; no leads; 20 terminals; body 2.5 x 4.5 x 0.85 mm B D SOT764-1 A A A1 E c detail X terminal 1 index area terminal 1 index area e1 C e b 2 9 v w C A B C y1 C y L 1 10 Eh e 20 11 19 12 X Dh 0 2.5 5 mm scale Dimensions (mm are the original dimensions) Unit mm A(1) A1 b max 1.00 0.05 0.30 nom 0.90 0.02 0.25 min 0.80 0.00 0.18 c D(1) Dh E(1) Eh e e1 L v 0.2 4.6 4.5 4.4 3.15 3.00 2.85 2.6 2.5 2.4 1.15 1.00 0.85 0.5 3.5 0.5 0.4 0.3 0.1 w y 0.05 0.05 y1 0.1 Note 1. Plastic or metal protrusions of 0.075 mm maximum per side are not included. References Outline version IEC JEDEC JEITA SOT764-1 --- MO-241 --- sot764-1_po European projection Issue date 03-01-27 14-12-12 Fig. 13. Package outline SOT764-1 (DHVQFN20) 74AHC_AHCT273 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 23 September 2020 © Nexperia B.V. 2020. All rights reserved 13 / 16 74AHC273; 74AHCT273 Nexperia Octal D-type flip-flop with reset; positive-edge trigger 12. Abbreviations Table 10. Abbreviations Acronym Description CDM Charged Device Model CMOS Complementary Metal-Oxide Semiconductor DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model LSTTL Low-power Schottky Transistor-Transistor Logic MM Machine Model MOS Metal-Oxide Semiconductor 13. Revision history Table 11. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AHC_AHCT273 v.4 20200923 Product data sheet - 74AHC_AHCT273 v.3 Modifications: • • • • • The format of this data sheet has been redesigned to comply with the identity guidelines of Nexperia. Legal texts have been adapted to the new company name where appropriate. Section 2 updated. Table 4: Derating values for Ptot total power dissipation have been updated. Package outline drawing of SOT764-1 (Fig. 13) updated. 74AHC_AHCT273 v.3 20080513 Modifications: • • • Product data sheet - 74AHC_AHCT273 v.2 The format of this data sheet has been redesigned to comply with the new identity guidelines of NXP Semiconductors. Legal texts have been adapted to the new company name where appropriate. Table 6: the conditions for input leakage current have been changed. 74AHC_AHCT273 v.2 20030721 Product specification - 74AHC_AHCT273 v.1 74AHC_AHCT273 v.1 19990901 Product specification - - 74AHC_AHCT273 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 23 September 2020 © Nexperia B.V. 2020. All rights reserved 14 / 16 74AHC273; 74AHCT273 Nexperia Octal D-type flip-flop with reset; positive-edge trigger 14. Legal information injury, death or severe property or environmental damage. Nexperia and its suppliers accept no liability for inclusion and/or use of Nexperia products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Data sheet status Quick reference data — The Quick reference data is an extract of the product data given in the Limiting values and Characteristics sections of this document, and as such is not complete, exhaustive or legally binding. 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Suitability for use — Nexperia products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an Nexperia product can reasonably be expected to result in personal 74AHC_AHCT273 Product data sheet Applications — Applications that are described herein for any of these products are for illustrative purposes only. Nexperia makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using Nexperia products, and Nexperia accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the Nexperia product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. Nexperia does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using Nexperia products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). Nexperia does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — Nexperia products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nexperia.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. Nexperia hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of Nexperia products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific Nexperia product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. Nexperia accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without Nexperia’s warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond Nexperia’s specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies Nexperia for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond Nexperia’s standard warranty and Nexperia’s product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. All information provided in this document is subject to legal disclaimers. Rev. 4 — 23 September 2020 © Nexperia B.V. 2020. All rights reserved 15 / 16 74AHC273; 74AHCT273 Nexperia Octal D-type flip-flop with reset; positive-edge trigger Contents 1. General description...................................................... 1 2. Features.........................................................................1 3. Ordering information....................................................1 4. Functional diagram.......................................................2 5. Pinning information......................................................3 5.1. Pinning.........................................................................3 5.2. Pin description............................................................. 3 6. Functional description................................................. 4 7. Limiting values............................................................. 4 8. Recommended operating conditions..........................4 9. Static characteristics....................................................5 10. Dynamic characteristics............................................ 6 10.1. Waveforms and test circuit........................................ 8 11. Package outline........................................................ 11 12. Abbreviations............................................................ 14 13. Revision history........................................................14 14. Legal information......................................................15 © Nexperia B.V. 2020. All rights reserved For more information, please visit: http://www.nexperia.com For sales office addresses, please send an email to: salesaddresses@nexperia.com Date of release: 23 September 2020 74AHC_AHCT273 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 4 — 23 September 2020 © Nexperia B.V. 2020. All rights reserved 16 / 16