74ALVCH16374
2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
Rev. 7 — 23 November 2021
Product data sheet
1. General description
The 74ALVCH16374 is a 16-bit edge-triggered D-type flip-flop with bus hold inputs and 3-state
outputs. The device can be used as two 8-bit flip-flops or one 16-bit flip-flop. The device features
two clocks (1CP and 2CP) and two output enables (1OE and 2OE), each controlling 8-bits.
The flip-flops will store the state of their individual D-inputs that meet the set-up and hold time
requirements on the LOW-to-HIGH clock (nCP) transition. A HIGH on nOE causes the outputs
to assume a high-impedance OFF-state. Operation of the nOE input does not affect the state of
the flip-flops. This device is fully specified for partial power down applications using IOFF. The IOFF
circuitry disables the output, preventing the potentially damaging backflow current through the
device when it is powered down..
2. Features and benefits
•
•
•
•
•
•
•
•
•
•
•
•
•
Wide supply voltage range from 1.2 V to 3.6 V
Complies with JEDEC standards:
• JESD8-7 (1.65 V to 1.95 V)
• JESD8-5 (2.3 V to 2.7 V)
• JESD8C (2.7 V to 3.6 V)
CMOS low power dissipation
MULTIBYTE flow-through standard pin-out architecture
Low inductance multiple VCC and GND pins for minimum noise and ground bounce
Direct interface with TTL levels
All data inputs have bus hold
Latch-up performance exceeds 100 mA per JESD 78 Class II Level B
Output drive capability 50 Ω transmission lines at 85 °C
IOFF circuitry provides partial Power-down mode operation
Current drive ±24 mA at VCC = 3.0 V
ESD protection:
• HBM JESD22-A114F exceeds 2000 V
• MM JESD22-A115-B exceeds 200 V
Specified from -40 °C to +85 °C
3. Ordering information
Table 1. Ordering information
Type number
Temperature range
74ALVCH16374DGG
-40 °C to +85 °C
Package
Name
Description
Version
TSSOP48
plastic thin shrink small outline package;
48 leads; body width 6.1 mm
SOT362-1
74ALVCH16374
Nexperia
2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
4. Functional diagram
1
24
1OE
Fig. 1.
2OE
1D0
1Q0
2
1D1
1Q1
3
44
1D2
1Q2
5
1D0
43
1D3
1Q3
6
1D1
41
1D4
1Q4
8
1D2
40
1D5
1Q5
9
1D3
38
1D6
1Q6
11
1D4
37
1D7
1Q7
12
1D5
36
2D0
2Q0
13
1D6
35
2D1
2Q1
14
1D7
33
2D2
2Q2
16
2D0
32
2D3
2Q3
17
2D1
30
2D4
2Q4
19
2D2
29
2D5
2Q5
20
2D3
27
2D6
2Q6
22
2D4
26
2D7
2Q7
23
2D5
25
2CP
47
46
C1
2EN
C2
1D
2
1
3
5
43
6
41
8
40
9
38
11
37
12
35
2D7
1EN
44
36
2D6
2CP
25
24
2OE
46
48
48
1CP
47
1CP
1
1OE
2D
13
2
14
33
16
32
17
30
19
29
20
27
22
26
23
001aal770
1Q0
1Q1
1Q2
1Q3
1Q4
1Q5
1Q6
1Q7
2Q0
2Q1
2Q2
2Q3
2Q4
2Q5
2Q6
2Q7
001aal772
Logic symbol
Fig. 2.
IEC logic symbol
VCC
data input
to internal circuit
mna705
Fig. 3.
Bus hold circuit
1D0
D
Q
1Q0
2D0
CP
Q
2Q0
CP
FF1
FF9
1CP
2CP
1OE
2OE
to 7 other channels
Fig. 4.
D
to 7 other channels
001aal771
Logic diagram
74ALVCH16374
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 23 November 2021
©
Nexperia B.V. 2021. All rights reserved
2 / 13
74ALVCH16374
Nexperia
2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
5. Pinning information
5.1. Pinning
74ALVCH16374
1OE
1
48 1CP
1Q0
2
47 1D0
1Q1
3
46 1D1
GND
4
45 GND
1Q2
5
44 1D2
1Q3
6
43 1D3
VCC
7
42 VCC
1Q4
8
41 1D4
1Q5
9
40 1D5
GND 10
39 GND
1Q6 11
38 1D6
1Q7 12
37 1D7
2Q0 13
36 2D0
2Q1 14
35 2D1
GND 15
34 GND
2Q2 16
33 2D2
2Q3 17
32 2D3
VCC 18
31 VCC
2Q4 19
30 2D4
2Q5 20
29 2D5
GND 21
28 GND
2Q6 22
27 2D6
2Q7 23
26 2D7
2OE 24
25 2CP
001aal769
Fig. 5.
Pin configuration for SOT362-1 (TSSOP48)
5.2. Pin description
Table 2. Pin description
Symbol
Pin
Description
1OE, 2OE
1, 24
output enable input (active LOW)
1Q0, 1Q1, 1Q2, 1Q3, 1Q4, 1Q5, 1Q6, 1Q7
2, 3, 5, 6, 8, 9, 11, 12
3-state flip-flop outputs
2Q0, 2Q1, 2Q2, 2Q3, 2Q4, 2Q5, 2Q6, 2Q7
13, 14, 16, 17, 19, 20, 22, 23
3-state flip-flop outputs
GND
4, 10, 15, 21, 28, 34, 39, 45
ground (0 V)
VCC
7, 18, 31, 42
positive supply voltage
1D0, 1D1, 1D2, 1D3, 1D4, 1D5, 1D6, 1D7
47, 46, 44, 43, 41, 40, 38, 37
data inputs
2D0, 2D1, 2D2, 2D3, 2D4, 2D5, 2D6, 2D7
36, 35, 33, 32, 30, 29, 27, 26
data inputs
1CP, 2CP
48, 25
clock input
74ALVCH16374
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 23 November 2021
©
Nexperia B.V. 2021. All rights reserved
3 / 13
74ALVCH16374
Nexperia
2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
6. Functional description
Table 3. Function table
H = HIGH voltage level; h = HIGH voltage level one set-up time prior to the LOW-to-HIGH clock transition;
L = LOW voltage level; I = LOW voltage level one set-up time prior to the LOW-to-HIGH clock transition;
↑ = LOW-to-HIGH clock transition; Z = high-impedance OFF-state.
Inputs
Operating mode
nCP
nDn
Internal
flip-flops
Outputs Q0 to Q7
nOE
L
↑
l
L
L
load and read register
L
↑
h
H
H
H
↑
l
L
Z
H
↑
h
H
Z
load register and disable
outputs
7. Limiting values
Table 4. Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Max
Unit
-0.5
+4.6
V
-50
-
VCC
supply voltage
IIK
input clamping current
VI < 0 V
VI
input voltage
control inputs
[1]
-0.5
+4.6
V
data inputs
[1]
-0.5
VCC + 0.5
V
-
±50
-0.5
VCC + 0.5
-
±50
mA
IOK
output clamping current
VO
output voltage
IO
output current
ICC
supply current
-
100
mA
IGND
ground current
-100
-
mA
Tstg
storage temperature
-65
+150
°C
Ptot
total power dissipation
-
500
mW
[1]
VO > VCC or VO < 0 V
mA
[1]
VO = 0 V to VCC
Tamb = -40 °C to +85 °C
mA
V
The input and output voltage ratings may be exceeded if the input and output current ratings are observed.
8. Recommended operating conditions
Table 5. Recommended operating conditions
Symbol Parameter
Conditions
VCC
maximum speed performance
supply voltage
Min
Typ
Max
Unit
CL = 30 pF
2.3
-
2.7
V
CL = 50 pF
3.0
-
3.6
V
1.2
-
3.6
V
data inputs
0
-
VCC
V
control inputs
0
-
5.5
V
0
-
VCC
V
-40
-
+85
°C
low voltage applications
VI
input voltage
VO
output voltage
Tamb
ambient temperature
in free air
Δt/ΔV
input transition rise and fall rate
VCC = 2.3 V to 3.0 V
0
-
20
ns/V
VCC = 3.0 V to 3.6 V
0
-
10
ns/V
74ALVCH16374
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 23 November 2021
©
Nexperia B.V. 2021. All rights reserved
4 / 13
74ALVCH16374
Nexperia
2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
9. Static characteristics
Table 6. Static characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V).
Symbol Parameter
Conditions
Min
Typ [1]
Max
Unit
VCC = 1.2 V
VCC
-
-
V
VCC = 1.8 V
Tamb = -40 °C to +85 °C
VIH
VIL
VOH
VOL
II
IOZ
ILIZ
ICC
ΔICC
HIGH-level input
voltage
LOW-level input
voltage
HIGH-level output
voltage
LOW-level output
voltage
0.7VCC
0.9
-
V
VCC = 2.3 V to 2.7 V
1.7
1.2
-
V
VCC = 2.7 V to 3.6 V
2.0
1.5
-
V
VCC = 1.2 V
-
-
0
V
VCC = 1.8 V
-
0.9
0.2VCC
V
VCC = 2.3 V to 2.7 V
-
1.2
0.7
V
VCC = 2.7 V to 3.6 V
-
1.5
0.8
V
IO = -100 μA; VCC = 1.8 V to 3.6 V
VCC - 0.2
VCC
-
V
IO = -6 mA; VCC = 1.8 V
VCC - 0.4
VCC - 0.1
-
V
IO = -6 mA; VCC = 2.3 V
VCC - 0.3 VCC - 0.08
-
V
IO = -12 mA; VCC = 2.3 V
VCC - 0.5 VCC - 0.17
-
V
IO = -12 mA; VCC = 2.7 V
VCC - 0.5 VCC - 0.14
-
V
IO = -18 mA; VCC = 2.3 V
VCC - 0.6 VCC - 0.26
-
V
IO = -24 mA; VCC = 3.0 V
VCC - 1.0 VCC - 0.28
-
V
VI = VIH or VIL
VI = VIH or VIL
IO = 100 μA; VCC = 1.8 V to 3.6 V
-
0
0.20
V
IO = 6 mA; VCC = 1.8 V
-
0.09
0.30
V
IO = 6 mA; VCC = 2.3 V
-
0.07
0.20
V
IO = 12 mA; VCC = 2.3 V
-
0.15
0.40
V
IO = 12 mA; VCC = 2.7 V
-
0.14
0.40
V
IO = 18 mA; VCC = 2.3 V
-
0.23
0.60
V
IO = 24 mA; VCC = 3.0 V
-
0.27
0.55
V
control input; VI = 5.5 V or GND
-
0.1
5
μA
data input; VI = VCC or GND
-
0.1
5
μA
VCC = 1.8 V to 2.7 V
-
0.1
5
μA
VCC = 2.7 V to 3.6 V
-
0.1
10
μA
VCC = 1.8 V to 2.7 V
-
0.1
10
μA
VCC = 3.6 V
-
0.1
15
μA
VCC = 1.8 V to 2.7 V
-
0.1
20
μA
VCC = 2.7 V to 3.6 V
-
0.2
40
μA
per control input
-
5
500
μA
per data I/O input
-
150
750
μA
input leakage
current
VCC = 1.8 V to 3.6 V
OFF-state output
current
VI = VIH or VIL; VO = VCC or GND
OFF-state input
leakage current
supply current
additional supply
current
74ALVCH16374
Product data sheet
VI = VCC or GND
VI = VCC or GND; IO = 0 A;
VI = VCC - 0.6 V; IO = 0 A; VCC = 2.7 V to 3.6 V
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 23 November 2021
©
Nexperia B.V. 2021. All rights reserved
5 / 13
74ALVCH16374
Nexperia
2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
Symbol Parameter
Conditions
Min
Typ [1]
Max
IBHL
bus hold LOW
current
VCC = 2.3 V; VI = 0.7 V
[2]
45
-
-
μA
VCC = 3.0 V; VI = 0.8 V
[2]
75
150
-
μA
bus hold HIGH
current
VCC = 2.3 V; VI = 1.7 V
[2]
-45
-
-
μA
VCC = 3.0 V; VI = 2.0 V
[2]
-75
-175
-
μA
bus hold LOW
overdrive current
VCC = 2.7 V
[2]
300
-
-
μA
VCC = 3.6 V
[2]
450
-
-
μA
IBHHO
bus hold HIGH
overdrive current
VCC = 2.7 V
[2]
-300
-
-
μA
VCC = 3.6 V
[2]
-450
-
-
μA
CI
input capacitance
-
5.0
-
pF
IBHH
IBHLO
[1]
[2]
Unit
All typical values are measured at Tamb = 25 °C.
Valid for data inputs of bus hold parts only.
10. Dynamic characteristics
Table 7. Dynamic characteristics
At recommended operating conditions. Voltages are referenced to GND (ground = 0 V); test circuit Fig. 9.
Symbol Parameter
Conditions
Min
Typ [1]
Max
Unit
VCC = 1.8 V
125
250
-
MHz
VCC = 2.3 V to 2.7 V
150
300
-
MHz
VCC = 2.7 V
150
300
-
MHz
200
350
-
MHz
VCC = 1.2 V
-
7.7
-
ns
VCC = 1.8 V
1.5
3.6
6.5
ns
VCC = 2.3 V to 2.7 V
1.0
2.3
4.3
ns
VCC = 2.7 V
1.0
2.3
3.8
ns
VCC = 3.0 V to 3.6 V
1.0
2.4
3.4
ns
VCC = 1.2 V
-
8.7
-
ns
VCC = 1.8 V
1.5
4.0
7.2
ns
VCC = 2.3 V to 2.7 V
1.0
2.6
4.8
ns
VCC = 2.7 V
1.0
2.9
4.8
ns
VCC = 3.0 V to 3.6 V
1.0
2.3
4.0
ns
VCC = 1.2 V
-
6.2
-
ns
VCC = 1.8 V
1.5
3.1
5.4
ns
VCC = 2.3 V to 2.7 V
1.0
2.1
4.0
ns
VCC = 2.7 V
1.0
2.9
4.5
ns
VCC = 3.0 V to 3.6 V
1.0
2.6
4.1
ns
Tamb = -40 °C to +85 °C
fmax
maximum frequency
see Fig. 6
VCC = 3.0 V to 3.6 V
tpd
ten
tdis
propagation delay
enable time
disable time
74ALVCH16374
Product data sheet
nCP to nQn; see Fig. 6
nOE to nQn; see Fig. 7
nOE to nQn; see Fig. 7
[2]
[2]
[2]
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 23 November 2021
©
Nexperia B.V. 2021. All rights reserved
6 / 13
74ALVCH16374
Nexperia
2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
Symbol Parameter
Conditions
tW
nCP HIGH or LOW; see Fig. 6
pulse width
tsu
[1]
[2]
[3]
Max
Unit
VCC = 1.8 V
4.0
2.0
-
ns
VCC = 2.3 V to 2.7 V
3.0
1.6
-
ns
VCC = 2.7 V
3.0
1.6
-
ns
VCC = 3.0 V to 3.6 V
2.5
1.4
-
ns
VCC = 1.8 V
1.5
0.2
-
ns
VCC = 2.3 V to 2.7 V
1.2
0.2
-
ns
VCC = 2.7 V
1.5
0.4
-
ns
VCC = 3.0 V to 3.6 V
1.2
0.2
-
ns
VCC = 1.8 V
0.6
-0.2
-
ns
VCC = 2.3 V to 2.7 V
0.8
-0.1
-
ns
VCC = 2.7 V
0.6
-0.2
-
ns
VCC = 3.0 V to 3.6 V
0.8
0.0
-
ns
outputs enabled
-
16
-
pF
outputs disabled
-
10
-
pF
nDn to nCP; see Fig. 8
hold time
CPD
Typ [1]
nDn to nCP; see Fig. 8
set-up time
th
Min
power dissipation
capacitance
per flip-flop; VI = GND to VCC
[3]
All typical values are measured at Tamb = 25 °C.
Typical values for VCC = 2.3 V to 2.7 V are measured at VCC = 2.5 V
Typical values for VCC = 3.0 V to 3.6 V are measured at VCC = 3.3 V
tpd is the same as tPLH and tPHL.
ten is the same as tPZL and tPZH.
tdis is the same as tPLZ and tPHZ.
CPD is used to determine the dynamic power dissipation (PD in μW).
2
2
PD = CPD × VCC × fi × N + Σ(CL × VCC × fo) where:
fi = input frequency in MHz;
fo = output frequency in MHz;
CL = output load capacitance in pF;
VCC = supply voltage in Volts;
N = number of inputs switching;
2
Σ(CL × VCC × fo) = sum of the outputs.
10.1. Waveforms and test circuit
1 / fmax
VI
nCP
input
GND
VOH
nQn
output
VOL
VM
VM
tW
tPHL
VM
tPLH
VM
VM
001aal773
Measurement points are given in Table 8.
VOL and VOH are typical output levels that occur with the output load.
Fig. 6.
Propagation delay, clock input (nCP) to data output (nQn), and pulse width
74ALVCH16374
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 23 November 2021
©
Nexperia B.V. 2021. All rights reserved
7 / 13
74ALVCH16374
Nexperia
2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
VI
nOE input
VM
VM
GND
tPLZ
nQn output
LOW-to-OFF
OFF-to-LOW
tPZL
VCC
VM
VX
VOL
tPZH
tPHZ
nQn output
HIGH-to-OFF
OFF-to-HIGH
VOH
VY
VM
GND
outputs
enabled
outputs
disabled
outputs
enabled
001aal795
Measurement points are given in Table 8.
VOL and VOH are typical output levels that occur with the output load.
Fig. 7.
3-state enable and disable times
VI
nCP
input
GND
VM
VM
tsu
VI
nDn
input
GND
VM
VM
tsu
th
VM
VM
th
VM
001aal774
Measurement points are given in Table 8.
The shaded areas indicate when the input is permitted to change for predictable output performance.
Fig. 8.
Data setup and hold times for input (nDn) to input (nCP)
Table 8. Measurement points
Supply voltage
Input
Output
VCC
VI
VM
VM
VX
VY
1.2 V
VCC
0.5 × VCC
0.5 × VCC
VOL + 0.15 V
VOH - 0.15 V
1.8 V
VCC
0.5 × VCC
0.5 × VCC
VOL + 0.15 V
VOH - 0.15 V
2.3 V to 2.7 V
VCC
0.5 × VCC
0.5 × VCC
VOL + 0.15 V
VOH - 0.15 V
2.7 V
2.7 V
1.5 V
1.5 V
VOL + 0.3 V
VOH - 0.3 V
3.0 V to 3.6 V
2.7 V
1.5 V
1.5 V
VOL + 0.3 V
VOH - 0.3 V
74ALVCH16374
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 23 November 2021
©
Nexperia B.V. 2021. All rights reserved
8 / 13
74ALVCH16374
Nexperia
2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
VEXT
VCC
VI
G
RL
VO
DUT
RT
CL
RL
mna616
Test data is given in Table 9.
Definitions for test circuit:
RL = Load resistance.
CL = Load capacitance including jig and probe capacitance.
RT = Termination resistance should be equal to output impedance Zo of the pulse generator.
VEXT = External voltage for measuring switching times
Fig. 9.
Test circuit for measuring switching times
Table 9. Test data
Supply voltage
Input
VCC
VI
tr, tf
CL
RL
tPLH, tPHL
tPLZ, tPZL
tPHZ, tPZH
1.2 V
VCC
≤ 2.0 ns
30 pF
500 Ω
open
2 × VCC
GND
1.8 V
VCC
≤ 2.0 ns
30 pF
500 Ω
open
2 × VCC
GND
2.3 V to 2.7 V
VCC
≤ 2.0 ns
30 pF
500 Ω
open
2 × VCC
GND
2.7 V
2.7 V
2.5 ns
50 pF
500 Ω
open
2 × VCC
GND
3.0 V to 3.6 V
2.7 V
2.5 ns
50 pF
500 Ω
open
2 × VCC
GND
74ALVCH16374
Product data sheet
Load
VEXT
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 23 November 2021
©
Nexperia B.V. 2021. All rights reserved
9 / 13
74ALVCH16374
Nexperia
2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
11. Package outline
TSSOP48: plastic thin shrink small outline package; 48 leads; body width 6.1 mm
SOT362-1
D
E
A
X
c
v
HE
y
A
Z
48
25
Q
A2
A1
(A3)
pin 1 index
A
θ
Lp
1
L
24
bp
e
detail X
w
0
5 mm
2.5
scale
Dimensions (mm are the original dimensions)
Unit
max
nom
min
mm
A
1.2
A1
A2
0.15 1.05
0.05 0.85
A3
0.25
bp
c
D(1)
E(2)
0.28
0.2
12.6
6.2
0.17
0.1
12.4
6.0
e
HE
0.5
8.3
7.9
L
1
Lp
Q
0.8
0.50
0.4
0.35
v
w
0.25 0.08
y
0.1
Z
θ
0.8
8°
0.4
0°
Note
1. Plastic or metal protrusions of 0.15 mm maximum per side are not included.
2. Plastic interlead protrusions of 0.25 mm maximum per side are not included.
Outline
version
SOT362-1
References
IEC
JEDEC
JEITA
sot362-1_po
European
projection
Issue date
03-02-19
13-08-05
MO-153
Fig. 10. Package outline SOT362-1 (TSSOP48)
74ALVCH16374
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 23 November 2021
©
Nexperia B.V. 2021. All rights reserved
10 / 13
74ALVCH16374
Nexperia
2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
12. Abbreviations
Table 10. Abbreviations
Acronym
Description
CMOS
Complementary Metal-Oxide Semiconductor
DUT
Device Under Test
ESD
ElectroStatic Discharge
HBM
Human Body Model
MM
Machine Model
TTL
Transistor-Transistor Logic
13. Revision history
Table 11. Revision history
Document ID
Release date
Data sheet status
Change notice Supersedes
74ALVCH16374 v.7
20211123
Product data sheet
-
74ALVCH16374 v.6.1
Modifications:
•
•
74ALVCH16374 v.6.1
20190307
-
74ALVCH16374 v.5
Modifications:
•
•
•
•
Section 1 and Section 2 updated.
Errata corrected in Table 4.
The format of this data sheet has been redesigned to comply with the identity guidelines
of Nexperia.
Legal texts have been adapted to the new company name where appropriate.
Type number 74ALVCH16374DL (SOT370-1) removed.
Removed typo in Table 1.
74ALVCH16374 v.5
20120709
Modifications:
•
74ALVCH16374 v.4
20111117
Modifications:
•
74ALVCH16374 v.3
20100427
74ALVCH16374 v.2
19980618
74ALVCH16374
Product data sheet
Product data sheet
Product data sheet
-
74ALVCH16374 v.4
-
74ALVCH16374 v.3
Product data sheet
-
74ALVCH16374 v.2
Product specification
-
74ALVCH16374 v.1
Table 8 corrected (errata).
Product data sheet
Legal pages updated.
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 23 November 2021
©
Nexperia B.V. 2021. All rights reserved
11 / 13
74ALVCH16374
Nexperia
2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
14. Legal information
injury, death or severe property or environmental damage. Nexperia and its
suppliers accept no liability for inclusion and/or use of Nexperia products in
such equipment or applications and therefore such inclusion and/or use is at
the customer’s own risk.
Data sheet status
Quick reference data — The Quick reference data is an extract of the
product data given in the Limiting values and Characteristics sections of this
document, and as such is not complete, exhaustive or legally binding.
Document status
[1][2]
Product
status [3]
Definition
Objective [short]
data sheet
Development
This document contains data from
the objective specification for
product development.
Preliminary [short]
data sheet
Qualification
This document contains data from
the preliminary specification.
Product [short]
data sheet
Production
This document contains the product
specification.
[1]
[2]
[3]
Please consult the most recently issued document before initiating or
completing a design.
The term 'short data sheet' is explained in section "Definitions".
The product status of device(s) described in this document may have
changed since this document was published and may differ in case of
multiple devices. The latest product status information is available on
the internet at https://www.nexperia.com.
Definitions
Draft — The document is a draft version only. The content is still under
internal review and subject to formal approval, which may result in
modifications or additions. Nexperia does not give any representations or
warranties as to the accuracy or completeness of information included herein
and shall have no liability for the consequences of use of such information.
Short data sheet — A short data sheet is an extract from a full data sheet
with the same product type number(s) and title. A short data sheet is
intended for quick reference only and should not be relied upon to contain
detailed and full information. For detailed and full information see the relevant
full data sheet, which is available on request via the local Nexperia sales
office. In case of any inconsistency or conflict with the short data sheet, the
full data sheet shall prevail.
Product specification — The information and data provided in a Product
data sheet shall define the specification of the product as agreed between
Nexperia and its customer, unless Nexperia and customer have explicitly
agreed otherwise in writing. In no event however, shall an agreement be
valid in which the Nexperia product is deemed to offer functions and qualities
beyond those described in the Product data sheet.
Disclaimers
Limited warranty and liability — Information in this document is believed
to be accurate and reliable. However, Nexperia does not give any
representations or warranties, expressed or implied, as to the accuracy
or completeness of such information and shall have no liability for the
consequences of use of such information. Nexperia takes no responsibility
for the content in this document if provided by an information source outside
of Nexperia.
In no event shall Nexperia be liable for any indirect, incidental, punitive,
special or consequential damages (including - without limitation - lost
profits, lost savings, business interruption, costs related to the removal
or replacement of any products or rework charges) whether or not such
damages are based on tort (including negligence), warranty, breach of
contract or any other legal theory.
Notwithstanding any damages that customer might incur for any reason
whatsoever, Nexperia’s aggregate and cumulative liability towards customer
for the products described herein shall be limited in accordance with the
Terms and conditions of commercial sale of Nexperia.
Right to make changes — Nexperia reserves the right to make changes
to information published in this document, including without limitation
specifications and product descriptions, at any time and without notice. This
document supersedes and replaces all information supplied prior to the
publication hereof.
Suitability for use — Nexperia products are not designed, authorized or
warranted to be suitable for use in life support, life-critical or safety-critical
systems or equipment, nor in applications where failure or malfunction
of an Nexperia product can reasonably be expected to result in personal
74ALVCH16374
Product data sheet
Applications — Applications that are described herein for any of these
products are for illustrative purposes only. Nexperia makes no representation
or warranty that such applications will be suitable for the specified use
without further testing or modification.
Customers are responsible for the design and operation of their applications
and products using Nexperia products, and Nexperia accepts no liability for
any assistance with applications or customer product design. It is customer’s
sole responsibility to determine whether the Nexperia product is suitable
and fit for the customer’s applications and products planned, as well as
for the planned application and use of customer’s third party customer(s).
Customers should provide appropriate design and operating safeguards to
minimize the risks associated with their applications and products.
Nexperia does not accept any liability related to any default, damage, costs
or problem which is based on any weakness or default in the customer’s
applications or products, or the application or use by customer’s third party
customer(s). Customer is responsible for doing all necessary testing for the
customer’s applications and products using Nexperia products in order to
avoid a default of the applications and the products or of the application or
use by customer’s third party customer(s). Nexperia does not accept any
liability in this respect.
Limiting values — Stress above one or more limiting values (as defined in
the Absolute Maximum Ratings System of IEC 60134) will cause permanent
damage to the device. Limiting values are stress ratings only and (proper)
operation of the device at these or any other conditions above those
given in the Recommended operating conditions section (if present) or the
Characteristics sections of this document is not warranted. Constant or
repeated exposure to limiting values will permanently and irreversibly affect
the quality and reliability of the device.
Terms and conditions of commercial sale — Nexperia products are
sold subject to the general terms and conditions of commercial sale, as
published at http://www.nexperia.com/profile/terms, unless otherwise agreed
in a valid written individual agreement. In case an individual agreement is
concluded only the terms and conditions of the respective agreement shall
apply. Nexperia hereby expressly objects to applying the customer’s general
terms and conditions with regard to the purchase of Nexperia products by
customer.
No offer to sell or license — Nothing in this document may be interpreted
or construed as an offer to sell products that is open for acceptance or the
grant, conveyance or implication of any license under any copyrights, patents
or other industrial or intellectual property rights.
Export control — This document as well as the item(s) described herein
may be subject to export control regulations. Export might require a prior
authorization from competent authorities.
Non-automotive qualified products — Unless this data sheet expressly
states that this specific Nexperia product is automotive qualified, the
product is not suitable for automotive use. It is neither qualified nor tested in
accordance with automotive testing or application requirements. Nexperia
accepts no liability for inclusion and/or use of non-automotive qualified
products in automotive equipment or applications.
In the event that customer uses the product for design-in and use in
automotive applications to automotive specifications and standards,
customer (a) shall use the product without Nexperia’s warranty of the
product for such automotive applications, use and specifications, and (b)
whenever customer uses the product for automotive applications beyond
Nexperia’s specifications such use shall be solely at customer’s own risk,
and (c) customer fully indemnifies Nexperia for any liability, damages or failed
product claims resulting from customer design and use of the product for
automotive applications beyond Nexperia’s standard warranty and Nexperia’s
product specifications.
Translations — A non-English (translated) version of a document is for
reference only. The English version shall prevail in case of any discrepancy
between the translated and English versions.
Trademarks
Notice: All referenced brands, product names, service names and
trademarks are the property of their respective owners.
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 23 November 2021
©
Nexperia B.V. 2021. All rights reserved
12 / 13
74ALVCH16374
Nexperia
2.5 V/3.3 V 16-bit edge-triggered D-type flip-flop; 3-state
Contents
1. General description...................................................... 1
2. Features and benefits.................................................. 1
3. Ordering information....................................................1
4. Functional diagram.......................................................2
5. Pinning information......................................................3
5.1. Pinning.........................................................................3
5.2. Pin description............................................................. 3
6. Functional description................................................. 4
7. Limiting values............................................................. 4
8. Recommended operating conditions..........................4
9. Static characteristics....................................................5
10. Dynamic characteristics............................................ 6
10.1. Waveforms and test circuit........................................ 7
11. Package outline........................................................ 10
12. Abbreviations............................................................ 11
13. Revision history........................................................11
14. Legal information......................................................12
©
Nexperia B.V. 2021. All rights reserved
For more information, please visit: http://www.nexperia.com
For sales office addresses, please send an email to: salesaddresses@nexperia.com
Date of release: 23 November 2021
74ALVCH16374
Product data sheet
All information provided in this document is subject to legal disclaimers.
Rev. 7 — 23 November 2021
©
Nexperia B.V. 2021. All rights reserved
13 / 13