74AHC1G125GW,165

Important notice Dear Customer, On 7 February 2017 the former NXP Standard Product business became a new company with the tradename Nexperia. Nexperia is an industry leading supplier of Discrete, Logic and PowerMOS semiconductors with its focus on the automotive, industrial, computing, consumer and wearable application markets In data sheets and application notes which still contain NXP or Philips Semiconductors references, use the references to Nexperia, as shown below. Instead of http://www.nxp.com, http://www.philips.com/ or http://www.semiconductors.philips.com/, use http://www.nexperia.com Instead of sales.addresses@www.nxp.com or sales.addresses@www.semiconductors.philips.com, use salesaddresses@nexperia.com (email) Replace the copyright notice at the bottom of each page or elsewhere in the document, depending on the version, as shown below: - © NXP N.V. (year). All rights reserved or © Koninklijke Philips Electronics N.V. (year). All rights reserved Should be replaced with: - © Nexperia B.V. (year). All rights reserved. If you have any questions related to the data sheet, please contact our nearest sales office via e-mail or telephone (details via salesaddresses@nexperia.com). Thank you for your cooperation and understanding, Kind regards, Team Nexperia 74AHC1G125; 74AHCT1G125 Bus buffer/line driver; 3-state Rev. 10 — 23 August 2012 Product data sheet 1. General description 74AHC1G125 and 74AHCT1G125 are high-speed Si-gate CMOS devices. They provide one non-inverting buffer/line driver with 3-state output. The 3-state output is controlled by the output enable input (OE). A HIGH at OE causes the output to assume a high-impedance OFF-state. The AHC device has CMOS input switching levels and supply voltage range 2 V to 5.5 V. The AHCT device has TTL input switching levels and supply voltage range 4.5 V to 5.5 V. 2. Features and benefits       Symmetrical output impedance High noise immunity Low power dissipation Balanced propagation delays Multiple package options ESD protection:  HBM JESD22-A114F: exceeds 2000 V  MM JESD22-A115-A: exceeds 200 V  CDM JESD22-C101E: exceeds 1000 V  Specified from 40 C to +125 C 3. Ordering information Table 1. Ordering information Type number Package Temperature range Name Description Version 74AHC1G125GW 40 C to +125 C TSSOP5 plastic thin shrink small outline package; 5 leads; body width 1.25 mm SOT353-1 40 C to +125 C SC-74A plastic surface-mounted package; 5 leads SOT753 40 C to +125 C XSON6 plastic extremely thin small outline package; no SOT886 leads; 6 terminals; body 1  1.45  0.5 mm 40 C to +125 C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1  1  0.5 mm 74AHCT1G125GW 74AHC1G125GV 74AHCT1G125GV 74AHC1G125GM 74AHCT1G125GM 74AHC1G125GF 74AHCT1G125GF SOT891 74AHC1G125; 74AHCT1G125 NXP Semiconductors Bus buffer/line driver; 3-state 4. Marking Table 2. Marking codes Type number Marking[1] 74AHC1G125GW AM 74AHCT1G125GW CM 74AHC1G125GV A25 74AHCT1G125GV C25 74AHC1G125GM AM 74AHCT1G125GM CM 74AHC1G125GF AM 74AHCT1G125GF CM [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram A 2 Y 4 Y A 2 4 1 OE 1 EN mna118 Fig 1. OE mna120 mna119 Logic symbol Fig 2. IEC logic symbol Fig 3. Logic diagram 6. Pinning information 6.1 Pinning 74AHC1G125 74AHCT1G125 74AHC1G125 74AHCT1G125 OE A GND 1 5 VCC 1 6 VCC A 2 5 n.c. GND 3 4 Y 74AHC1G125 74AHCT1G125 2 3 4 Y 001aaj971 Pin configuration SOT353-1 and SOT753 74AHC_AHCT1G125 Product data sheet Fig 5. Pin configuration SOT886 All information provided in this document is subject to legal disclaimers. Rev. 10 — 23 August 2012 OE 1 6 VCC A 2 5 n.c. GND 3 4 Y 001aaj972 Transparent top view 001aaf101 Fig 4. OE Transparent top view Fig 6. Pin configuration SOT891 © NXP B.V. 2012. All rights reserved. 2 of 17 74AHC1G125; 74AHCT1G125 NXP Semiconductors Bus buffer/line driver; 3-state 6.2 Pin description Table 3. Pin description Symbol Pin OE Description SOT353-1/SOT753 SOT886/SOT891 1 1 output enable input A 2 2 data input GND 3 3 ground (0 V) Y 4 4 data output n.c. - 5 not connected VCC 5 6 supply voltage 7. Functional description Table 4. Function table H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state Inputs Output OE A Y L L L L H H H X Z 8. Limiting values Table 5. Limiting values In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V). Symbol Parameter VCC supply voltage VI input voltage 0.5 +7.0 V IIK input clamping current VI < 0.5 V [1] 20 - mA IOK output clamping current VO < 0.5 V or VO > VCC + 0.5 V [1] - 20 mA IO output current 0.5 V < VO < VCC + 0.5 V - 25 mA ICC supply current - 75 mA IGND ground current 75 - mA Tstg storage temperature 65 +150 C - 250 mW total power dissipation Ptot [1] [2] Conditions Tamb = 40 C to +125 C [2] Min Max Unit 0.5 +7.0 V The input and output voltage ratings may be exceeded if the input and output current ratings are observed. For TSSOP5 and SC-74A packages: above 87.5 C the value of Ptot derates linearly with 4.0 mW/K. For XSON6 packages: above 118 C the value of Ptot derates linearly with 7.8 mW/K. 74AHC_AHCT1G125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 23 August 2012 © NXP B.V. 2012. All rights reserved. 3 of 17 74AHC1G125; 74AHCT1G125 NXP Semiconductors Bus buffer/line driver; 3-state 9. Recommended operating conditions Table 6. Recommended operating conditions Voltages are referenced to GND (ground = 0 V). Symbol Parameter Conditions 74AHC1G125 Min Typ 74AHCT1G125 Max Min Typ Unit Max VCC supply voltage 2.0 5.0 5.5 4.5 5.0 5.5 V VI input voltage 0 - 5.5 0 - 5.5 V VO output voltage 0 - VCC 0 - VCC V Tamb ambient temperature 40 +25 +125 40 +25 +125 C t/V input transition rise and fall rate VCC = 3.3 V  0.3 V - - 100 - - - ns/V VCC = 5.0 V  0.5 V - - 20 - - 20 ns/V 10. Static characteristics Table 7. Static characteristics Voltages are referenced to GND (ground = 0 V). Symbol Parameter 25 C Conditions 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max VCC = 2.0 V 1.5 - - 1.5 - 1.5 - V VCC = 3.0 V 2.1 - - 2.1 - 2.1 - V VCC = 5.5 V 3.85 - - 3.85 - 3.85 - V VCC = 2.0 V - - 0.5 - 0.5 - 0.5 V VCC = 3.0 V - - 0.9 - 0.9 - 0.9 V VCC = 5.5 V - - 1.65 - 1.65 - 1.65 V HIGH-level VI = VIH or VIL output voltage IO = 50 A; VCC = 2.0 V 1.9 2.0 - 1.9 - 1.9 - V IO = 50 A; VCC = 3.0 V 2.9 3.0 - 2.9 - 2.9 - V IO = 50 A; VCC = 4.5 V 4.4 4.5 - 4.4 - 4.4 - V IO = 4.0 mA; VCC = 3.0 V 2.58 - - 2.48 - 2.40 - V IO = 8.0 mA; VCC = 4.5 V 74AHC1G125 VIH VIL VOH VOL HIGH-level input voltage LOW-level input voltage 3.94 - - 3.8 - 3.70 - V LOW-level VI = VIH or VIL output voltage IO = 50 A; VCC = 2.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 A; VCC = 3.0 V - 0 0.1 - 0.1 - 0.1 V IO = 50 A; VCC = 4.5 V - 0 0.1 - 0.1 - 0.1 V IO = 4.0 mA; VCC = 3.0 V - - 0.36 - 0.44 - 0.55 V IO = 8.0 mA; VCC = 4.5 V - - 0.36 - 0.44 - 0.55 V IOZ OFF-state VI = VCC or GND; output current VCC = 5.5 V - - 0.25 - 2.5 - 10 A II input leakage current - - 0.1 - 1.0 - 2.0 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.0 - 10 - 40 A 74AHC_AHCT1G125 Product data sheet VI = 5.5 V or GND; VCC = 0 V to 5.5 V All information provided in this document is subject to legal disclaimers. Rev. 10 — 23 August 2012 © NXP B.V. 2012. All rights reserved. 4 of 17 74AHC1G125; 74AHCT1G125 NXP Semiconductors Bus buffer/line driver; 3-state Table 7. Static characteristics …continued Voltages are referenced to GND (ground = 0 V). Symbol Parameter CI 25 C Conditions input capacitance 40 C to +85 C 40 C to +125 C Unit Min Typ Max Min Max Min Max - 1.5 10 - 10 - 10 pF 74AHCT1G125 VIH HIGH-level input voltage VCC = 4.5 V to 5.5 V 2.0 - - 2.0 - 2.0 - V VIL LOW-level input voltage VCC = 4.5 V to 5.5 V - - 0.8 - 0.8 - 0.8 V VOH HIGH-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = 50 A 4.4 4.5 - 4.4 - 4.4 - V 3.94 - - 3.8 - 3.70 - V - 0 0.1 - 0.1 - 0.1 V - - 0.36 - 0.44 - 0.55 V IO = 8.0 mA VOL LOW-level VI = VIH or VIL; VCC = 4.5 V output voltage IO = 50 A IO = 8.0 mA IOZ OFF-state VI = VCC or GND; output current VCC = 5.5 V - - 0.25 - 2.5 - 10 A II input leakage current - - 0.1 - 1.0 - 2.0 A ICC supply current VI = VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.0 - 10 - 40 A ICC additional per input pin; VI = 3.4 V; supply current other inputs at VCC or GND; IO = 0 A; VCC = 5.5 V - - 1.35 - 1.5 - 1.5 mA CI input capacitance - 1.5 10 - 10 - 10 pF VI = 5.5 V or GND; VCC = 0 V to 5.5 V 11. Dynamic characteristics Table 8. Dynamic characteristics GND = 0 V; For test circuit see Figure 9. Symbol Parameter 25 C Conditions Min Typ 40 C to +85 C 40 C to +125 C Unit Max Min Max Min Max 74AHC1G125 tpd propagation delay A to Y; see Figure 7 VCC = 3.0 V to 3.6 V Product data sheet [2] CL = 15 pF - 4.7 8.0 1.0 9.5 1.0 11.5 ns CL = 50 pF - 6.6 11.5 1.0 13.0 1.0 14.5 ns CL = 15 pF - 3.4 5.5 1.0 6.5 1.0 7.0 ns CL = 50 pF - 4.8 7.5 1.0 8.5 1.0 9.5 ns VCC = 4.5 V to 5.5 V 74AHC_AHCT1G125 [1] [3] All information provided in this document is subject to legal disclaimers. Rev. 10 — 23 August 2012 © NXP B.V. 2012. All rights reserved. 5 of 17 74AHC1G125; 74AHCT1G125 NXP Semiconductors Bus buffer/line driver; 3-state Table 8. Dynamic characteristics …continued GND = 0 V; For test circuit see Figure 9. Symbol Parameter ten enable time 25 C Conditions Min Typ Max Min Max Min Max - 5.0 8.0 1.0 9.5 1.0 11.5 ns - 6.9 11.5 1.0 13.0 1.0 14.5 ns CL = 15 pF - 3.6 5.1 1.0 6.0 1.0 6.5 ns CL = 50 pF - 4.9 7.5 1.0 8.5 1.0 9.5 ns CL = 15 pF - 6.0 9.7 1.0 11.5 1.0 12.5 ns CL = 50 pF - 8.3 13.2 1.0 15.0 1.0 16.5 ns - 4.1 6.8 1.0 8.0 1.0 8.5 ns - 5.7 8.8 1.0 10.0 1.0 11.0 ns - 9 - - - - - pF - 3.4 5.5 1.0 6.5 1.0 7.0 ns - 4.8 7.5 1.0 8.5 1.0 9.5 ns - 3.9 5.1 1.0 6.0 1.0 6.5 ns - 5.1 7.5 1.0 8.5 1.0 9.5 ns CL = 15 pF - 4.5 6.8 1.0 8.0 1.0 8.5 ns CL = 50 pF - 6.1 8.8 1.0 10.0 1.0 11.0 ns OE to Y; see Figure 8 VCC = 3.0 V to 3.6 V [1] [2] CL = 15 pF CL = 50 pF VCC = 4.5 V to 5.5 V tdis disable time OE to Y; see Figure 8 VCC = 3.0 V to 3.6 V VCC = 4.5 V to 5.5 V [3] [1] [2] [3] CL = 15 pF CL = 50 pF CPD power dissipation capacitance 40 C to +85 C 40 C to +125 C Unit per buffer; CL = 50 pF; f = 1 MHz; VI = GND to VCC [4] A to Y; see Figure 7 [1] 74AHCT1G125 tpd propagation delay VCC = 4.5 V to 5.5 V [3] CL = 15 pF CL = 50 pF ten enable time OE to Y; see Figure 8 VCC = 4.5 V to 5.5 V [1] [3] CL = 15 pF CL = 50 pF tdis disable time OE to Y; see Figure 8 VCC = 4.5 V to 5.5 V 74AHC_AHCT1G125 Product data sheet [1] [3] All information provided in this document is subject to legal disclaimers. Rev. 10 — 23 August 2012 © NXP B.V. 2012. All rights reserved. 6 of 17 74AHC1G125; 74AHCT1G125 NXP Semiconductors Bus buffer/line driver; 3-state Table 8. Dynamic characteristics …continued GND = 0 V; For test circuit see Figure 9. Symbol Parameter CPD [1] power dissipation capacitance 25 C Conditions Min Typ Max Min Max Min Max - 11 - - - - - [4] per buffer; CL = 50 pF; f = 1 MHz; VI = GND to VCC 40 C to +85 C 40 C to +125 C Unit pF tpd is the same as tPLH and tPHL. ten is the same as tPZL and tPZH. tdis is the same as tPLZ and tPHZ. [2] Typical values are measured at VCC = 3.3 V. [3] Typical values are measured at VCC = 5.0 V. [4] CPD is used to determine the dynamic power dissipation PD (W). PD = CPD  VCC2  fi + (CL  VCC2  fo) where: fi = input frequency in MHz; fo = output frequency in MHz; CL = output load capacitance in pF; VCC = supply voltage in Volts. 12. Waveforms VI VM A input GND t PHL t PLH VOH VM Y output VOL mnb153 Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load. Fig 7. Input (A) to output (Y) propagation delays 74AHC_AHCT1G125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 23 August 2012 © NXP B.V. 2012. All rights reserved. 7 of 17 74AHC1G125; 74AHCT1G125 NXP Semiconductors Bus buffer/line driver; 3-state VI OE input VM GND tPLZ tPZL VCC output LOW-to-OFF OFF-to-LOW VM VX VOL tPHZ VOH tPZH VY output HIGH-to-OFF OFF-to-HIGH VM GND outputs enabled outputs enabled outputs disabled mna644 Measurement points are given in Table 9. VOL and VOH are typical output voltage levels that occur with the output load. Fig 8. Enable and disable times Table 9. Measurement point Type Inputs VI Output VM VM VX VY 74AHC1G125 GND to VCC 0.5VCC 0.5VCC VOL + 0.3 V VOH  0.3 V 74AHCT1G125 GND to 3.0 V 1.5 V 0.5VCC VOL + 0.3 V VOH  0.3 V 74AHC_AHCT1G125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 23 August 2012 © NXP B.V. 2012. All rights reserved. 8 of 17 74AHC1G125; 74AHCT1G125 NXP Semiconductors Bus buffer/line driver; 3-state VI tW 90 % negative pulse VM 0V tf tr tr tf VI 90 % positive pulse 0V VM 10 % VM VM 10 % tW VCC VCC G VI VO RL S1 open DUT CL RT 001aad983 Test data is given in Table 10. Definitions test circuit: RT = Termination resistance should be equal to output impedance Zo of the pulse generator. CL = Load capacitance including jig and probe capacitance. RL = Load resistance. S1 = Test selection switch. Fig 9. Test circuit for measuring switching times Table 10. Test data Type Input VI tr, tf CL RL tPHL, tPLH tPZH, tPHZ tPZL, tPLZ 74AHC1G125 VCC  3 ns 15 pF, 50 pF 1 k open GND VCC 74AHCT1G125 3V  3 ns 15 pF, 50 pF 1 k open GND VCC 74AHC_AHCT1G125 Product data sheet Load S1 position All information provided in this document is subject to legal disclaimers. Rev. 10 — 23 August 2012 © NXP B.V. 2012. All rights reserved. 9 of 17 74AHC1G125; 74AHCT1G125 NXP Semiconductors Bus buffer/line driver; 3-state 13. Package outline TSSOP5: plastic thin shrink small outline package; 5 leads; body width 1.25 mm E D SOT353-1 A X c y HE v M A Z 5 4 A2 A (A3) A1 θ 1 Lp 3 L e w M bp detail X e1 0 1.5 3 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max. A1 A2 A3 bp c D(1) E(1) e e1 HE L Lp v w y Z(1) θ mm 1.1 0.1 0 1.0 0.8 0.15 0.30 0.15 0.25 0.08 2.25 1.85 1.35 1.15 0.65 1.3 2.25 2.0 0.425 0.46 0.21 0.3 0.1 0.1 0.60 0.15 7° 0° Note 1. Plastic or metal protrusions of 0.15 mm maximum per side are not included. OUTLINE VERSION SOT353-1 REFERENCES IEC JEDEC JEITA MO-203 SC-88A EUROPEAN PROJECTION ISSUE DATE 00-09-01 03-02-19 Fig 10. Package outline SOT353-1 (TSSOP5) 74AHC_AHCT1G125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 23 August 2012 © NXP B.V. 2012. All rights reserved. 10 of 17 74AHC1G125; 74AHCT1G125 NXP Semiconductors Bus buffer/line driver; 3-state Plastic surface-mounted package; 5 leads SOT753 D E B y A X HE 5 v M A 4 Q A A1 c 1 2 3 Lp detail X bp e w M B 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A A1 bp c D E e HE Lp Q v w y mm 1.1 0.9 0.100 0.013 0.40 0.25 0.26 0.10 3.1 2.7 1.7 1.3 0.95 3.0 2.5 0.6 0.2 0.33 0.23 0.2 0.2 0.1 OUTLINE VERSION REFERENCES IEC JEDEC SOT753 JEITA SC-74A EUROPEAN PROJECTION ISSUE DATE 02-04-16 06-03-16 Fig 11. Package outline SOT753 (SC-74A) 74AHC_AHCT1G125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 23 August 2012 © NXP B.V. 2012. All rights reserved. 11 of 17 74AHC1G125; 74AHCT1G125 NXP Semiconductors Bus buffer/line driver; 3-state SOT886 XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1.45 x 0.5 mm b 1 2 3 4x (2) L L1 e 6 5 e1 4 e1 6x A (2) A1 D E terminal 1 index area 0 1 2 mm scale Dimensions (mm are the original dimensions) Unit mm max nom min A(1) 0.5 A1 b D E 0.04 0.25 1.50 1.05 0.20 1.45 1.00 0.17 1.40 0.95 e e1 0.6 0.5 L L1 0.35 0.40 0.30 0.35 0.27 0.32 Notes 1. Including plating thickness. 2. Can be visible in some manufacturing processes. Outline version SOT886 sot886_po References IEC JEDEC JEITA European projection Issue date 04-07-22 12-01-05 MO-252 Fig 12. Package outline SOT886 (XSON6) 74AHC_AHCT1G125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 23 August 2012 © NXP B.V. 2012. All rights reserved. 12 of 17 74AHC1G125; 74AHCT1G125 NXP Semiconductors Bus buffer/line driver; 3-state XSON6: plastic extremely thin small outline package; no leads; 6 terminals; body 1 x 1 x 0.5 mm 1 SOT891 b 3 2 4× (1) L L1 e 6 5 4 e1 e1 6× A (1) A1 D E terminal 1 index area 0 1 2 mm scale DIMENSIONS (mm are the original dimensions) UNIT A max A1 max b D E e e1 L L1 mm 0.5 0.04 0.20 0.12 1.05 0.95 1.05 0.95 0.55 0.35 0.35 0.27 0.40 0.32 Note 1. Can be visible in some manufacturing processes. OUTLINE VERSION REFERENCES IEC JEDEC JEITA EUROPEAN PROJECTION ISSUE DATE 05-04-06 07-05-15 SOT891 Fig 13. Package outline SOT891 (XSON6) 74AHC_AHCT1G125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 23 August 2012 © NXP B.V. 2012. All rights reserved. 13 of 17 74AHC1G125; 74AHCT1G125 NXP Semiconductors Bus buffer/line driver; 3-state 14. Abbreviations Table 11. Abbreviations Acronym Description CMOS Complementary Metal Oxide Semiconductor CDM Charged Device Model DUT Device Under Test ESD ElectroStatic Discharge HBM Human Body Model MM Machine Model TTL Transistor-Transistor Logic 15. Revision history Table 12. Revision history Document ID Release date Data sheet status Change notice Supersedes 74AHC_AHCT1G125 v10 20120823 Product data sheet - 74AHC_AHCT1G125 v.9 Modifications: • Package outline drawing of SOT886 (Figure 12) modified. 74AHC_AHCT1G125 v.9 20090622 Product data sheet - 74AHC_AHCT1G125 v.8 74AHC_AHCT1G125 v.8 20090409 Product data sheet - 74AHC_AHCT1G125 v.7 74AHC_AHCT1G125 v.7 20070707 Product data sheet - 74AHC_AHCT1G125 v.6 74AHC_AHCT1G125 v.6 20020606 Product specification - 74AHC_AHCT1G125 v.5 74AHC_AHCT1G125 v.5 20020322 Product specification - 74AHC_AHCT1G125 v.4 74AHC_AHCT1G125 v.4 20010222 Product specification - 74AHC_AHCT1G125 v.3 74AHC_AHCT1G125 v.3 19990615 Product specification - 74AHC_AHCT1G125_N v.2 74AHC_AHCT1G125_N v.2 19981207 Preliminary specification - 74AHC_AHCT1G125_N v.1 74AHC_AHCT1G125_N v.1 19981125 Preliminary specification - - 74AHC_AHCT1G125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 23 August 2012 © NXP B.V. 2012. All rights reserved. 14 of 17 74AHC1G125; 74AHCT1G125 NXP Semiconductors Bus buffer/line driver; 3-state 16. Legal information 16.1 Data sheet status Document status[1][2] Product status[3] Definition Objective [short] data sheet Development This document contains data from the objective specification for product development. Preliminary [short] data sheet Qualification This document contains data from the preliminary specification. Product [short] data sheet Production This document contains the product specification. [1] Please consult the most recently issued document before initiating or completing a design. [2] The term ‘short data sheet’ is explained in section “Definitions”. [3] The product status of device(s) described in this document may have changed since this document was published and may differ in case of multiple devices. The latest product status information is available on the Internet at URL http://www.nxp.com. 16.2 Definitions Draft — The document is a draft version only. The content is still under internal review and subject to formal approval, which may result in modifications or additions. NXP Semiconductors does not give any representations or warranties as to the accuracy or completeness of information included herein and shall have no liability for the consequences of use of such information. Short data sheet — A short data sheet is an extract from a full data sheet with the same product type number(s) and title. A short data sheet is intended for quick reference only and should not be relied upon to contain detailed and full information. For detailed and full information see the relevant full data sheet, which is available on request via the local NXP Semiconductors sales office. In case of any inconsistency or conflict with the short data sheet, the full data sheet shall prevail. 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This document supersedes and replaces all information supplied prior to the publication hereof. 74AHC_AHCT1G125 Product data sheet Suitability for use — NXP Semiconductors products are not designed, authorized or warranted to be suitable for use in life support, life-critical or safety-critical systems or equipment, nor in applications where failure or malfunction of an NXP Semiconductors product can reasonably be expected to result in personal injury, death or severe property or environmental damage. NXP Semiconductors and its suppliers accept no liability for inclusion and/or use of NXP Semiconductors products in such equipment or applications and therefore such inclusion and/or use is at the customer’s own risk. Applications — Applications that are described herein for any of these products are for illustrative purposes only. NXP Semiconductors makes no representation or warranty that such applications will be suitable for the specified use without further testing or modification. Customers are responsible for the design and operation of their applications and products using NXP Semiconductors products, and NXP Semiconductors accepts no liability for any assistance with applications or customer product design. It is customer’s sole responsibility to determine whether the NXP Semiconductors product is suitable and fit for the customer’s applications and products planned, as well as for the planned application and use of customer’s third party customer(s). Customers should provide appropriate design and operating safeguards to minimize the risks associated with their applications and products. NXP Semiconductors does not accept any liability related to any default, damage, costs or problem which is based on any weakness or default in the customer’s applications or products, or the application or use by customer’s third party customer(s). Customer is responsible for doing all necessary testing for the customer’s applications and products using NXP Semiconductors products in order to avoid a default of the applications and the products or of the application or use by customer’s third party customer(s). NXP does not accept any liability in this respect. Limiting values — Stress above one or more limiting values (as defined in the Absolute Maximum Ratings System of IEC 60134) will cause permanent damage to the device. Limiting values are stress ratings only and (proper) operation of the device at these or any other conditions above those given in the Recommended operating conditions section (if present) or the Characteristics sections of this document is not warranted. Constant or repeated exposure to limiting values will permanently and irreversibly affect the quality and reliability of the device. Terms and conditions of commercial sale — NXP Semiconductors products are sold subject to the general terms and conditions of commercial sale, as published at http://www.nxp.com/profile/terms, unless otherwise agreed in a valid written individual agreement. In case an individual agreement is concluded only the terms and conditions of the respective agreement shall apply. NXP Semiconductors hereby expressly objects to applying the customer’s general terms and conditions with regard to the purchase of NXP Semiconductors products by customer. No offer to sell or license — Nothing in this document may be interpreted or construed as an offer to sell products that is open for acceptance or the grant, conveyance or implication of any license under any copyrights, patents or other industrial or intellectual property rights. All information provided in this document is subject to legal disclaimers. Rev. 10 — 23 August 2012 © NXP B.V. 2012. All rights reserved. 15 of 17 NXP Semiconductors 74AHC1G125; 74AHCT1G125 Bus buffer/line driver; 3-state Export control — This document as well as the item(s) described herein may be subject to export control regulations. Export might require a prior authorization from competent authorities. Non-automotive qualified products — Unless this data sheet expressly states that this specific NXP Semiconductors product is automotive qualified, the product is not suitable for automotive use. It is neither qualified nor tested in accordance with automotive testing or application requirements. NXP Semiconductors accepts no liability for inclusion and/or use of non-automotive qualified products in automotive equipment or applications. In the event that customer uses the product for design-in and use in automotive applications to automotive specifications and standards, customer (a) shall use the product without NXP Semiconductors’ warranty of the product for such automotive applications, use and specifications, and (b) whenever customer uses the product for automotive applications beyond NXP Semiconductors’ specifications such use shall be solely at customer’s own risk, and (c) customer fully indemnifies NXP Semiconductors for any liability, damages or failed product claims resulting from customer design and use of the product for automotive applications beyond NXP Semiconductors’ standard warranty and NXP Semiconductors’ product specifications. Translations — A non-English (translated) version of a document is for reference only. The English version shall prevail in case of any discrepancy between the translated and English versions. 16.4 Trademarks Notice: All referenced brands, product names, service names and trademarks are the property of their respective owners. 17. Contact information For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com 74AHC_AHCT1G125 Product data sheet All information provided in this document is subject to legal disclaimers. Rev. 10 — 23 August 2012 © NXP B.V. 2012. All rights reserved. 16 of 17 NXP Semiconductors 74AHC1G125; 74AHCT1G125 Bus buffer/line driver; 3-state 18. Contents 1 2 3 4 5 6 6.1 6.2 7 8 9 10 11 12 13 14 15 16 16.1 16.2 16.3 16.4 17 18 General description . . . . . . . . . . . . . . . . . . . . . . 1 Features and benefits . . . . . . . . . . . . . . . . . . . . 1 Ordering information . . . . . . . . . . . . . . . . . . . . . 1 Marking . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Functional diagram . . . . . . . . . . . . . . . . . . . . . . 2 Pinning information . . . . . . . . . . . . . . . . . . . . . . 2 Pinning . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 Pin description . . . . . . . . . . . . . . . . . . . . . . . . . 3 Functional description . . . . . . . . . . . . . . . . . . . 3 Limiting values. . . . . . . . . . . . . . . . . . . . . . . . . . 3 Recommended operating conditions. . . . . . . . 4 Static characteristics. . . . . . . . . . . . . . . . . . . . . 4 Dynamic characteristics . . . . . . . . . . . . . . . . . . 5 Waveforms . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 Package outline . . . . . . . . . . . . . . . . . . . . . . . . 10 Abbreviations . . . . . . . . . . . . . . . . . . . . . . . . . . 14 Revision history . . . . . . . . . . . . . . . . . . . . . . . . 14 Legal information. . . . . . . . . . . . . . . . . . . . . . . 15 Data sheet status . . . . . . . . . . . . . . . . . . . . . . 15 Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Disclaimers . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 Trademarks. . . . . . . . . . . . . . . . . . . . . . . . . . . 16 Contact information. . . . . . . . . . . . . . . . . . . . . 16 Contents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 Please be aware that important notices concerning this document and the product(s) described herein, have been included in section ‘Legal information’. © NXP B.V. 2012. All rights reserved. For more information, please visit: http://www.nxp.com For sales office addresses, please send an email to: salesaddresses@nxp.com Date of release: 23 August 2012 Document identifier: 74AHC_AHCT1G125