SiT1602AI-22-18E-25.000000 数据手册
SiT1602
Low Power, Standard Frequency Oscillator
The Smart Timing Choice
The Smart Timing Choice
Features
Applications
51 standard frequencies between 3.75 MHz and 77.76 MHz
100% pin-to-pin drop-in replacement to quartz-based XO
Excellent total frequency stability as low as ±20 PPM
Low power consumption of 3.6 mA typical
Standby mode for longer battery life
Fast startup time of 5 ms
LVCMOS/HCMOS compatible output
Industry-standard packages: 2.0 x 1.6, 2.5 x 2.0, 3.2 x 2.5, 5.0 x 3.2,
7.0 x 5.0 mm x mm
Instant samples with Time Machine II and field programmable
oscillators
Pb-free, RoHS and REACH compliant
Ideal for DSC, DVC, DVR, IP CAM, Tablets, e-Books, SSD,
GPON, EPON, etc
Ideal for high-speed serial protocols such as: USB, SATA, SAS,
Firewire, 100M / 1G / 10G Ethernet, etc.
Electrical Characteristics[1]
Parameter and Conditions
Symbol
Min.
Typ.
Max.
Unit
Condition
Frequency Range
Output Frequency Range
f
(Refer to the frequency list page 10)
MHz
51 standard frequencies between 3.75 MHz and 77.76 MHz
Frequency Stability and Aging
Frequency Stability
F_stab
-20
–
+20
PPM
-25
–
+25
PPM
–
+50
PPM
-50
Inclusive of Initial tolerance at 25°C, 1st year aging at 25°C, and
variations over operating temperature, rated power supply
voltage and load.
Operating Temperature Range
Operating Temperature Range
T_use
-20
–
+70
°C
Extended Commercial
-40
–
+85
°C
Industrial
Supply Voltage and Current Consumption
Supply Voltage
Current Consumption
Vdd
Idd
1.62
1.8
1.98
V
2.25
2.5
2.75
V
Contact SiTime for 1.5V support
2.52
2.8
3.08
V
2.7
3.0
3.3
V
2.97
3.3
3.63
V
2.25
–
3.63
V
–
3.8
4.5
mA
No load condition, f = 20 MHz, Vdd = 2.8V to 3.3V
–
3.6
4.2
mA
No load condition, f = 20 MHz, Vdd = 2.5V
–
3.4
3.9
mA
No load condition, f = 20 MHz, Vdd = 1.8V
–
4
mA
Vdd = 2.5V to 3.3V, OE = GND, output is Weakly Pulled Down
Vdd = 1.8 V. OE = GND, output is Weakly Pulled Down
OE Disable Current
I_OD
–
–
–
3.8
mA
Standby Current
I_std
–
2.6
4.3
A
ST = GND, Vdd = 2.8V to 3.3V, Output is Weakly Pulled Down
–
1.4
2.5
A
ST = GND, Vdd = 2.5V, Output is Weakly Pulled Down
0.6
1.3
A
ST = GND, Vdd = 1.8V, Output is Weakly Pulled Down
–
LVCMOS Output Characteristics
Duty Cycle
Rise/Fall Time
DC
45
–
55
%
Tr, Tf
–
1
2
ns
All Vdds
Vdd = 2.5V, 2.8V, 3.0V or 3.3V, 20% - 80%
–
1.3
2.5
ns
Vdd =1.8V, 20% - 80%
–
–
2
ns
Output High Voltage
VOH
90%
–
–
Vdd
IOH = -4 mA (Vdd = 3.0V or 3.3V)
IOH = -3 mA (Vdd = 2.8V and Vdd = 2.5V)
IOH = -2 mA (Vdd = 1.8V)
Vdd = 2.25V - 3.63V, 20% - 80%
Output Low Voltage
VOL
–
–
10%
Vdd
IOL = 4 mA (Vdd = 3.0V or 3.3V)
IOL = 3 mA (Vdd = 2.8V and Vdd = 2.5V)
IOL = 2 mA (Vdd = 1.8V)
Input High Voltage
VIH
70%
–
–
Vdd
Input Low Voltage
VIL
–
–
30%
Vdd
Pin 1, OE or ST
Input Pull-up Impedence
Z_in
–
87
100
k
Pin 1, OE logic high or logic low, or ST logic high
2
–
–
M
Pin 1, ST logic low
Input Characteristics
Pin 1, OE or ST
Note:
1. All electrical specifications in the above table are specified with 15 pF output load and for all Vdd(s) unless otherwise stated.
SiTime Corporation
Rev. 1.2
990 Almanor Avenue
Sunnyvale, CA 94085
(408) 328-4400
www.sitime.com
Revised March 26, 2015
SiT1602
Low Power, Standard Frequency Oscillator
The Smart Timing Choice
The Smart Timing Choice
Electrical Characteristics[1] (continued)
Parameter and Conditions
Symbol
Min.
Typ.
Max.
Unit
Condition
Startup and Resume Timing
Startup Time
Enable/Disable Time
T_start
–
–
5
ms
Measured from the time Vdd reaches its rated minimum value
T_oe
–
–
130
ns
f = 110 MHz. For other frequencies, T_oe = 100 ns + 3 * cycles
Resume Time
T_resume
–
–
5
ms
Measured from the time ST pin crosses 50% threshold
Startup Time
T_start
–
–
5
ms
Measured from the time Vdd reaches its rated minimum value
T_jitt
–
1.76
3
ps
f = 75 MHz, Vdd = 2.5V, 2.8V, 3.0V or 3.3V
–
1.78
3
ps
f = 75 MHz, Vdd = 1.8V
–
0.5
0.9
ps
f = 75 MHz, Integration bandwidth = 900 kHz to 7.5 MHz
–
1.3
2
ps
f = 75 MHz, Integration bandwidth = 12 kHz to 20 MHz
Jitter
RMS Period Jitter
RMS Phase Jitter (random)
T_phj
Notes:
1. All electrical specifications in the above table are specified with 15 pF output load and for all Vdd(s) unless otherwise stated.
Pin Description
Pin
Symbol
OE/ ST
1
22
H or Open[2]: specified frequency output
L: output is high impedance. Only output driver is disabled.
Standby
H or Open[2]: specified frequency output
L: output is low (weak pull down). Device goes to sleep mode. Supply
current reduces to I_std.
2
GND
Power
Electrical ground[3]
3
OUT
Output
Oscillator output
4
Top View
Functionality
Output
Enable
VDD
Power
OE/ST
1
4
VDD
GND
2
3
OUT
[3]
Power supply voltage
Notes:
2. A pull-up resistor of