HT26LS32ARZ

HT26LS32 QUAD RS-422, RS-423 CMOS Differential Line Receiver GENERAL DESCRIPTION The HT26LS32 is a CMOS quad differential line receiver designed to meet the standard RS- 422, RS-423 requirements. The HT26LS32 has an input sensitivity of 200mv over the common mode input voltage range of 7V. To improve noise margin and output stability for slow changing input signal, special hysteresis is built in the HT26LS32 circuit.The HT26LS32 is a high speed line receiver designed to operate with MFM / RLL controllers and hard disk drives as well as RS-422, and RS-423 differential applications. HT26LS32 provides TTL compatible outputs to interface with standard 74LS and CMOS design environments. HT26LS32 is suitable for low power 5V operation. DIP−16 N SUFFIX HT26LS32ANZ 16 FEATURES 1 • Pin-to-Pin Compatible with National AM26LS32 • Low Power CMOS Design • Three-State Outputs with Enable Pin SOP−16 R SUFFIX HT26LS32ARZ 16 • Meets the EIA RS-422 Requirements • Low Propagation Delays • High Speed 1 SSOP−16 S SUFFIX HT26LS32ARTZ 16 1 1 INPUT A- INPUT D- INPUT A+ INPUT D+ OUTPUT A OUTPUT D QFN16 Q SUFFIX HT26LS32ARQZ ENABLE -ENABLE OUTPUT B OUTPUT C INPUT B+ INPUT C+ INPUT B- INPUT C- Figure 1. Block Diagram Rev. 01 PIN CONFIGURATION INPUT A OUTPUT A+ OUTPUT AENABLE OUTPUT BOUTPUT B+ INPUT B GND 1 16 VCC 2 15 3 14 4 13 5 12 6 11 7 10 8 9 INPUT D OUTPUT D+ OUTPUT D-ENABLE OUTPUT COUTPUT C+ INPUT C SOPP16/TSSOP16/DIP16 PIN DESCRIPTION Pin # Symbol Type Description 1 INPUT A- I Receiver A differential inverting input pin. 2 INPUT A+ I Receiver A differential non-inverting input pin. 3 OUTPUT A O Receiver A output pin. 4 ENABLE I Gate control (active high). This pin is one of the two control pins which enables or disables all four receivers. 5 OUTPUT B O Receiver B output pin. 6 INPUT B+ I Receiver B differential non-inverting input pin. 7 INPUT B- I Receiver B differential inverting input pin. 8 GND O Signal and power ground. 9 INPUT C- I Receiver C differential inverting input pin. 10 INPUT C+ I Receiver C differential non-inverting input pin. 11 OUTPUT C O Receiver C output pin. 12 -ENABLE I Gate control (active low). See ENABLE description 13 OUTPUT D O Receiver D output pin. 14 INPUT D+ I Receiver D differential non-inverting input pin. 15 INPUT D- I Receiver D differential inverting input pin. 16 VCC I Power supply pin. Rev. 01 AC ELECTRICAL CHARACTERISTICS Test Conditions: TA = -40C - +85C, VCC = 5.0V + 10% unless otherwise specified. Symbol Parameter Min. Typ. Max. Unit Conditions T1 Propagation Delay, Input to Output 8 10 ns S1=VCC T2 Propagation Delay, Input to Output 18 20 ns S1=GND T3 Output Enable Time 18 20 ns VDIF=2.5V T4 Output Disable Time 18 20 ns VDIF=2.5V DC ELECTRICAL CHARACTERISTICS Test Conditions: TA = -40C - +85C, VCC = 5.0V + 10% unless otherwise specified. Symbol Parameter Min. VIH Enable High Level 2.0 VIL Enable Low Level VOH Output High Level VOL Output Low Level VID Differential Input Level VH Input Hysteresis IIN Input Current ICC Operating Current IOZ Three-State Output Leakage IEN Enable Input Current VR Input Resistance Typ. Max. 4.2 0.4 -0.2 0.2 50 V V IOH= -6mA V IOH= 6mA V -7V < VCM < +7V mV +1.0 µA mA VDIF=+1V +5.0 µA VOUT=VCC or GND µA VIN=VCC or GND 15 KQ -7V < VCM < +7V 12 +1.0 +1.0 5 Conditions V 0.8 3.8 Unit Specifications are subject to change without notice ABSOLUTE MAXIMUM RATINGS Supply Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7V Voltage at Any Pin . . . . . . . . GND-0.3V to VCC + 0.3V Operating Temperature . . . . . . . . . . . –40C to +85C Storage Temperature . . . . . . . . . . . . -60C to +160C Package Dissipation . . . . . . . . . . . . . . . . . . . . . 500mW Rev. 01 Enable -Enable Input L L H H H H H H L L L L Z Z L L H H Differential Non-Inverting Non-Inverting Output Output X X L L H H Differential Inverting Inverting Output Output X X H H L L Notes X = Don’t care Z = Three-State (high impedance) Table 1. Functional Table VCC S1 S1 INPUT A INPUT A -INPUT A -INPUT A U1 U1 R1 R1 10K 10K OUTPUT A OUTPUT A C1 C1 50pF 50pF -ENABLE -ENABLE Receiver Receiver Figure 2. Test Condition Rev. 01 ENABLE -ENABLE INPUT X+ INPUT X- T1 T2 T3 T4 OUTPUT X Figure 3. Differential Line Receiver Timing Rev. 01 Package Dimensions DIP16-P-300-2.54A Unit: mm Weight: 1.11 g (Typ.) Rev. 01 TSSOP16-P-225-0.65B Unit: mm Weight: 0.07 g (Typ.) P-SOP16-0410-1.27-002 Unit: mm Weight: 0.15 g (Typ.) Rev. 01