TP1941U-CR

TP1941/TP1941N/TP1942/TP1944 68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators Description Features  Fast Response Time: 68 ns Propagation Delay  Ultra-Low Supply Current: 46 μA per Channel  Offset Voltage: ± 3.0 mV Maximum  Offset Voltage Temperature Drift: 0.3 μV/°C  Input Bias Current: 6 pA Typical  Internal Hysteresis Ensures Clean Switching  Input Common-Mode Range Extends 200 mV  No Phase Reversal for Overdriven Inputs  Push-Pull, CMOS/TTL Compatible Output  Shut-down Function (TP1941N Only)  Output Latch (TP1941NU Only)  Down to 1.8V Supply Voltage: 1.8V to 5.5V  Green, Space-Saving SC70 Package Available Applications  High-speed Line or Digital Line Receivers  High Speed Sampling Circuits  Peak and Zero-crossing Detectors  Threshold Detectors/Discriminators  Sensing at Ground or Supply Line  Logic Level Shifting or Translation  Window Comparators  IR Receivers  Clock and Data Signal Restoration  Telecom, Portable Communications  Portable and Battery Powered Systems The 3PEAK INCORPORATED TP194x families of CMOS/TTL compatible comparators are offered in single, dual, and quad configurations, and are exceptionally versatile and easy to use. The TP194x incorporate 3PEAK’s proprietary and patented design techniques to achieve the ultimate combination of high-speed (68ns propagation delay under 1.8~5.5V wide supply range) and low power consuming (46μA quiescent current per comparator). These comparators are optimized for low power 1.8V, single-supply applications with greater than rail-to-rail input operation, and also operate with ±0.9V to ±2.75V dual supplies. The input common mode voltage range extends 200mV below ground and 200mV above supply, allowing both ground and supply sensing. The internal input hysteresis eliminates output switching due to internal input noise voltage, reducing current draw. The push-pull output supports rail-to-rail output swing, and interfaces with CMOS/TTL logic. The output toggle frequency can reach a typical of 4 MHz while limiting supply current surges and dynamic power consumption during switching. The TP1941 single comparators are available in shout-down function, output latch version, and the tiny SC70/SOT23 package for space-conservative designs. All devices are specified for the temperature range of –40°C to +85°C. 3PEAK and the 3PEAK logo are registered trademarks of 3PEAK INCORPORATED. All other trademarks are the property of their respective owners. Related Products DEVICE VDD Fast 30ns, Low Power, Internal Hysteresis, Ro R1 TP1955/TP1955N ±3mV Maximum VOS, – 0.2V to VDD + 0.2V RRI, /TP1956/TP1958 Open-Drain Output Comparators TP1941 VOUT R2 DESCRIPTION Fast 30ns, Low Power, Internal Hysteresis, TP1951/TP1951N ±3mV Maximum VOS, – 0.2V to VDD + 0.2V RRI, /TP1952/TP1954 Push-Pull (CMOS/TTL) Output Comparators RD The TP1941 Comparator in IR Receivers www.3peakic.com.cn REV1.1 TP1931 /TP1932/TP1934 950ns, 3µA, 1.8V, ±2.5mV VOS-MAX, Internal Hysteresis, RRI, Push-Pull Output Comparators TP1935 /TP1936/TP1938 950ns, 3µA, 1.8V, ±2.5mV VOS-MAX, Internal Hysteresis, RRI, Open-Drain Comparators TP2011 /TP2012/TP2014 Ultra-low 200nA, 13µs, 1.6V, ±2mV VOS-MAX, Internal Hysteresis, RRI, Push-Pull (CMOS/TTL) Output Comparators TP2015 /TP2016/TP2018 Ultra-low 200nA, 13µs, 1.6V, ±2mV VOS-MAX, Internal Hysteresis, RRI, Open-Drain Output Comparators 1 TP1941/TP1941N/TP1942/TP1944 68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators Pin Configuration (Top View) Order Information Model Name TP1941 TP1941U TP1941U2 TP1941N TP1941NU TP1942 TP1942U TP1944 Order Number Package Transport Media, Quantity Marking Information TP1941-TR 5-Pin SOT23 Tape and Reel, 3000 C4TYW (1) TP1941-CR 5-Pin SC70 Tape and Reel, 3000 C4CYW (1) TP1941-SR 8-Pin SOIC Tape and Reel, 4000 1941S TP1941U-TR 5-Pin SOT23 Tape and Reel, 3000 C4AYW (1) TP1941U-CR 5-Pin SC70 Tape and Reel, 3000 C4BYW (1) TP1941U2-TR 5-Pin SOT23 Tape and Reel, 3000 C4EYW (1) TP1941N-TR 6-Pin SOT23 Tape and Reel, 3000 C4NYW (1) TP1941N-SR 8-Pin SOIC Tape and Reel, 4000 1941NS TP1941NU-SR 8-Pin SOIC Tape and Reel, 4000 1941NUS TP1941NU-VR 8-Pin MSOP Tape and Reel, 3000 1941NU TP1941NU-DR 8-Pin DIP Tape and Reel, 3000 1941NUD TP1942-TR 8-Pin SOT23 Tape and Reel, 3000 C42YW TP1942-SR 8-Pin SOIC Tape and Reel, 4000 1942S TP1942-VR 8-Pin MSOP Tape and Reel, 3000 1942V TP1942-DR 8-Pin DIP Tape and Reel, 3000 1942D TP1942U-SR 8-Pin SOIC Tape and Reel, 4000 1942US TP1942U-VR 8-Pin MSOP Tape and Reel, 3000 1942U TP1944-SR 14-Pin SOIC Tape and Reel, 2500 1944S TP1944-TR 14-Pin TSSOP Tape and Reel, 3000 1944T TP1944-DR 14-Pin DIP Tape and Reel, 3000 1944D (1) Note (1): ‘YW’ is date coding scheme. 'Y' stands for calendar year, and 'W' stands for single workweek coding scheme. 2 REV1.1 www.3peakic.com.cn TP1941/TP1941N/TP1942/TP1944 68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators Absolute Maximum Ratings Note 1 Supply Voltage: V+ – V–....................................6.0V Operating Temperature Range.........–40°C to 85°C Input Voltage............................. V– – 0.3 to V+ + 0.3 Maximum Junction Temperature................... 150°C Input Current: +IN, –IN, Note 2..........................±10mA Storage Temperature Range.......... –65°C to 150°C Output Current: OUT.................................... ±45mA Lead Temperature (Soldering, 10 sec) ......... 260°C Output Short-Circuit Duration Note 3…......... Indefinite Note 1: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. Exposure to any Absolute Maximum Rating condition for extended periods may affect device reliability and lifetime. Note 2: The inputs are protected by ESD protection diodes to each power supply. If the input extends more than 500mV beyond the power supply, the input current should be limited to less than 10mA. Note 3: A heat sink may be required to keep the junction temperature below the absolute maximum. This depends on the power supply voltage and how many amplifiers are shorted. Thermal resistance varies with the amount of PC board metal connected to the package. The specified values are for short traces connected to the leads. ESD, Electrostatic Discharge Protection Symbol Parameter Condition Minimum Level Unit HBM Human Body Model ESD MIL-STD-883H Method 3015.8 8 kV CDM Charged Device Model ESD JEDEC-EIA/JESD22-C101E 2 kV www.3peakic.com REV1.0 3 TP1941/TP1941N/TP1942/TP1944 68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators Electrical Characteristics The ● denotes the specifications which apply over the full operating temperature range, otherwise specifications are at TA = 27°C. VDD = +1.8V to +5.5V, VIN+ = VDD, VIN- = 1.2V, RPU=10kΩ, CL =15pF. SYMBOL PARAMETER VDD Supply Voltage VOS VOS TC VHYST Input Offset Voltage Note 1 Input Offset Voltage Drift Note 1 Input Hysteresis Voltage Note 1 Input Hysteresis Voltage Drift Note 1 VCM = 1.2V VCM = 1.2V VCM = 1.2V VCM = 1.2V 20 IB IOS RIN Input Bias Current Input Offset Current Input Resistance VCM = 1.2V CIN Input Capacitance CMRR Common Mode Rejection Ratio Common-mode Input Voltage Range Power Supply Rejection Ratio High-Level Output Voltage Low-Level Output Voltage Output Short-Circuit Current Quiescent Current per Comparator Supply Current in Shutdown Note 2 SHDN Input Low Voltage Note 2 SHDN Input High Voltage Note 2 Turn-On Time Note 2 Turn-Off Time Note 2 6 4 > 100 2 4 70 VHYST TC VCM PSRR VOH VOL ISC IQ IQ(off) VIL VIH tON tOFF tLPD CONDITIONS MIN ● 1.8 -3 4 Differential Common Mode VCM = VSS to VDD TYP 50 ±0.6 0.3 6 Disable Enable SHDN Toggle from VSS to VDD SHDN Toggle from VDD to VSS Latch Propagation Delay Note 3 ● ● 60 VDD-0.3 5.5 V +3 mV μV/°C mV 8 pA pA GΩ pF dB VDD+0.1 75 V 15 1 200 dB V V mA μA μA V V μs μs ns VSS+0.3 25 46 ● ● UNITS μV/°C VSS-0.1 IOUT=-1mA IOUT=1mA Sink or source current MAX 58 1.5 0.2VDD 0.8VDD tR Rising Time 5 ns tF Falling Time 5 ns TPD+ Propagation Delay (Low-to-High) Overdrive=100mV, VIN- =1.2V 68 ns TPD- Propagation Delay (High-to-Low) Overdrive=100mV, VIN- =1.2V 72 ns TPDSKEW Propagation Delay Skew Overdrive=100mV, VIN- =1.2V -4 ns Note 1: The input offset voltage is the average of the input-referred trip points. The input hysteresis is the difference between the input-referred trip points. Note 2: Specifications apply to the TP1941N with shutdown. Note 3: Specifications apply to the TP1941NU with shutdown and latch enable. Note 4: Propagation Delay Skew is defined as: tPD-SKEW = tPD+ - tPD-. 4 REV1.1 www.3peakic.com.cn TP1941/TP1941N/TP1942/TP1944 68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators Typical Performance Characteristics Input Offset Voltage V.S. Temperature Input Hysteresis Voltage V.S. Temperature Input Hysteresis Voltage (mV) Input Offset Voltage (mV) 2.0 5V 1.0 0.0 1.8V -1.0 VCM=1.2V -2.0 -50 0 50 10.0 8.0 1.8V 6.0 5V 4.0 2.0 VCM=1.2V 0.0 100 -50 0 Temperature (℃ ) Quiescent Current V.S. Temperature 100 60 5V Propagation Delay (ns) Quiescent Current (μA) 100 Propagation Delay V.S. Temperature 70 50 40 1.8V 30 V CM=1.2V 20 -50 0 50 tpd- @V DD =5V tpd+ @VDD=5V 80 60 40 tpd+ @VDD =1.8V 100 tpd- @V DD =1.8V VCM=VSS 20 -50 Temperature (℃ ) 0 50 100 Temperature (℃ ) Propagation Delay Skew V.S. Temperature Propagation Delay V.S. Overdrive Voltage 10 10000 Propagation Delay (ns) Propagation Delay Skew (ns) 50 Temperature (℃ ) 5 0 5V -5 1.8V VCM=V SS -10 -50 tpd- @V DD =5V tpd+ @VDD =1.8V 100 tpd- @VDD =1.8V VCM=VSS 10 0 50 Temperature (℃ ) www.3peakic.com tpd+ @VDD=5V 1000 100 1 10 100 1V Overdrive (mV) REV1.0 5 TP1941/TP1941N/TP1942/TP1944 68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators Typical Performance Characteristics Propagation Delay V.S. Capacitor Loading 400 100 50 Propagation Delay (ns) Propagation Delay Skew (ns) Propagation Delay Skew V.S. Overdrive Voltage tpdskew @VDD =5V 0 tpdskew@VDD=1.8V VCM=VSS -50 1 VCM=VSS 350 300 tpd+ @VDD=1.8V 250 tpd- @VDD =1.8V 200 tpd- @VDD=5V 150 tpd+ @VDD=5V 100 50 0 10 100 1V 1 10 Overdrive (mV) Propagation Delay Skew V.S. Capacitor Loading Rising/Falling Time (ns) Propagation Delay Skew (ns) 1000 VCM=VSS 0 tpdskew @VDD =1.8V -100 tpdskew @VDD =5V -200 VCM=1.2V 800 trising @VDD =1.8V 600 tfalling @VDD=1.8V 400 trising @VDD =5V tfalling @VDD=5V 200 -300 0 1 10 100 1n 1 10 Capacitive Load (pF) 100 1n Capacitive Load (pF) Quiescent Current V.S. Common Mode Voltage Quiescent Current V.S. Common Mode Voltage 100 Quiescent Current (μA) 100 Quiescent Current (μA) 1n Rising/Falling Time V.S. Capacitor Loading 100 80 27℃ 85℃ 60 40 V DD =5V V in -=0V V in+=Vcm 20 0 0 1 -40℃ 2 3 4 Common Mode Voltage (V) 6 100 Capacitive Load (pF) REV1.1 5 80 85℃ 27℃ 60 40 20 0 0.0 V DD =5V V in -=0V V in+=Vcm 0.5 -40℃ 1.0 1.5 2.0 Common Mode Voltage (V) www.3peakic.com.cn TP1941/TP1941N/TP1942/TP1944 68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators Typical Performance Characteristics Input Offset Voltage V.S. Common Mode Voltage Input Offset Voltage V.S. Common Mode Voltage 2 -40℃ Input Offset Voltage (mV) Input Offset Voltage (mV) 2 1 27℃ 85℃ 0 -1 V DD =5V -2 0 1 2 3 4 1 85℃ 0 -40℃ -1 VDD=1.8V -2 0.0 5 0.5 Common Mode Voltage (V) 85℃ 27℃ 6 4 -40℃ 2 VDD=5V 0 1 2 3 4 5 16 12 85℃ 27℃ 8 4 0 0.0 0.5 Percentage of Occurences Percentage of Occurences 1.8V 20% 15% 10% 5% 0% -6 -5 -4 -3 -2 -1 0 1 2 3 Input Offset Voltage (mV) www.3peakic.com 1.0 1.5 2.0 Input Hysteresis Voltage Distribution 1626 Samples VCM=1.2V 100mV overdrive 5V -40℃ V DD =1.8V Common Mode Voltage (V) Input Offset Voltage Distribution 35% 30% 25% 2.0 20 Common Mode Voltage (V) 45% 40% 1.5 Input Hysteresis Voltage V.S. Common Mode Voltage Input Hysteresis Voltage (mV) Input Hysteresis Voltage (mV) 10 0 1.0 Common Mode Voltage (V) Input Hysteresis Voltage V.S. Common Mode Voltage 8 27℃ 4 5 6 90% 80% 70% 60% 50% 1626 Samples VCM=1.2V 100mV overdrive 5V 1.8V 40% 30% 20% 10% 0% 0 1 2 3 4 5 6 7 8 9 10 11 12 Input Hysteresis Voltage (mV) REV1.0 7 TP1941/TP1941N/TP1942/TP1944 68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators Typical Performance Characteristics Percentage of Occurences 70% Input Bias and Offset Current V.S. Temperature Input Bias & Offset Current (pA) Quiescent Current Distribution 1626 Samples VCM=1.2V 100mV overdrive 60% 50% 40% 1.8V 30% 5V 20% 10% 0% 20 25 30 35 40 45 50 55 60 65 70 75 80 1000 100 I bias I os 10 V DD =5V 1 -50 0 Quiscent Current (uA) 20 40 15 I bias 10 I os 5 VDD =5V I source@5V 20 Isource@1.8V 0 Isink@1.8V -20 I sink@5V -40 0 0 1 2 3 -40 4 -15 10 35 60 85 TEMPERATURE (℃ ) Common Mode Voltage (V) Output Short Circuit Current V.S. Supply Voltage Output Voltage Headroom V.S. Output Current 5 40 I source Output Voltage (V) Short Circuit Current (mA) 100 Output Short Circuit Current V.S. Temperature Short Circuit Current (mA) Input Bias & Offset Current (pA) Input Bias Current V.S. Common Mode Voltage 20 0 -40℃ 27℃ 85℃ -20 I sink 4 VOH 3 85℃ 27℃ -40℃ 2 VOL 1 VDD =5V -40 0 1 2 3 Supply Voltage (V) 8 50 TEMPERATURE (℃ ) REV1.1 4 5 0 2 4 6 8 10 Output Current (mA) www.3peakic.com.cn TP1941/TP1941N/TP1942/TP1944 68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators Typical Performance Characteristics Output Voltage Headroom V.S. Output Current Input Offset Voltage V.S. Supply Voltage 2 Input Offset Voltage (mV) Output Voltage (V) 2.0 1.5 VOH 1.0 27℃ 85℃ -40℃ V OL 0.5 VDD=1.8V 27℃ 0 -40℃ -1 1 2 3 4 1 5 2 3 Input Hysteresis Voltage V.S. Supply Voltage 5 Quiescent Current V.S. Supply Voltage 10 70 85℃ 8 Quiescent Current (μA) Input Hysteresis Voltage (mV) 4 Supply Voltage (V) Output Current (mA) 27℃ 6 4 -40℃ 2 0 85℃ 60 27℃ 50 -40℃ 40 30 20 1 2 3 4 5 1 2 3 Supply Voltage (V) 4 5 Supply Voltage (V) Low to High Propagation Delay V.S. Supply Voltage High to low Propagation Delay V.S. Supply Voltage 100 Propagation Delay t pd- (ns) 100 Propagation Delay t pd+ (ns) 85℃ -2 0.0 0 1 80 -40℃ 27℃ 60 40 85℃ VCM=VSS 20 1 27℃ -40℃ 60 85℃ 40 VCM=VSS 20 2 3 Supply Voltage (V) www.3peakic.com 80 4 5 1 2 3 4 5 Supply Voltage (V) REV1.0 9 TP1941/TP1941N/TP1942/TP1944 68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators Typical Performance Characteristics Propagation Skew Delay V.S. Supply Voltage Propagation Delay Skew (ns) 20 10 0 85℃ 27℃ -10 -40℃ VCM=VSS -20 1 2 3 4 5 Supply Voltage (V) Pin Functions –IN: Inverting Input of the Comparator. Voltage range of this pin can go from V– – 0.3V to V+ + 0.3V. +IN: Non-Inverting Input of Comparator. This pin has the same voltage range as –IN. V+ (VDD): Positive Power Supply. Typically the voltage is from 1.8V to 5.5V. Split supplies are possible as long as the voltage between V+ and V– is between 1.8V and 5.5V. A bypass capacitor of 0.1μF as close to the part as possible should be used between power supply pins or between supply pins and ground. N/C: No Connection. V– (VSS): Negative Power Supply. It is normally tied to ground. It can also be tied to a voltage other than ground as long as the voltage between V+ and V– is from 1.8V to 5.5V. If it is not connected to ground, bypass it with a capacitor of 0.1μF as close to the part as possible. SHDN: Active Low Shutdown. Shutdown threshold is 1/2V+ above negative supply rail. LATCH: Active Low Latch enable. Latch enable threshold is 1/2V+ above negative supply rail. OUT: Comparator Output. The voltage range extends to within millivolts of each supply rail. Operation The TP194x family single-supply comparators feature internal hysteresis, high speed, and low power. Input signal range extends beyond the negative and positive power supplies. The output can even extend all the way to the negative supply. The input stage is 10 REV1.1 active over different ranges of common mode input voltage. Rail-to-rail input voltage range and low-voltage single-supply operation make these devices ideal for portable equipment. www.3peakic.com.cn TP1941/TP1941N/TP1942/TP1944 68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators Applications Information Inputs The TP194x comparator family uses CMOS transistors at the input which prevent phase inversion when the input pins exceed the supply voltages. Figure 1 shows an input voltage exceeding both supplies with no resulting phase inversion. 6 Input Voltage Vout Voltage (mV) 4 2 0 Output Voltage VDD=5V -2 Time (100μs/div) Figure 1. Comparator Response to Input Voltage The electrostatic discharge (ESD) protection input structure of two back-to-back diodes and 1kΩ series resistors are used to limit the differential input voltage applied to the precision input of the comparator by clamping input voltages that exceed supply voltages, as shown in Figure 2. Large differential voltages exceeding the supply voltage should be avoided to prevent damage to the input stage. +In -In 1KΩ 1KΩ Core Chip Figure 2. Equivalent Input Structure Internal Hysteresis Most high-speed comparators oscillate in the linear region because of noise or undesired parasitic feedback. This tends to occur when the voltage on one input is at or equal to the voltage on the other input. To counter the parasitic effects and noise, the TP194x implements internal hysteresis. The hysteresis in a comparator creates two trip points: one for the rising input voltage and one for the falling input voltage. The difference between the trip points is the hysteresis. When the comparator’s input voltages are equal, the hysteresis effectively causes one comparator input voltage to move quickly past the other, thus taking the www.3peakic.com REV1.0 11 TP1941/TP1941N/TP1942/TP1944 68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators input out of the region where oscillation occurs. Figure 3 illustrates the case where IN- is fixed and IN+ is varied. If the inputs were reversed, the figure would look the same, except the output would be inverted. Vi Vtr Hysteresis Band Vin- Vtf Vhyst=Vtr-Vtf Vtr+Vtf -V inVos= 2 Time VDD Vi Vtr Vtf Time VDD 0 Vhyst=Vtr-Vtf Vtr+Vtf -V inVos= 2 Hysteresis Band Vin- 0 Non-Inverting Comparator Output Inverting Comparator Output Figure 3. Comparator’s hysteresis and offset External Hysteresis Greater flexibility in selecting hysteresis is achieved by using external resistors. Hysteresis reduces output chattering when one input is slowly moving past the other. It also helps in systems where it is best not to cycle between high and low states too frequently (e.g., air conditioner thermostatic control). Output chatter also increases the dynamic supply current. Non-Inverting Comparator with Hysteresis A non-inverting comparator with hysteresis requires a two-resistor network, as shown in Figure 4 and a voltage reference (Vr) at the inverting input. Figure 4. Non-Inverting Configuration with Hysteresis When Vi is low, the output is also low. For the output to switch from low to high, Vi must rise up to Vtr. When Vi is high, the output is also high. In order for the comparator to switch back to a low state, Vi must equal Vtf before the non-inverting input V+ is again equal to Vr. Vr  R2 R1  R 2 Vtr Vr  (VDD  Vtf ) Vtr  Vtf  12 REV1.1 R1  R 2 R2 R1  R 2 R2 R1  Vtf R1  R 2 Vr Vr  R1 R2 VDD www.3peakic.com.cn TP1941/TP1941N/TP1942/TP1944 68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators Vhyst  Vtr  Vtf  R1 R2 VDD Inverting Comparator with Hysteresis The inverting comparator with hysteresis requires a three-resistor network that is referenced to the comparator supply voltage (VDD), as shown in Figure 5. Figure 5. Inverting Configuration with Hysteresis When Vi is greater than V+, the output voltage is low. In this case, the three network resistors can be presented as paralleled resistor R2 || R3 in series with R1. When Vi at the inverting input is less than V+, the output voltage is high. The three network resistors can be represented as R1 ||R3 in series with R2. R2 Vtr  Vtf  R1 || R 3  R 2 R 2 || R 3 R 2 || R 3  R1 VDD VDD Vhyst  Vtr  Vtf  R1 || R 2 R1 || R 2  R 3 VDD Low Input Bias Current The TP194x family is a CMOS comparator family and features very low input bias current in pA range. The low input bias current allows the comparators to be used in applications with high resistance sources. Care must be taken to minimize PCB Surface Leakage. See below section on “PCB Surface Leakage” for more details. PCB Surface Leakage In applications where low input bias current is critical, Printed Circuit Board (PCB) surface leakage effects need to be considered. Surface leakage is caused by humidity, dust or other contamination on the board. Under low humidity conditions, a typical resistance between nearby traces is 1012Ω. A 5V difference would cause 5pA of current to flow, which is greater than the TP194x’s input bias current at +27°C (±6pA, typical). It is recommended to use multi-layer PCB layout and route the comparator’s -IN and +IN signal under the PCB surface. www.3peakic.com REV1.0 13 TP1941/TP1941N/TP1942/TP1944 68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators The effective way to reduce surface leakage is to use a guard ring around sensitive pins (or traces). The guard ring is biased at the same voltage as the sensitive pin. An example of this type of layout is shown in Figure 6 for Inverting configuration application. 1. For Non-Inverting Configuration: a) Connect the non-inverting pin (VIN+) to the input with a wire that does not touch the PCB surface. b) Connect the guard ring to the inverting input pin (VIN–). This biases the guard ring to the same reference as the comparator. 2. For Inverting Configuration: a) Connect the guard ring to the non-inverting input pin (VIN+). This biases the guard ring to the same reference voltage as the comparator (e.g., VDD/2 or ground). b) Connect the inverting pin (VIN–) to the input with a wire that does not touch the PCB surface. Figure 6. Example Guard Ring Layout for Inverting Comparator Ground Sensing and Rail to Rail Output The TP194x family implements a rail-to-rail topology that is capable of swinging to within 10mV of either rail. Since the inputs can go 300mV beyond either rail, the comparator can easily perform ‘true ground’ sensing. The maximum output current is a function of total supply voltage. As the supply voltage of the comparator increases, the output current capability also increases. Attention must be paid to keep the junction temperature of the IC below 150°C when the output is in continuous short-circuit condition. The output of the amplifier has reverse-biased ESD diodes connected to each supply. The output should not be forced more than 0.5V beyond either supply, otherwise current will flow through these diodes. ESD The TP194x family has reverse-biased ESD protection diodes on all inputs and output. Input and output pins can not be biased more than 300mV beyond either supply rail. Shut-down The TP1941N/TP1941NU has SHDN pins that can shut down the amplifier to less than 1.5μA supply current. The SHDN pin voltage needs to be within 0.2V+ of V– for the amplifier to shut down. During shutdown, the output will be in high output resistance state, which is suitable for multiplexer applications. It should be noted that SHDN pin is forbidden to be left floating. Latch-enable The TP1941NU includes an internal latch that allows storage of comparison results. The LATCH pin has a high input impedance. If LATCH is high, the latch is transparent (i.e., the comparator operates as though the latch is not present). The comparator's output state is stored when LATCH is pulled low. All timing constraints must be met when using the latch function (Figure 7). 14 REV1.1 www.3peakic.com.cn TP1941/TP1941N/TP1942/TP1944 68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators Figure 7. TP1941NU Timing Diagram with Latch Operator Power Supply Layout and Bypass The TP194x family’s power supply pin should have a local bypass capacitor (i.e., 0.01μF to 0.1μF) within 2mm for good high frequency performance. It can also use a bulk capacitor (i.e., 1μF or larger) within 100mm to provide large, slow currents. This bulk capacitor can be shared with other analog parts. Good ground layout improves performance by decreasing the amount of stray capacitance and noise at the comparator’s inputs and outputs. To decrease stray capacitance, minimize PCB lengths and resistor leads, and place external components as close to the comparator’ pins as possible. Proper Board Layout The TP194x family is a series of fast-switching, high-speed comparator and requires high-speed layout considerations. For best results, the following layout guidelines should be followed: 1. Use a printed circuit board (PCB) with a good, unbroken low-inductance ground plane. 2. Place a decoupling capacitor (0.1μF ceramic, surface-mount capacitor) as close as possible to supply. 3. On the inputs and the output, keep lead lengths as short as possible to avoid unwanted parasitic feedback around the comparator. Keep inputs away from the output. 4. Solder the device directly to the PCB rather than using a socket. 5. For slow-moving input signals, take care to prevent parasitic feedback. A small capacitor (1000 pF or less) placed between the inputs can help eliminate oscillations in the transition region. This capacitor causes some degradation to propagation delay when the impedance is low. The topside ground plane should be placed between the output and inputs. 6. The ground pin ground trace should run under the device up to the bypass capacitor, thus shielding the inputs from the outputs. www.3peakic.com REV1.0 15 TP1941/TP1941N/TP1942/TP1944 68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators Typical Applications IR Receiver The TP1941 is an ideal candidate to be used as an infrared receiver shown in Figure 8. The infrared photo diode creates a current relative to the amount of infrared light present. The current creates a voltage across RD. When this voltage level cross the voltage applied by the voltage divider to the inverting input, the output transitions. Optional Ro provides additional hysteresis for noise immunity. VDD Ro R1 TP1941 Vo R2 RD Figure 8. IR Receiver Relaxation Oscillator A relaxation oscillator using TP1941 is shown in Figure 9. Resistors R1 and R2 set the bias point at the comparator's inverting input. The period of oscillator is set by the time constant of R4 and C1. The maximum frequency is limited by the large signal propagation delay of the comparator. TP1941’s low propagation delay guarantees the high frequency oscillation. If the inverted input (VC1) is lower than the non-inverting input (VA), the output is high which charges C1 through R4 until VC1 is equal to VA. The value of VA at this point is VA1  VDD  R 2 R 1 || R 3  R 2 At this point the comparator switches pulling down the output to the negative rail. The value of VA at this point is VA2  VDD  R 2 || R 3 R 1  R 2 || R 3 If R1=R2=R3, then VA1=2VDD /3, and VA2= VDD/3 The capacitor C1 now discharges through R4, and the voltage VC decreases till it is equal to VA2, at which point the comparator switches again, bringing it back to the initial stage. The time period is equal to twice the time it takes to discharge C1 from 2VDD/3 to VDD/3. Hence the frequency is: Freq  16 REV1.1 1 2  ln2  R 4  C1 www.3peakic.com.cn TP1941/TP1941N/TP1942/TP1944 68ns, 1.8V, Ultra-low Power, RRI, Push-Pull Output Comparators VDD R3 VO R1 VA VC1 R2 C1 TP1941 t Vo 2/3VDD R4 VC1 1/3VDD R1=R2=R3 t Figure 9. Relaxation Oscillator Windowed Comparator Figure 10 shows one approach to designing a windowed comparator using a single TP1942 chip. Choose different thresholds by changing the values of R1, R2, and R3. OutA provides an active-low undervoltage indication, and OutB gives an active-low overvoltage indication. ANDing the two outputs provides an active-high, power-good signal. When input voltage Vi reaches the overvoltage threshold VOH, the OutB gets low. Once Vi falls to the undervoltage threshold VUH, the OutA gets low. When VUH