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UN-2864KLBLG23

UN-2864KLBLG23

  • 厂商:

    UNVISION(优智景)

  • 封装:

    MODULE_34.5X23MM

  • 描述:

    OLED显示模块 1/64 Duty,128 x 64

  • 数据手册
  • 价格&库存
UN-2864KLBLG23 数据手册
Product Specification Part Name: OEL Display Module Customer Part ID: Allvision Part ID: UN-2864KLBLG23 Ver: A Customer: Approved by From: Unvision technology Inc. Approved by Unvision technology Inc. https://unvision.1688.com Notes: 1. Please contact Unvision technology Inc. before assigning your product based on this module specification 2. The information contained herein is presented merely to indicate the characteristics and performance of our products. No responsibility is assumed by Unvision technology Inc. for any intellectual property claims or other problems that may result from application based on the module described herein. Unvision technology Inc. Ver:A Revised History Part Number Revision UN-2864KLBLG23 A Revision Content New Revised on 20131106 i Unvision technology Inc. Ver:A Contents Revision History Contents 1. Basic Specifications 1.1 1.2 1.3 1.4 1.5 Display Specifications Mechanical Specifications Active Area / Memory Mapping & Pixel Construction Mechanical Drawing Pin Definition 2. Absolute Maximum Ratings 3. Optics & Electrical Characteristics 3.1 Optics Characteristics 3.2 DC Characteristics 3.3 AC Characteristics 3.3.1 68XX-Series MPU Parallel Interface Characteristics 3.3.2 80XX-Series MPU Parallel Interface Characteristics 3.3.3 Serial Interface Characteristics (4-wire SPI) 3.3.4 Serial Interface Characteristics (3-wire SPI) 3.3.5 I2C Interface Characteristics 4. Functional Specification 4.1 Commands 4.2 Power down and Power up Sequence 4.2.1 Power up Sequence 4.2.2 Power down Sequence 4.3 Reset Circuit 4.4 Actual Application Example 4.4.1 VCC Supplied Externally 4.4.2 VCC Generated by Internal DC/DC Circuit 5. Reliability 5.1 Contents of Reliability Tests 5.2 Failure Check Standard 6. Outgoing Quality Control Specifications 6.1 Environment Required 6.2 Sampling Plan 6.3 Criteria & Acceptable Quality Level 6.3.1 Cosmetic Check (Display Off) in Non-Active Area 6.3.2 Cosmetic Check (Display Off) in Active Area 6.3.3 Pattern Check (Display On) in Active Area 7. Package Specifications 8. Precautions When Using These OEL Display Modules 8.1 8.2 8.3 8.4 8.5 Handling Precautions Storage Precautions Designing Precautions Precautions when disposing of the OEL display modules Other Precautions Warranty Notice ii Unvision technology Inc. Ver:A 1. Basic Specifications 1.1 Display Specifications 1) 2) 3) Display Mode: Display Color: Drive Duty: Passive Matrix Monochrome (Blue) 1/64 Duty 1.2 Mechanical Specifications 1) 2) 3) 4) 5) 6) 7) Outline Drawing: Number of Pixels: Panel Size: Active Area: Pixel Pitch: Pixel Size: Weight: According to the annexed outline drawing 128  64 34.5  23.0  1.4 (mm) 29.42  14.7 (mm) 0.23  0.23(mm) 0.21  0.21(mm) 2.18 (g) 1.3 Active Area / Memory Mapping & Pixel Construction P0.23x128-0.02=29.42 "A" 0.23 0.21 P0.23x64-0.02=14.7 0.23 0.21 Segment 129 ( Column 1 ) Common 1 ( Row 63 ) Common 63 ( Row 1 ) Detail "A" Scale (10:1) Segment 2 ( Column 128 ) Common 0 ( Row 64 ) Common 62 ( Row 2 ) 1 6 P0.23x128-0.02=29.42 "A" Polarizer t=0.2mm P0.23x64-0.02=14.7 14.7± 0.2 (A/A) 16.7± 0.2 (V/A) 18.2± 0.2 (Polarizer) 19.2± 0.2 (Cap Size) 23± 0.2 (Panel Size) Active Area 1.3" 128 x 64 Pixels 1.4± 0.1 Remove Tape t=0.15mm Max 5 11.25± 0.3 Segment 2( Column 128 ) Common 0( Row 64 ) Common 63 ( Row 1 ) Common 62( Row 2 ) Protective Tape 15x8x0.06mm Glue Segment 129( Column 1 ) Common 1( Row 63 ) 12± 0.1 0.23 9.5± 0.3 0.23 0.5 1.75± 0.1 3.3± 0.1 W=0.28± 0.03 P0.50x(30-1)=14.5± 0.1 0.5± 0.1 15.5± 0.1 Detail "A" Scale (20:1) N .C. (GND) V LSS V CC V COMH IREF D6 D7 D5 D3 D4 D1 D2 D0 E/RD# R/W# V SS VDD RES# D/C# N .C. BS2 CS# V BAT BS0 BS1 C1N C1 P C2N C2 P N .C. (GND) Contact Side 1 6± 0.5 7± 0.1 30 1 1. Color: White 2. Driver IC: CH1116 3. FPC Number: TAB 4. Interface: 8-bit 68XX/80XX ,3/4-wire SPI, I 2C 5. General Tolerance: ± 0.30 ±0 0.8 14± 0.1 2-? 15 16.75 0.75 0.21 (40) 2 Notes: Pin 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 0.21 0.3± 0.03 Customer Approval Signature Symbol N.C. (GND) C2P C2N C1P C1N VBAT N.C. VSS VDD BS0 BS1 BS2 CS# RES# D/C# R/W# E/RD# D0 D1 D2 D3 D4 D5 D6 D7 IREF VCOMH VCC VLSS N.C. (GND) Drawing Number UN-2864KLBLG23 mm Title UN-2864KLBLG23 Folding Type OEL Display Module Pixel Number: 128 x 64, Monochrome, COG Package Soda Lime / Polyimide General Roughness Tolerance ± 0.3 Dimension Angle ±1 By Date Drawn Jesen 20131030 E.E. Panel / E. Rev. A Material Unless Otherwise Specified Unit Unvision technology Inc. 10 Remark Original Drawing Mechanical Drawing (2.1) (1.1) 0.5± 0.5 0.5± 0.5 (1.54) (2.54) Date 20131030 1.4 Item A 34.5± 0.2 (Panel Size) 34.5± 0.2 (Cap Size) 33.5± 0.2 (Polarizer) 31.42± 0.2 (V/A) 29.42± 0.2 (A/A) P.M. Scale 1:1 Sheet 1 of 1 Size A3 Ver:A Unvision technology Inc. 1.5 Ver:A Pin Definition Pin Number Symbol I/O Function 9 VDD P 8 VSS P 28 VCC P 29 VLSS P Power Supply for Logic This is a voltage supply pin. It must be connected to external source. Ground of Logic Circuit This is a ground pin. It acts as a reference for the logic pins. It must be connected to external ground. Power Supply for OEL Panel This is the most positive voltage supply pin of the chip. A stabilization capacitor should be connected between this pin and V SS when the converter is used. It must be connected to external source when the converter is not used. Ground of Analog Circuit This is an analog ground pin. It should be connected to V SS externally. 26 IREF I 27 VCOMH O Power Supply Driver Current Reference for Brightness Adjustment This pin is segment current reference pin. A resistor should be connected between this pin and V SS . Set the current at 12.5A maximum. Voltage Output High Level for COM Signal This pin is the input pin for the voltage output high level for COM signals. A capacitor should be connected between this pin and V SS . DC/DC Converter 6 VBAT P 4/5 2/3 C1P / C1N C2P / C2N I Power Supply for DC/DC Converter Circuit This is the power supply pin for the internal buffer of the DC/DC voltage converter. It must be connected to external source when the converter is used. It should be connected to V DD when the converter is not used. P o s i t i v e T e r m i n a l o f t h e F l y i n g I n v e r ti n g C a p a c i t o r Negative Terminal of the Flying Boost Capacitor The charge-pump capacitors are required between the terminals. They must be floated when the converter is not used. Interface 10 11 12 BS0 BS1 BS2 I 14 RES# I 13 CS# I 15 D/C# I 17 E/RD# I Communicating Protocol Select These pins are MCU interface selection input. See the following table: BS0 BS1 BS2 I2C 0 1 0 3-wire SPI 1 0 0 4-wire SPI 0 0 0 8-bit 68XX Parallel 0 0 1 8-bit 80XX Parallel 0 1 1 Power Reset for Controller and Driver This pin is reset signal input. When the pin is low, initialization of the chip is executed. Keep this pin pull high during normal operation. Chip Select This pin is the chip select input. The chip is enabled for MCU communication only when CS# is pulled low. Data/Command Control This pin is Data/Command control pin. When the pin is pulled high, the input at D7~D0 is treated as display data. When the pin is pulled low, the input at D7~D0 will be transferred to the command register. When the pin is pulled high and serial interface mode is selected, the data at SDIN will be interpreted as data. When it is pulled low, the data at SDIN will be transferred to the command register. In I2C mode, this pin acts as SA0 for slave address selection. For detail relationship to MCU interface signals, please refer to the Timing Characteristics Diagrams. Read/Write Enable or Read This pin is MCU interface input. When interfacing to a 68XX-series microprocessor, this pin will be used as the Enable (E) signal. Read/write operation is initiated when this pin is pulled high and the CS# is pulled low. When connecting to an 80XX-microprocessor, this pin receives the Read (RD#) signal. Data read operation is initiated when this pin is pulled low and CS# is pulled low. When serial or I2C mode is selected, this pin must be connected to V SS . 3 Unvision technology Inc. Ver:A 1.5 Pin Definition (Continued) Pin Number Symbol I/O Function Interface (Continued) 16 R/W# I 18~25 D0~D7 I/O 7 N.C. - 1, 30 N.C. (GND) - Read/Write Select or Write This pin is MCU interface input. When interfacing to a 68XX-series microprocessor, this pin will be used as Read/Write (R/W#) selection input. Pull this pin to “High” for read mode and pull it to “Low” for write mode. When 80XX interface mode is selected, this pin will be the Write (WR#) input. Data write operation is initiated when this pin is pulled low and the CS# is pulled low. When serial or I2C mode is selected, this pin must be connected to V SS . Host Data Input/Output Bus These pins are 8-bit bi-directional data bus to be connected to the microprocessor’s data bus. When serial mode is selected, D1 will be the serial data input SDIN and D0 will be the serial clock input SCLK. When I2C mode is selected, D2 & D1 should be tired together and serve as SDA out & SDA in in application and D0 is the serial clock input SCL. Unused pins must be connected to V SS except for D2 in serial mode. Reserve Reserved Pin The N.C. pin between function pins are reserved for compatible and flexible design. Reserved Pin (Supporting Pin) The supporting pins can reduce the influences from stresses on the function pins. These pins must be connected to external ground as the ESD protection circuit. 4 Unvision technology Inc. Ver:A 2. Absolute Maximum Ratings Parameter Symbol Min Max Unit Notes Supply Voltage for Logic V DD -0.3 4 V 1, 2 Supply Voltage for Display V CC 0 14 V 1, 2 Supply Voltage for DC/DC V BAT -0.3 5 V 1, 2 Operating Temperature T OP -40 85 C Storage Temperature T STG -40 85 C 3 10,000 - hour 4 Life Time (80 cd/m ) 30,000 - hour 4 Life Time (60 cd/m2) 50,000 - hour 4 Life Time (120 cd/m2) 2 Note 1: All the above voltages are on the basis of “V SS = 0V”. Note 2: When this module is used beyond the above absolute maximum ratings, permanent breakage of the module may occur. Also, for normal operations, it is desirable to use this module under the conditions according to Section 3. “Optics & Electrical Characteristics”. If this module is used beyond these conditions, malfunctioning of the module can occur and the reliability of the module may deteriorate. Note 3: The defined temperature ranges do not include the polarizer. The maximum withstood temperature of the polarizer should be 80C. Note 4: V CC = 12.0V, T a = 25°C, 50% Checkerboard. Software configuration follows Section 4.4 Initialization. End of lifetime is specified as 50% of initial brightness reached. The average operating lifetime at room temperature is estimated by the accelerated operation at high temperature conditions. 5 Unvision technology Inc. Ver:A 3. Optics & Electrical Characteristics 3.1 Optics Characteristics Characteristics Symbol Conditions Min Typ Max Unit Brightness (V CC Supplied Externally) L br Note 5 100 - - cd/m2 L br Note 6 90 110 130 cd/m2 C.I.E. (Blue) (x) (y) C.I.E. 1931 0.12 0.22 0.16 0.26 0.20 0.30 Dark Room Contrast CR - 2000:1 - - Free - degree Min Typ Max Unit 1.65 2.8 3.3 V - 12.0 - V - 4.2 V Brightness (V CC Generated by Internal DC/DC) Viewing Angle * Optical measurement taken at V DD = 2.8V, V CC = 12V & 7.25V. Software configuration follows Section 4.4 Initialization. 3.2 DC Characteristics Characteristics Symbol Supply Voltage for Logic V DD Supply Voltage for Display (Supplied Externally) V CC Supply Voltage for DC/DC Supply Voltage for Display (Generated by Internal DC/DC) V BAT Conditions Note 5 (Internal DC/DC Disable) High Level Input V IH Internal DC/DC Enable 3.5 Note 6 6.4 (Internal DC/DC Enable) I OUT = 100μA, 3.3MHz 0.8V DD Low Level Input V IL I OUT = 100μA, 3.3MHz High Level Output V OH I OUT = 100μA, 3.3MHz 0.9V DD - V DD V Low Level Output V OL I OUT = 100μA, 3.3MHz 0 - 0.1V DD V Operating Current for V DD I DD - 180 300 μA Operating Current for V CC (V CC Supplied Externally) I CC Note 7 - 23 32 mA Operating Current for V BAT (V CC Generated by Internal DC/DC) I BAT Note 8 - 45 50 mA Sleep Mode Current for V DD I DD, SLEEP - 1 5 μA Sleep Mode Current for V CC I CC, SLEEP - 2 10 μA V CC 0 - 9 V - V DD V - 0.2V DD V Note 5 & 6: Brightness (L br ) and Supply Voltage for Display (V CC ) are subject to the change of the panel characteristics and the customer’s request. Note 7: V DD = 2.8V, V CC = 12V, IREF=910K 100% Display Area Turn on. Note 8: V DD = 2.8V, V CC = 8V, IREF=560K 100% Display Area Turn on. * Software configuration follows Section 4.4 Initialization. Unvision technology Inc. Ver:A 3.3 AC Characteristics 3.3.1.1 68XX-Series MPU Parallel Interface Timing Characteristics: Symbol t cycle Description Min Max Unit Clock Cycle Time 300 - ns t AS Address Setup Time 5 - ns t AH Address Hold Time 0 - ns t DSW Write Data Setup Time 40 - ns t DHW Write Data Hold Time 7 - ns t DHR Read Data Hold Time 20 - ns t OH Output Disable Time - 70 ns t ACC Access Time - 140 ns - ns - ns PW CSL PW CSH Chip Select Low Pulse Width (Read) 120 Chip Select Low Pulse width (Write) 60 Chip Select High Pulse Width (Read) 60 Chip Select High Pulse Width (Write) 60 tR Rise Time - 40 ns tF Fall Time - 40 ns * (V DD - V SS = 1.65V to 3.3V, T a = 25°C) 7 Unvision technology Inc. Ver:A 3.3.1.2 68XX-Series MPU Parallel Interface with Internal Charge Pump 68xx parallel interface Vin R2 D C2 Q1 G Q2 G GPIO S C1 D S R3 C6 C5 CS# RES# D/C# R/W# E D[7:0] R1 C4 C3 N.C. (GND) C2P C2N C1P C1N VBAT N.C. VSS VDD BS0 BS1 BS2 CS# RES# D/C# R/W# E/RD# D0 D1 D2 D3 D4 D5 D6 D7 IREF VCOMH VCC VLSS N.C. (GND) UT-0206-P05 VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 GND Recommended Components: C1, C2: 1μF / 16V, X5R C3: 2.2μF C4: 4.7μF / 16V, X7R C5, C6: 1μF R1: 560kΩ, R1 = (Voltage at IREF - VSS) / IREF R2, R3: 47kΩ Q1: FDN338P Q2: FDN335N Notes: VDD: 1.65~3.3V, it should be equal to MPU I/O voltage. Vin: 3.5~4.2V * VBAT will be connected to VDD when VCC be connected to external source (12V), R1 should be replaced as 910 kΩ. 8 Unvision technology Inc. Ver:A 3.3.2.1 80XX-Series MPU Parallel Interface Timing Characteristics: Symbol Description Min Max Unit Clock Cycle Time 300 - ns t AS Address Setup Time 10 - ns t AH Address Hold Time 0 - ns t DSW Write Data Setup Time 40 - ns t DHW Write Data Hold Time 7 - ns t DHR Read Data Hold Time 20 - ns t OH Output Disable Time - 70 ns t ACC Access Time - 140 ns t PWLR Read Low Time 120 - ns t PWLW Write Low Time 60 - ns t PWHR Read High Time 60 - ns t PWHW Write High Time 60 - ns t CS Chip Select Setup Time 0 - ns t CSH Chip Select Hold Time to Read Signal 0 - ns t CSF Chip Select Hold Time 20 - ns t cycle tR Rise Time - 40 ns tF Fall Time - 40 ns * (V DD - V SS = 1.65V to 3.3V, T a = 25°C) ( Read Timing ) ( Write Timing ) 9 Unvision technology Inc. 3.3.2.2 Ver:A 80XX-Series MPU Parallel Interface with Internal Charge Pump 80xx parallel interface Vin R2 D C2 Q1 G Q2 G GPIO S C1 D S R3 C6 C5 CS# RES# D/C# WR# RD# D[7:0] R1 C4 C3 N.C. (GND) C2P C2N C1P C1N VBAT N.C. VSS VDD BS0 BS1 BS2 CS# RES# D/C# R/W# E/RD# D0 D1 D2 D3 D4 D5 D6 D7 IREF VCOMH VCC VLSS N.C. (GND) UT-0206-P05 VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 GND Recommended Components: C1, C2: 1μF / 16V, X5R C3: 2.2μF C4: 4.7μF / 16V, X7R C5, C6: 1μF R1: 560kΩ, R1 = (Voltage at IREF - VSS) / IREF R2, R3: 47kΩ Q1: FDN338P Q2: FDN335N Notes: VDD: 1.65~3.3V, it should be equal to MPU I/O voltage. Vin: 3.5~4.2V * VBAT will be connected to VDD when VCC be connected to external source (12V), R1 should be replaced as 910 kΩ. 10 Unvision technology Inc. Ver:A 3.3.3.1 Serial Interface Timing Characteristics: (4-wire SPI) Symbol Description Min Max Unit Clock Cycle Time 100 - ns t AS Address Setup Time 15 - ns t AH Address Hold Time 15 - ns t CSS Chip Select Setup Time 20 - ns t CSH Chip Select Hold Time 10 - ns t DSW Write Data Setup Time 15 - ns t DHW Write Data Hold Time 15 - ns t CLKL Clock Low Time 20 - ns t CLKH Clock High Time 20 - ns t cycle tR Rise Time - 40 ns tF Fall Time - 40 ns * (V DD - V SS = 1.65V to 3.3V, T a = 25°C) 11 Unvision technology Inc. 3.3.3.2 Ver:A 4-wire Serial Interface with Internal Charge Pump 4-w ire serial interface V in R2 D Q2 C2 Q1 G G G PIO S C1 D S R3 C5 C6 C S# R E S# D /C # R4 R5 SCLK S D IN R1 C4 C3 N .C . (G N D ) C 2P C 2N C 1P C 1N VDDB N .C . V SS VDD B S0 B S1 B S2 CS# RES# D /C # R /W # E /R D # D0 D1 D2 D3 D4 D5 D6 D7 IR E F VCOM H VCC V LSS N .C . (G N D ) UT-0206-P05 VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 GND Recommended Components: C1, C2: 1μF / 16V, X5R C3: 2.2μF C4: 4.7μF / 16V, X7R C5, C6: 1μF R1: 560kΩ, R1 = (Voltage at IREF - VSS) / IREF R2, R3: 47kΩ R4, R5: 4.7kΩ Q1: FDN338P Q2: FDN335N Notes: VDD: 1.65~3.3V, it should be equal to MPU I/O voltage. Vin: 3.5~4.2V * VBAT will be connected to VDD when VCC be connected to external source (12V), R1 should be replaced as 910 kΩ. 12 Unvision technology Inc. Ver:A 3.3.4.1 Serial Interface Timing Characteristics: (3-wire SPI) Symbol Description Min Max Unit t cycle Clock Cycle Time 100 - ns t CSS Chip Select Setup Time 20 - ns t CSH Chip Select Hold Time 10 - ns t DSW Write Data Setup Time 15 - ns t DHW Write Data Hold Time 15 - ns t CLKL Clock Low Time 20 - ns t CLKH Clock High Time 20 - ns tR Rise Time - 40 ns tF Fall Time - 40 ns * (V DD - V SS = 1.65V to 3.3V, T a = 25°C) 13 Unvision technology Inc. 3.3.4.2 Ver:A 3-wire Serial Interface with Internal Charge Pump 3-wire serial interface Vin R2 D Q2 C2 Q1 G G GPIO S C1 D S R3 C5 C6 CS# RES# R4 R5 SCLK SDIN R1 C4 C3 N.C. (GND) C2P C2N C1P C1N VDDB N.C. VSS VDD BS0 BS1 BS2 CS# RES# D/C# R/W# E/RD# D0 D1 D2 D3 D4 D5 D6 D7 IREF VCOMH VCC VLSS N.C. (GND) UT-0206-P05 VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 GND Recommended Components: C1, C2: 1μF / 16V, X5R C3: 2.2UF/16V C4: 4.7μF / 16V, X7R C5, C6: 1μF/16V R1: 560kΩ, R1 = (Voltage at IREF - VSS) / IREF R2, R3: 47kΩ R4, R5: 4.7kΩ Q1: FDN338P Q2: FDN335N Notes: VDD: 1.65~3.3V, it should be equal to MPU I/O voltage. Vin: 3.5~4.2V * VBAT will be connected to VDD when VCC be connected to external source (12V), R1 should be replaced as 910 kΩ. 14 Unvision technology Inc. Ver:A 3.3.5.1 I2C Interface Timing Characteristics: Symbol t cycle t HSTART Description Min Max Unit Clock Cycle Time 2.5 - μs Start Condition Hold Time 0.6 - μs - ns Data Hold Time (for “SDA OUT ” Pin) 0 Data Hold Time (for “SDA IN ” Pin) 300 Data Setup Time 100 - ns t SSTART Start Condition Setup Time (Only relevant for a repeated Start condition) 0.6 - μs t SSTOP Stop Condition Setup Time 0.6 - μs t HD t SD tR Rise Time for Data and Clock Pin 300 ns tF Fall Time for Data and Clock Pin 300 ns - μs t IDLE Idle Time before a New Transmission can Start 1.3 * (V DD - V SS = 1.65V to 3.3V, T a = 25°C) 15 Unvision technology Inc. 3.3.5.2 Ver:A I2C Interface with Internal Charge Pump I 2 C in te r f a c e V in R2 D Q2 C2 Q1 G G G P IO S C1 D S R3 C5 C6 RES# R4 R5 SCL SDA R1 C4 C3 N .C . ( G N D ) C 2P C 2N C 1P C 1N VDDB N .C . V SS VDD BS0 BS1 BS2 CS# RES# D /C # R /W # E /R D # D0 D1 D2 D3 D4 D5 D6 D7 IR E F VCOM H VCC V LSS N .C . ( G N D ) UT-0206-P05 VDD 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 GND Recommended Components: C1, C2: 1μF / 16V, X5R C3: 2.2μF C4: 4.7μF / 16V, X7R C5, C6: 1μF R1: 560kΩ, R1 = (Voltage at IREF - VSS) / IREF R2, R3: 47kΩ R4, R5: 4.7kΩ Q1: FDN338P Q2: FDN335N Notes: VDD: 1.65~3.3V, it should be equal to MPU I/O voltage. Vin: 3.5~4.2V The I2C slave address is 0111100b’. If the customer ties D/C# (pin 15) to VDD, the I2C slave address will be 0111101b’. * VBAT will be connected to VDD when VCC be connected to external source (12V), R1 should be replaced as 910 kΩ. 16 Unvision technology Inc. Ver:A 4. Functional Specification 4.1 Commands Refer to the Technical Manual for the SH1106 4.2 Power down and Power up Sequence To protect OEL panel and extend the panel life time, the driver IC power up/down routine should include a delay period between high voltage and low voltage power sources during turn on/off. It gives the OEL panel enough time to complete the action of charge and discharge before/after the operation. 4.2.1 Power up Sequence: Power up V DD Send Display off command Initialization Clear Screen Power up V CC / V BAT Delay 100ms (When V CC is stable) 7. Send Display on command 1. 2. 3. 4. 5. 6. V DD on V CC /VBAT on Display on V CC V DD V SS /Ground Display off 4.2.2 Power down Sequence: 1. Send Display off command 2. Power down V CC / V BAT 3. Delay 100ms (When V CC / V BAT is reach 0 and panel is completely discharges) 4. Power down V DD V CC / V BAT off V DD off V CC /V BAT V DD V SS /Ground Note 13: 1) Since an ESD protection circuit is connected between V DD and V CC inside the driver IC, V CC becomes lower than V DD whenever V DD is ON and V CC is OFF. 2) V CC / V BAT should be kept float (disable) when it is OFF. 3) Power Pins (V DD , V CC , V BAT ) can never be pulled to ground under any circumstance. 4) V DD should not be power down before V CC / V BAT power down. 4.3 Reset Circuit When RES# input is low, the chip is initialized with the following status: 1. Display is OFF 2. 12864 Display Mode 3. Normal segment and display data column and row address mapping (SEG0 mapped to column address 00h and COM0 mapped to row address 00h) 4. Shift register data clear in serial interface 5. Display start line is set at display RAM address 0 6. Column address counter is set at 0 7. Normal scan direction of the COM outputs 8. Contrast control register is set at 7Fh 9. Normal display mode (Equivalent to A4h command) 17 Unvision technology Inc. Ver:A 4.4 Actual Application Example Command usage and explanation of an actual example 4.4.1 V CC Supplied Externally V DD /V CC off State Set Display Offset 0xD3, 0x00 set VPP 0x32 Power up V DD (RES# as Low State) Set Display Start Line 0x40 Set Normal/Inverse Display 0xA6 Power Stabilized (Delay Recommended) Set Charge Pump 0xad, 0x8b Clear Screen Set RES# as High (3μs Delay Minimum) Set Segment Re-Map 0xA1 Power up V CC & Stabilized (Delay Recommended) Initialized State (Parameters as Default) Set COM Output Scan Direction 0xC8 Set Display On 0xAF Set Display Off 0xAE Set COM Pins Hardware Configuration 0xDA, 0x12 (100ms Delay Recommended) Initial Settings Configuration Set Contrast Control 0x81, 0XBF Display Data Sent Set Display Clock Divide Ratio/Oscillator Frequency 0xD5, 0x80 Set Pre-Charge Period 0xD9, 0X22 Set Multiplex Ratio 0xA8, 0x3F Set VCOMH Deselect Level 0xDB, 0x40 If the noise is accidentally occurred at the displaying window during the operation, please reset the display in order to recover the display function. 20 Unvision technology Inc. Normal Operation Power down V CC (100ms Delay Recommended) Set Display Off 0xAE Power down V DD V DD /V CC off State Normal Operation Power down V CC Set Display Off 0xAE Sleep Mode Sleep Mode Set Display On 0xAF Power up V CC & Stabilized (Delay Recommended) (100ms Delay Recommended) Normal Operation External setting { RES=1; delay(1000); RES=0; delay(1000); RES=1; delay(1000); write_i(0xAE); /*display off*/ write_i(0x02); write_i(0x10); /*set lower column address*/ /*set higher column address*/ write_i(0x40); /*set display start line*/ write_i(0xB0); /*set page address*/ 21 Ver:A Unvision technology Inc. write_i(0x81); write_i(0xBF); /*contract control*/ /*128*/ write_i(0xA1); /*set segment remap*/ write_i(0xA6); /*normal / reverse*/ write_i(0xA8); write_i(0x3F); /*multiplex ratio*/ /*duty = 1/64*/ write_i(0xad); write_i(0x8a); /*set charge pump enable*/ /* 0x8a 外供 VCC */ write_i(0x32); write_i(0xC8); /*0X30---0X33 set VPP /*Com scan direction*/ write_i(0xD3); write_i(0x00); /*set display offset*/ /* 0x20 */ write_i(0xD5); write_i(0x80); /*set osc division*/ write_i(0xD9); write_i(0x22); /*set pre-charge period*/ /*0x22*/ write_i(0xDA); write_i(0x12); /*set COM pins*/ write_i(0xdb); write_i(0x40); write_i(0xAF); } 8V */ /*set vcomh*/ /*display ON*/ void write_i(unsigned char ins) { } DC=0; CS=0; WR=1; P1=ins; WR=0; WR=1; CS=1; /*inst*/ void write_d(unsigned char dat) 22 Ver:A Unvision technology Inc. { } DC=1; CS=0; WR=1; P1=dat; WR=0; WR=1; CS=1; /*data*/ void delay(unsigned int i) { while(i>0) { i--; } } 23 Ver:A Unvision technology Inc. Ver:A 4.4.2 V CC Generated by Internal DC/DC Circuit V DD /V CC off State Set Display Offset 0xD3, 0x00 set VPP 0x33 Power up V DD (RES# as Low State) Set Display Start Line 0x40 Set Normal/Inverse Display 0xA6 Power Stabilized (Delay Recommended) Set Charge Pump 0xad, 0x8a Clear Screen Set RES# as High (3μs Delay Minimum) Set Segment Re-Map 0xA1 Power up V CC & Stabilized (Delay Recommended) Initialized State (Parameters as Default) Set COM Output Scan Direction 0xC8 Set Display On 0xAF Set Display Off 0xAE Set COM Pins Hardware Configuration 0xDA, 0x12 (100ms Delay Recommended) Initial Settings Configuration Set Contrast Control 0x81, 0Xff Display Data Sent Set Display Clock Divide Ratio/Oscillator Frequency 0xD5, 0x80 Set Pre-Charge Period 0xD9, 0X1f Set Multiplex Ratio 0xA8, 0x3F Set VCOMH Deselect Level 0xDB, 0x40 If the noise is accidentally occurred at the displaying window during the operation, please reset the display in order to recover the display function. 24 Unvision technology Inc. Ver:A Normal Operation Power Stabilized (100ms Delay Recommended) Set Display Off 0xAE Power down V BAT (50ms Delay Recommended) Set Charge Pump 0x8D, 0x10 Power down V DD V DD /V BAT off State Normal Operation Set Charge Pump 0xad, 0x8b Set Display Off 0xAE Power down V BAT Sleep Mode Sleep Mode Set Charge Pump 0xaD, 0x8a Power Stabilized (100ms Delay Recommended) Power up V BAT (100ms Delay Recommended) Set Display On 0xAF Normal Operation Internal setting(Charge pump) { RES=1; delay(1000); RES=0; delay(1000); RES=1; delay(1000); write_i(0xAE); /*display off*/ write_i(0x02); write_i(0x10); /*set lower column address*/ /*set higher column address*/ Unvision technology Inc. write_i(0x40); /*set display start line*/ write_i(0xB0); /*set page address*/ write_i(0x81); write_i(0xff); /*contract control*/ /*128*/ write_i(0xA1); /*set segment remap*/ write_i(0xA6); /*normal / reverse*/ write_i(0xA8); write_i(0x3F); /*multiplex ratio*/ /*duty = 1/64*/ write_i(0xad); write_i(0x8b); /*set charge pump enable*/ /* 0x8B 内供 VCC */ write_i(0x33); write_i(0xC8); set VPP 9V */ /*Com scan direction*/ write_i(0xD3); write_i(0x00); /*set display offset*/ /* 0x20 */ write_i(0xD5); write_i(0x80); /*set osc division*/ write_i(0xD9); write_i(0x1f); } /*0X30---0X33 /*set pre-charge period*/ /*0x22*/ write_i(0xDA); write_i(0x12); /*set COM pins*/ write_i(0xdb); write_i(0x40); /*set vcomh*/ write_i(0xAF); /*display ON*/ void write_i(unsigned char ins) { DC=0; CS=0; WR=1; P1=ins; WR=0; /*inst*/ 26 Ver:A Unvision technology Inc. WR=1; CS=1; } void write_d(unsigned char dat) { DC=1; CS=0; WR=1; P1=dat; /*data*/ WR=0; WR=1; CS=1; } void delay(unsigned int i) { while(i>0) { i--; } } 27 Ver:A Unvision technology Inc. Ver:A 5. Reliability 5.1 Contents of Reliability Tests Item Conditions High Temperature Operation 70C, 240 hrs Low Temperature Operation -40C, 240 hrs High Temperature Storage 85C, 240 hrs Low Temperature Storage -40C, 240 hrs High Temperature/Humidity Operation 60C, 90% RH, 120 hrs Thermal Shock -40C  85C, 24 cycles 60 mins dwell Criteria The operational functions work. * The samples used for the above tests do not include polarizer. * No moisture condensation is observed during tests. 5.2 Failure Check Standard After the completion of the described reliability test, the samples were left at room temperature for 2 hrs prior to conducting the failure test at 235C; 5515% RH. 28 Unvision technology Inc. 6. Outgoing Quality Control Specifications 6.1 Environment Required Customer’s test & measurement are required to be conducted under the following conditions: Temperature: 23  5C Humidity: 55  15% RH Fluorescent Lamp: 30W ≥ 50cm Distance between the Panel & Lamp: Distance between the Panel & Eyes of the Inspector: ≥ 30cm Finger glove (or finger cover) must be worn by the inspector. Inspection table or jig must be anti-electrostatic. 6.2 Sampling Plan Level II, Normal Inspection, Single Sampling, MIL-STD-105E 6.3 Criteria & Acceptable Quality Level Partition AQL Definition Major 0.65 Defects in Pattern Check (Display On) Minor 1.0 Defects in Cosmetic Check (Display Off) 6.3.1 Cosmetic Check (Display Off) in Non-Active Area Check Item Classification Criteria X > 6 mm (Along with Edge) Y > 1 mm (Perpendicular to edge) X Panel General Chipping Y Minor X Y 29 Ver:A Unvision technology Inc. Ver:A 6.3.1 Cosmetic Check (Display Off) in Non-Active Area (Continued) Check Item Classification Criteria Any crack is not allowable. Panel Crack Minor Copper Exposed (Even Pin or Film) Minor Film or Trace Damage Minor Terminal Lead Prober Mark Acceptable Glue or Contamination on Pin (Couldn’t Be Removed by Alcohol) Minor Ink Marking on Back Side of panel (Exclude on Film) Acceptable Not Allowable by Naked Eye Inspection Ignore for Any 30 Unvision technology Inc. Ver:A 6.3.2 Cosmetic Check (Display Off) in Active Area It is recommended to execute in clear room environment (class 10k) if actual in necessary. Check Item Classification Criteria Any Dirt & Scratch on Polarizer’s Protective Film Acceptable Ignore for not Affect the Polarizer Scratches, Fiber, Line-Shape Defect (On Polarizer) Minor Dirt, Black Spot, Foreign Material, (On Polarizer) Minor Dent, Bubbles, White spot (Any Transparent Spot on Polarizer) Minor Fingerprint, Flow Mark (On Polarizer) Minor Ignore W ≤ 0.1 W > 0.1 n≤1 L≤2 L>2 n=0 Φ ≤ 0.1 Ignore n≤1 0.1 < Φ ≤ 0.25 0.25 < Φ n=0 Φ ≤ 0.5  Ignore if no Influence on Display 0.5 < Φ n=0 Not Allowable * Protective film should not be tear off when cosmetic check. ** Definition of W & L & Φ (Unit: mm): Φ = (a + b) / 2 L W b: Minor Axis a: Major Axis 31 Unvision technology Inc. 6.3.3 Pattern Check (Display On) in Active Area Check Item Classification No Display Major Missing Line Major Pixel Short Major Darker Pixel Major Wrong Display Major Un-uniform Major Criteria 32 Ver:A Unvision technology Inc. 7. Package Specifications EPE COVER FOAM 351x212x1, ANTISTATIC x 1 Pcs x 1 pcs (Empty) 1B6 Pcs Tray Vacuum packing Module EPE PROTECTTIVE x 15 A pcs Staggered Stacking Tray 420x285 mm T=0.8mm Exsiccator x 2 pcs Brimary Primary Box Box C4 SET SET Wrapped with adhesive tape x 16 B pcs Vacuum packing bag EPE PROTECTTIVE 370mm x 280mm x 20mm CARTON BOX Label Primary L450mm x W296 x H110, B wave x C4Pcs Univision Technology Inc. Part ID : Label Lot ID : Q'ty : QC : Carton Box L464mm x W313mm x H472mm, AB wave (Major / Maximum) Item Quantity Module 810 per Primary Box Holding Trays (A) 15 per Primary Box Total Trays (B) 16 per Primary Box (Including 1 Empty Tray) Primary Box (C) 1~4 per Carton (4 as Major / Maximum) 33 Ver:A Unvision technology Inc. Ver:A 8. Precautions When Using These OEL Display Modules 8.1 Handling Precautions 1) 2) 3) 4) 5) 6) Since the display panel is being made of glass, do not apply mechanical impacts such us dropping from a high position. If the display panel is broken by some accident and the internal organic substance leaks out, be careful not to inhale nor lick the organic substance. If pressure is applied to the display surface or its neighborhood of the OEL display module, the cell structure may be damaged and be careful not to apply pressure to these sections. The polarizer covering the surface of the OEL display module is soft and easily scratched. Please be careful when handling the OEL display module. When the surface of the polarizer of the OEL display module has soil, clean the surface. It takes advantage of by using following adhesion tape. * Scotch Mending Tape No. 810 or an equivalent Never try to breathe upon the soiled surface nor wipe the surface using cloth containing solvent such as ethyl alcohol, since the surface of the polarizer will become cloudy. Also, pay attention that the following liquid and solvent may spoil the polarizer: * Water * Ketone * Aromatic Solvents Hold OEL display module very carefully when placing OEL display module into the system housing. Do not apply excessive stress or pressure to OEL display module. And, do not over bend the film with electrode pattern layouts. These stresses will influence the display performance. Also, secure sufficient rigidity for the outer cases. 7) 8) 9) 10) Do not apply stress to the driver IC and the surrounding molded sections. Do not disassemble nor modify the OEL display module. Do not apply input signals while the logic power is off. Pay sufficient attention to the working environments when handing OEL display modules to prevent occurrence of element breakage accidents by static electricity. * Be sure to make human body grounding when handling OEL display modules. * Be sure to ground tools to use or assembly such as soldering irons. * To suppress generation of static electricity, avoid carrying out assembly work under dry environments. * Protective film is being applied to the surface of the display panel of the OEL display module. Be careful since static electricity may be generated when exfoliating the protective film. 11) Protection film is being applied to the surface of the display panel and removes the protection film before assembling it. At this time, if the OEL display module has been stored for a long period of time, residue adhesive material of the protection film may remain on the surface of the display panel after removed of the film. In such case, remove the residue material by the method introduced in the above Section 5). 12) If electric current is applied when the OEL display module is being dewed or when it is placed under high humidity environments, the electrodes may be corroded and be careful to avoid the above. 34 Unvision technology Inc. Ver:A 8.2 Storage Precautions 1) 2) When storing OEL display modules, put them in static electricity preventive bags avoiding exposure to direct sun light nor to lights of fluorescent lamps. and, also, avoiding high temperature and high humidity environment or low temperature (less than 0C) environments. (We recommend you to store these modules in the packaged state when they were shipped from Allvision technology Inc.) At that time, be careful not to let water drops adhere to the packages or bags nor let dewing occur with them. If electric current is applied when water drops are adhering to the surface of the OEL display module, when the OEL display module is being dewed or when it is placed under high humidity environments, the electrodes may be corroded and be careful about the above. 8.3 Designing Precautions 1) 2) 3) 4) 5) 6) 7) 8) The absolute maximum ratings are the ratings which cannot be exceeded for OEL display module, and if these values are exceeded, panel damage may be happen. To prevent occurrence of malfunctioning by noise, pay attention to satisfy the V IL and V IH specifications and, at the same time, to make the signal line cable as short as possible. We recommend you to install excess current preventive unit (fuses, etc.) to the power circuit (V DD ). (Recommend value: 0.5A) Pay sufficient attention to avoid occurrence of mutual noise interference with the neighboring devices. As for EMI, take necessary measures on the equipment side basically. When fastening the OEL display module, fasten the external plastic housing section. If power supply to the OEL display module is forcibly shut down by such errors as taking out the main battery while the OEL display panel is in operation, we cannot guarantee the quality of this OEL display module. The electric potential to be connected to the rear face of the IC chip should be as follows: SSD1306 * Connection (contact) to any other potential than the above may lead to rupture of the IC. 8.4 Precautions when disposing of the OEL display modules 1) Request the qualified companies to handle industrial wastes when disposing of the OEL display modules. Or, when burning them, be sure to observe the environmental and hygienic laws and regulations. 8.5 Other Precautions 1) 2) 3) 4) When an OEL display module is operated for a long of time with fixed pattern may remain as an after image or slight contrast deviation may occur. Nonetheless, if the operation is interrupted and left unused for a while, normal state can be restored. Also, there will be no problem in the reliability of the module. To protect OEL display modules from performance drops by static electricity rapture, etc., do not touch the following sections whenever possible while handling the OEL display modules. * Pins and electrodes * Pattern layouts such as the FPC With this OEL display module, the OEL driver is being exposed. Generally speaking, semiconductor elements change their characteristics when light is radiated according to the principle of the solar battery. Consequently, if this OEL driver is exposed to light, malfunctioning may occur. * Design the product and installation method so that the OEL driver may be shielded from light in actual usage. * Design the product and installation method so that the OEL driver may be shielded from light during the inspection processes. Although this OEL display module stores the operation state data by the commands and the indication data, when excessive external noise, etc. enters into the module, the internal status may 35 Unvision technology Inc. 5) Ver:A be changed. It therefore is necessary to take appropriate measures to suppress noise generation or to protect from influences of noise on the system design. We recommend you to construct its software to make periodical refreshment of the operation statuses (re-setting of the commands and re-transference of the display data) to cope with catastrophic noise. Warranty: The warranty period shall last twelve (12) months from the date of delivery. Buyer shall be completed to assemble all the processes within the effective twelve (12) months. WiseChip Semiconductor Inc. shall be liable for replacing any products which contain defective material or process which do not conform to the product specification, applicable drawings and specifications during the warranty period. All products must be preserved, handled and appearance to permit efficient handling during warranty period. The warranty coverage would be exclusive while the returned goods are out of the terms above. Notice: No part of this material may be reproduces or duplicated in any form or by any means without the written permission of Allvision technology Inc. Allvision technology Inc. reserves the right to make changes to this material without notice. Allvision technology Inc. does not assume any liability of any kind arising out of any inaccuracies contained in this material or due to its application or use in any product or circuit and, further, there is no representation that this material is applicable to products requiring high level reliability, such as, medical products. Moreover, no license to any intellectual property rights is granted by implication or otherwise, and there is no representation or warranty that anything made in accordance with this material will be free from any patent or copyright infringement of a third party. This material or portions thereof may contain technology or the subject relating to strategic products under the control of Foreign Exchange and Foreign Trade Law of Taiwan and may require an export license from the Ministry of International Trade and Industry or other approval from another government agency. 36
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