OPA2277UAM/TR

OPA277OPA2277/OPA4277 High Precision Operational Amplifiers 1 Features • • • • • • • • • 1 OPAx277 series operational amplifiers operate from ±2-V to ±18-V supplies with excellent performance. Unlike most operational amplifiers which are specified at only one supply voltage, the OPAx277 series is specified for real-world applications; a single limit applies over the ±5-V to ±15-V supply range. High performance is maintained as the amplifiers swing to their specified limits. Because the initial offset voltage (±20 μV maximum) is so low, user adjustment is usually not required. However, the single version (OPA277) provides external trim pins for special applications. Ultralow Offset Voltage: 10 μV Ultralow Drift: ±0.1 μV/°C High Open-Loop Gain: 134 dB High Common-Mode Rejection: 140 dB High Power Supply Rejection: 130 dB Low Bias Current: 1-nA maximum Wide Supply Range: ±2 V to ±18 V Low Quiescent Current: 800 μA/amplifier Single, Dual, and Quad Versions OPA277 operational amplifiers are easy to use and free from phase inversion and the overload problems found in some other operational amplifiers. They are stable in unity gain and provide excellent dynamic behavior over a wide range of load conditions. Dual and quad versions feature completely independent circuitry for lowest crosstalk and freedom from interaction, even when overdriven or overloaded. 2 Applications • • • • • • • Transducer Amplifiers Bridge Amplifiers Temperature Measurements Strain Gage Amplifiers Precision Integrators Battery-Powered Instruments Test Equipment 0.1 Hz to 10 Hz Noise 3 Description Noise signal is bandwidth limited to lie between 0.1Hz and 10Hz. 50nV/div The OPAx277 series precision operational amplifiers replace the industry standard OPA177. They offer improved noise, wider output voltage swing, and are twice as fast with half the quiescent current. Features include ultralow offset voltage and drift, low bias current, high common-mode rejection, and high power supply rejection. Single, dual, and quad versions have identical specifications, for maximum design flexibility. 1s/div ORDERING INFORMATION DEVICE Package Type MARKING Packing Packing Qty OPA277UN DIP8L A277U TUBE 2000pcs/box OPA2277UN DIP8L A2277U TUBE 2000pcs/box OPA4277UN DIP14L OPA4277U TUBE 1000pcs/box OPA277UM/TR SOP8L A277U REEL 2500pcs/reel OPA2277UM/TR SOP8L A2277U REEL 2500pcs/reel OPA277UAM/TR SOP8L A277UA REEL 2500pcs/reel OPA2277UAM/TR SOP8L A2277UA REEL 2500pcs/reel OPA4277UM/TR SOP14L OPA4277U REEL 2500pcs/reel OPA277UDQ/TR DFN-8 A277U REEL 3000pcs/reel OPA2277UDQ/TR DFN-8 A2277U REEL 3000pcs/reel http://www.hgsemi.com.cn 1 2018 AUG OPA277OPA2277/OPA4277 4 Pin Configuration and Functions OPA277 DQ Package 8-Pin DFN Top View OPA277N and M Packages 8-Pin PDIP and SOIC Top View Offset Trim 1 8 Offset Trim –In 2 7 V+ +In 3 6 Output V– 4 5 NC(1) Offset Trim 1 Pin 1 Indicator 8 Offset Trim 7 V+ −In 2 +In 3 6 Output V− 4 5 NC Thermal Pad on Bottom (Connect to V−) Pin Functions: OPA277 PIN NO. I/O NAME DESCRIPTION 1 Offset Trim I Input offset voltage trim (leave floating if not used) 2 –In I Inverting input 3 +In I 4 V– — 5 NC — No internal connection (can be left floating) 6 Output O Output Noninverting input Negative (lowest) power supply 7 V+ — Positive (highest) power supply 8 Offset Trim — Input offset voltage trim (leave floating if not used) OPA2277 DQ Package 8-Pin QFN Top View OPA2277N and M Packages 8-Pin PDIP and SOIC Top View Out A –In A 1 2 +In A 3 V– 4 8 A B Out A V+ 7 Out B 6 –In B 5 +In B 1 Pin 1 Indicator 8 Out B 7 V+ −In A 2 +In A 3 6 −In B V− 4 5 +In B Thermal Pad on Bottom (Connect to V−) Pin Functions: OPA2277 PIN I/O DESCRIPTION NAME PDIP, SOIC NO. DFN NO. Out A 1 1 O Output channel A –In A 2 2 I Inverting input channel A +In A 3 3 I Noninverting input channel A V– 4 4 — +In B 5 5 I Noninverting input channel B –In B 6 6 I Inverting input channel B Out B 7 8 O Output channel B V+ 8 7 — Positive (highest) power supply http://www.hgsemi.com.cn Negative (lowest) power supply 2 2018 AUG OPA277OPA2277/OPA4277 OPA4277N and M Packages 14 Pins PDIP and SOIC Top View Out A 1 14 Out D –In A 2 13 –In D A D +In A 3 12 +In D V+ 4 11 V– +In B 5 10 +In C B C –In B 6 9 –In C Out B 7 8 Out C Pin Functions: OPA4277 PIN I/O DESCRIPTION NO. NAME 1 Out A O Output channel A 2 –In A I Inverting input channel A 3 +In A I Noninverting input channel A 4 V+ — 5 +In B I Noninverting input channel B 6 –In B I Inverting input channel B Positive (highest) power supply 7 Out B O Output channel B 8 Out C O Output channel C 9 –In C I Inverting input channel C 10 +In C I Noninverting input channel C 11 V– — 12 +In D I Noninverting input channel D 13 –In D I Inverting input channel D 14 Out D O Output channel D http://www.hgsemi.com.cn Negative (lowest) power supply 3 2018 AUG OPA277OPA2277/OPA4277 5 Specifications 5.1 Absolute Maximum Ratings over operating free-air temperature range (unless otherwise noted) (1) MIN MAX UNIT 36 V (V+) +0.7 V Supply voltage, Vs = (V+) – (V–) Input voltage (V–) –0.7 Output short-circuit (2) Continuous Operating temperature –20 85 °C Junction temperature 150 °C Lead temperature 300 °C 125 °C Storage temperature, Tstg (1) (2) –20 Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. Short-circuit to ground, one amplifier per package. 5.2 ESD Ratings VALUE Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001 V(ESD) (1) (2) Electrostatic discharge (1) UNIT ±2000 Charged-device model (CDM), per JEDEC specification JESD22C101 (2) ±500 V JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 5.3 Recommended Operating Conditions over operating free-air temperature range (unless otherwise noted) Supply voltage, Vs = (V+) – (V–) Specified temperature MIN NOM MAX 4 (±2) 30 (±15) 36 (±18) V +85 °C –20 UNIT 5.4 Thermal Information for OPA277 OPA277 THERMAL METRIC (1) N (PDIP) RθJA Junction-to-ambient thermal resistance 49.2 RθJC(top) Junction-to-case (top) thermal resistance 39.4 RθJB Junction-to-board thermal resistance ψJT Junction-to-top characterization parameter ψJB RθJC(bot) M (SOIC) DQ(QFN) UNIT 110.1 40.7 °C/W 52.2 41.3 °C/W 26.4 52.3 16.7 °C/W 15.4 10.4 0.6 °C/W Junction-to-board characterization parameter 26.3 51.5 16.9 °C/W Junction-to-case (bottom) thermal resistance — — 3.3 °C/W 8 PINS (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 5.5 Thermal Information for OPA2277 OPA2277 THERMAL METRIC (1) N (PDIP) RθJA Junction-to-ambient thermal resistance 47.2 RθJC(top) Junction-to-case (top) thermal resistance 36.0 M (SOIC) DQ (DFN) UNIT 107.4 39.3 °C/W 45.8 36.9 °C/W 8 PINS (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. http://www.hgsemi.com.cn 4 2018 AUG OPA277OPA2277/OPA4277 Thermal Information for OPA2277(continued) OPA2277 THERMAL METRIC (1) N (PDIP) M (SOIC) DQ (DFN) UNIT 8 PINS RθJB Junction-to-board thermal resistance 24.4 47.9 15.4 °C/W ψJT Junction-to-top characterization parameter 13.4 5.7 0.4 °C/W ψJB Junction-to-board characterization parameter 24.3 47.3 15.6 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance — — 2.2 °C/W 5.6 Thermal Information for OPA4277 OPA4277 THERMAL METRIC (1) N (SOIC) M (PDIP) UNIT 14 PINS RθJA Junction-to-ambient thermal resistance 67.0 66.3 °C/W RθJC(top) Junction-to-case (top) thermal resistance 24.1 20.5 °C/W RθJB Junction-to-board thermal resistance 22.5 26.8 °C/W ψJT Junction-to-top characterization parameter 2.2 2.1 °C/W ψJB Junction-to-board characterization parameter 22.1 26.2 °C/W RθJC(bot) Junction-to-case (bottom) thermal resistance — — °C/W (1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report, SPRA953. 5.7 Electrical Characteristics for OPAx277U, and OPAx277UA At TA = 25°C, and RL = 2 kΩ, unless otherwise noted OPA277UA OPA2277UA OPA4277UA OPA277U OPA2277U TEST CONDITIONS PARAMETER MIN (1) MAX ±10 ±20 TYP MIN UNIT (1) MAX ±20 ±50 TYP OFFSET VOLTAGE V0S Input Offset Voltage OPA277U (high-grade, single) Input Offset Voltage Over Temperature OPA2277U (high-grade, dual) µV ±30 TA = –20°C to 85°C ±50 µV All Versions ±100 AIDRM Versions OPA277U (high-grade, single) dV0S/dT Input Offset Voltage Drift OPA2277U (high-grade, dual) TA = –20°C to 85°C ±0.1 ±0.15 ±0.1 ±0.25 All AIDRM Versions ±0.15 vs Time Input Offset Voltage: (all models) vs Power Supply (PSRR) Channel Separation (dual, quad) (1) (2) µV/°C 0.2 VS = ±2 V to ±18 V ±0.3 ±0.5 See (2) See (2) ±1 µV/mo ±1 µV/V TA = –20°C to 85°C ±0.5 DC 0.1 ±1 See (2) µV/V VS = ±15 V Specifications are the same as OPA277U http://www.hgsemi.com.cn 5 2018 AUG OPA277OPA2277/OPA4277 Electrical Characteristics for OPAx277U, and OPAx277UA(continued) At TA = 25°C, and RL = 2 kΩ, unless otherwise noted PARAMETER OPA277UA OPA2277UA OPA4277UA OPA277U OPA2277U TEST CONDITIONS MIN TYP (1) MAX ±1 MIN UNIT TYP (1) MAX See (2) ±2.8 INPUT BIAS CURRENT IB Input Bias Current TA = –20°C to 85°C ±0.5 IOS Input Offset Current TA = –20°C to 85°C ±0.5 ±2 ±4 ±1 See (2) ±2.8 ±2 ±4 nA nA NOISE Input Voltage Noise, f = 0.1 to 10 Hz en in Input Voltage Noise Density 0.22 See (2) (2) f = 10 Hz 12 See f = 100 Hz 8 See (2) (2) f = 1 kHz 8 See f = 10 kHz 8 See (2) See (2) Current Noise Density, f = 1 kHz 0.2 µVPP nV/√Hz pA/√Hz INPUT VOLTAGE RANGE VCM CMRR Common-Mode Voltage Range Common-Mode Rejection (V–)+2 VCM = (V–) +2 V to (V+) –2 V 130 TA = –20°C to 85°C 128 (V+)–2 140 See (2) 115 See See (2) V (2) dB 115 INPUT IMPEDANCE Differential 100 || 3 Common-Mode See (2) MΩ || pF GΩ || pF VCM = (V–) +2 V to (V+) –2 V 250 || 3 See (2) VO = (V–)+0.5 V to (V+)–1.2 V, RL = 10 kΩ 140 See (2) OPEN-LOOP GAIN AOL Open-Loop Voltage Gain dB VO = (V–)+1.5 V to (V+)–1.5 V, RL = 2 kΩ 126 VO = (V–)+1.5 V to (V+)–1.5 V, RL = 2 kΩ 134 126 See (2) See (2) See (2) dB TA = –20°C to 85°C FREQUENCY RESPONSE GBW Gain-Bandwidth Product SR Slew Rate See (2) MHz See (2) V/µs VS = ±15 V, G = 1, 10-V Step 14 See (2) 16 See (2) Overload Recovery Time VIN × G = VS 3 See (2) Total Harmonic Distortion + Noise 1 kHz, G = 1, VO = 3.5 Vrms See (2) 0.1% Settling Time THD+N 1 0.8 0.01% http://www.hgsemi.com.cn 0.002% 6 µs µs 2018 AUG OPA277OPA2277/OPA4277 Electrical Characteristics for OPAx277U, and OPAx277UA (continued) At TA = 25°C, and RL = 2 kΩ, unless otherwise noted PARAMETER OPA277x OPA2277x OPA4277x OPA277N,M OPA2277N,M TEST CONDITIONS MIN TYP (1) MAX MIN TYP UNIT (1) MAX OUTPUT VO Voltage Output ISC RL = 10 kΩ (V–)+0.5 (V+)–1.2 See (2) See (2) TA = –20°C to +85°C (V–)+0.5 (V+)–1.2 See (2) See (2) RL = 2 kΩ (V–)+1.5 (V+)–1.5 See (2) See (2) TA = –20°C to +85°C (V–)+1.5 (V+)–1.5 See (2) See (2) Short-Circuit Current ±35 CLOAD Capacitive Load Drive See ZO Open-loop output impedance f = 1 MHz V See (2) mA See (2) Ω (3) 40 POWER SUPPLY VS Specified Voltage Range ±5 Operating Voltage Range ±2 IO = 0 IQ ±15 Quiescent Current (per amplifier) ±18 ±790 TA = –20°C to 85°C See (2) See (2) ±825 See ±900 (2) See (2) V See (2) V See (2) See (2) µA TEMPERATURE RANGE (3) Specified Range –20 85 See (2) See (2) °C Operating Range –20 125 See (2) See (2) °C See Typical Characteristics 6.8 Electrical Characteristics for OPAx277UDQ At TA = 25°C, and RL = 2 kΩ, unless otherwise noted PARAMETER TEST CONDITIONS OPA277UDQ OPA2277UDQ MIN UNIT TYP (1) MAX ±35 ±100 OFFSET VOLTAGE V0S Input Offset Voltage µV OPA277U (high-grade, single) Input Offset Voltage Over Temperature OPA2277U dual) (high-grade, TA = –20°C to 85°C µV All Versions AIDRM Versions ±165 OPA277U (high-grade, single) dV0S/dT Input Offset Voltage Drift OPA2277U (high-grade, dual) TA = –20°C to 85°C All Versions ±0.15 vs Time Input Offset Voltage: (all models) vs Power Supply (PSRR) Channel Separation (dual, quad) (1) (2) µV/°C VS = ±2 V to ±18 V See (2) See (2) TA = –20°C to 85°C DC ±1 µV/mo ±1 ±1 See (2) µV/V µV/V VS = ±15 V Specifications are the same as OPA277U http://www.hgsemi.com.cn 7 2018 AUG OPA277OPA2277/OPA4277 Electrical Characteristics for OPAx277UDQ (continued) At TA = 25°C, and RL = 2 kΩ, unless otherwise noted PARAMETER OPA277UDQ OPA2277UDQ TEST CONDITIONS MIN TYP (1) UNIT MAX INPUT BIAS CURRENT IB Input Bias Current TA = –20°C to 85°C IOS Input Offset Current TA = –20°C to 85°C ±2.8 ±4 ±2.8 ±4 nA nA NOISE See (2) f = 10 Hz See (2) f = 100 Hz See (2) f = 1 kHz See (2) f = 10 kHz See (2) See (2) Input Voltage Noise, f = 0.1 to 10 Hz en in Input Voltage Noise Density Current Noise Density, f = 1 kHz µVPP nV/√Hz pA/√Hz INPUT VOLTAGE RANGE VCM CMRR Common-Mode Voltage Range Common-Mode Rejection See (2) VCM = (V–) +2 V to (V+) –2 V 115 TA = –20°C to 85°C 115 See (2) V See (2) See (2) MΩ || pF VCM = (V–) +2 V to (V+) –2 V See (2) GΩ || pF VO = (V–)+0.5 V to (V+)–1.2 V, RL = 10 kΩ See (2) See (2) dB INPUT IMPEDANCE Differential Common-Mode OPEN-LOOP GAIN AOL Open-Loop Voltage Gain VO = (V–)+1.5 V to (V+)–1.5 V, RL = 2 kΩ VO = (V–)+1.5 V to (V+)–1.5 V, RL = 2 kΩ dB See (2) See (2) dB TA = –20°C to 85°C FREQUENCY RESPONSE GBW Gain-Bandwidth Product See (2) MHz SR Slew Rate See (2) V/µs VS = ±15 V, G = 1, 10-V Step See (2) See (2) Overload Recovery Time VIN × G = VS See (2) Total Harmonic Distortion + Noise 1 kHz, G = 1, VO = 3.5 Vrms See (2) 0.1% Settling Time THD+N 0.01% µs µs OUTPUT See (2) See (2) See (2) See (2) RL = 2 kΩ See (2) See (2) TA = –20°C to +85°C See (2) See (2) RL = 10 kΩ VO Voltage Output ISC Short-Circuit Current CLOAD Capacitive Load Drive ZO Open-loop output impedance http://www.hgsemi.com.cn TA = –20°C to +85°C f = 1 MHz 8 V See (2) mA See (2) Ω 2018 AUG OPA277OPA2277/OPA4277 Electrical Characteristics for OPAx277UDQ (continued) At TA = 25°C, and RL = 2 kΩ, unless otherwise noted PARAMETER OPA277UDQ OPA2277UDQ TEST CONDITIONS MIN TYP (1) UNIT MAX POWER SUPPLY VS Specified Voltage Range Operating Voltage Range IQ Quiescent Current (per amplifier) See (2) See (2) V See (2) See (2) V See (2) See (2) IO = 0 See TA = –20°C to 85°C (2) µA TEMPERATURE RANGE Specified Range Operating Range http://www.hgsemi.com.cn 9 See (2) See (2) See (2) °C See (2) °C 2018 AUG OPA277OPA2277/OPA4277 6.9 Typical Characteristics At TA = 25°C, VS = ±15 V, and RL = 2 kΩ, unless otherwise noted. 140 140 G 120 CL = 0 CL = 1500pF 0 –60 φ 60 –90 40 –120 20 –150 0 –180 PSR, CMR (dB) 80 +PSR –PSR –30 Phase (°) AOL (dB) 100 120 100 80 CMR 60 40 20 –20 0 0.1 1 10 100 1k 10k 100k 1M 10M 0.1 1 10 Frequency (Hz) 100 1k 10k 100k 1M Frequency (Hz) Figure 1. Open-Loop Gain and Phase vs Frequency Figure 2. Power Supply and Common-Mode Rejection vs Frequency INPUT NOISE AND CURRENT NOISE SPECTRAL DENSITY vs FREQUENCY Noise signal is bandwidth limited to lie between 0.1Hz and 10Hz. Current Noise 50nV/div Voltage Noise (nV/√Hz) Current Noise (fA/√Hz) 1000 100 Voltage Noise 10 1 1 0.1 10 100 1k 1s/div Frequency (Hz) Figure 3. Input Noise and Current Noise Spectral Density vs Frequency Figure 4. Input Noise Voltage vs Time 140 1 120 THD+Noise (%) Channel Separation (dB) VOUT = 3.5Vrms 100 Dual and quad devices. G = 1, all channels. Quad measured channel A to D or B to C —other combinations yield similar or improved rejection. 80 60 0.1 G = 10, RL = 2kΩ, 10kΩ 0.01 G = 1, RL = 2kΩ, 10kΩ 0.001 40 10 100 1k 10k 100k 10 1M 1k 10k 100k Frequency (Hz) Frequency (Hz) Figure 6. Total Harmonic Distortion + Noise vs Frequency Figure 5. Channel Separation vs Frequency http://www.hgsemi.com.cn 100 10 2018 AUG OPA277OPA2277/OPA4277 Typical Characteristics (continued) At TA = 25°C, VS = ±15 V, and RL = 2 kΩ, unless otherwise noted. 35 16 Typical distribution of packaged units. Single, dual, and quad included. 12 10 8 6 4 25 20 15 10 5 2 0 0 0 – 50– 45– 40– 35– 30– 25– 20– 15– 10– 5 0 5 10 15 20 25 30 35 40 45 50 Offset Voltage (µV) 0.1 0.2 0.3 0.5 0.6 0.7 0.8 0.9 1.0 Figure 8. Offset Voltage Drift Production Distribution 3 160 2 150 CMR AOL, CMR, PSR (dB) 1 0 –1 140 AOL 130 PSR 120 110 –2 100 –75 –3 15 30 45 60 75 90 105 120 –50 –25 0 25 50 75 100 125 Temperature ( °C) Time from Power Supply Turn-On (s) Figure 9. Warm-Up Offset Voltage Drift Figure 10. AOL, CMR, PSR vs Temperature 1000 100 4 950 90 3 900 80 Quiescent Current (µA) 5 2 1 0 –1 –2 Curves represent typical production units. –3 –4 –75 –50 –25 0 25 50 75 100 125 60 50 750 –ISC 700 40 +ISC 650 30 600 20 550 10 0 –50 –25 0 25 50 75 100 125 Temperature (°C) Temperature ( °C) Figure 12. Quiescent Current and Short-Circuit Current vs Temperature Figure 11. Input Bias Current vs Temperature http://www.hgsemi.com.cn ±I Q 800 500 –75 –5 70 850 Short-Circuit Current (mA) 0 Input Bias Current (nA) 0.4 Offset Voltage (µV/°C) Figure 7. Offset Voltage Production Distribution Offset Voltage Change (µV) Typical distribution of packaged units. Single, dual, and quad included. 30 Percent of Amplifiers (%) Percent of Amplifiers (%) 14 11 2018 AUG OPA277OPA2277/OPA4277 Typical Characteristics (continued) At TA = 25°C, VS = ±15 V, and RL = 2 kΩ, unless otherwise noted. 2.0 2.0 Curve shows normalized change in bias current with respect to VS = ±10V (+20V). Typical I B may range from –0.5nA to +0.5nA at V S = ±10V. 1.5 1.0 VS = ±5V 0.5 0.0 ∆IB (nA) ∆IB (nA) 1.0 Curve shows normalized change in bias current with respect to VCM = 0V. Typical I B may range from –05.nA to +0.5nA at V CM = 0V. 1.5 VCM = 0V 0.5 0.0 –0.5 –0.5 –1.0 –1.0 –1.5 –1.5 VS = ±15V –2.0 –2.0 0 5 10 15 20 25 30 35 40 –15 –10 Supply Voltage (V) Figure 13. Change in Input Bias Current vs Power Supply Voltage 5 10 15 100 10V step CL = 1500pF per amplifier Settling Time (µs) 900 800 700 50 0.01% 0.1% 20 600 10 500 0 ±5 ±10 ±15 ±20 ±1 ±10 Supply Voltage (V) ±100 Gain (V/V) Figure 15. Quiescent Current vs Supply Voltage Figure 16. Settling Time vs Closed-Loop Gain 30 (V+) (V+) – 1 Output Voltage Swing (V) VS = ±15V 25 Output Voltage (V PP) 0 Figure 14. Change in Input Bias Current vs Common-Mode Voltage 1000 Quiescent Current (µA) –5 Common-Mode Voltage (V) 20 15 10 VS = ±5V 5 –55°C (V+) – 2 (V+) – 3 125°C (V+) – 4 25°C (V+) – 5 (V–) + 5 25°C 125°C (V–) + 4 (V–) + 3 (V–) + 2 –55°C (V–) + 1 0 (V–) 1k 10k 100k 1M 0 Frequency (Hz) ±10 ±15 ±20 ±25 ±30 Output Current (mA) Figure 17. Maximum Output Voltage vs Frequency http://www.hgsemi.com.cn ±5 Figure 18. Output Voltage Swing vs Output Current 12 2018 AUG OPA277OPA2277/OPA4277 Typical Characteristics (continued) At TA = 25°C, VS = ±15 V, and RL = 2 kΩ, unless otherwise noted. 60 Gain = –1 50 Overshoot (%) 40 2V/div Gain = +1 30 20 Gain = ±10 10 0 10 100 1k 10k 100k 10µs/div Load Capacitance (pF) Figure 20. Large-Signal Step Response G = 1, CL = 1500 pF, VS = ±15 V 20mV/div 20mV/div Figure 19. Small-Signal Overshoot vs Load Capacitance 1µs/div 1µs/div Figure 21. Small-Signal Step Response G= +1, CL = 0, VS = ±15 V Figure 22. Small-Signal Step Response G= 1, CL = 1500 pF, VS = ±15 V 100 70 50 Impedance (:) 30 20 10 7 5 3 2 1 1k 10k 100k Frequency (Hz) 1M Figure 23. Open-Loop Output Impedance VS = ±15 V http://www.hgsemi.com.cn 13 2018 AUG OPA277OPA2277/OPA4277 7 Detailed Description 7.1 Overview The OPAx277series precision operational amplifiers replace the industry standard OPA177.They offer improved noise, wider output voltage swing, and are twice as fast with half the quiescent current. Features include ultralow offset voltage and drift, low bias current, high common-mode rejection, and high power supply rejection. Single, dual, and quad versions have identical specifications, for maximum design flexibility. 7.2 Functional Block Diagram Input Offset Adjust (OPA277 only) +IN -IN + ± Input Offset Adjust (OPA277 only) Output Compensation 7.3 Feature Description The OPAx277series is unity-gain stable and free from unexpected output phase reversal, making it easy to use in a wide range of applications. Applications with noisy or high-impedance power supplies may require decoupling capacitors close to the device pins. In most cases 0.1-μF capacitors are adequate. The OPAx277 series has low offset voltage and drift. To achieve highest performance, the circuit layout and mechanical conditions should be optimized. Offset voltage and drift can be degraded by small thermoelectric potentials at the operational amplifier inputs. Connections of dissimilar metals generate thermal potential, which can degrade the ultimate performance of the OPAx277 series. These thermal potentials can be made to cancel by assuring that they are equal in both input terminals. • Keep the thermal mass of the connections to the two input terminals similar • Locate heat sources as far as possible from the critical input circuitry • Shield operational amplifier and input circuitry from air currents, such as cooling fans 7.3.1 Operating Voltage OPAx277series operational amplifiers operate from ±2-V to ±18-V supplies with excellent performance. Unlike most operational amplifiers, which are specified at only one supply voltage, the OPA277series is specified for real-world applications; a single limit applies over the ±5-V to ±15-V supply range. This allows a customer operating at VS = ±10 V to have the same assured performance as a customer using ±15-V supplies. In addition, key parameters are assured over the specified temperature range, –20°C to 85°C. Most behavior remains unchanged through the full operating voltage range (±2 V to ±18 V). Parameters which vary significantly with operating voltage or temperature are shown in Typical Characteristics. 7.3.2 Offset Voltage Adjustment The OPAx277series is laser-trimmed for low offset voltage and drift, so most circuits do not require external adjustment. However, offset voltage trim connections are provided on pins 1 and 8. Offset voltage can be adjusted by connecting a potentiometer, as shown in Figure 24. Only use this adjustment to null the offset of the operational amplifier. This adjustment should not be used to compensate for offsets created elsewhere in a system, because this can introduce additional temperature drift. http://www.hgsemi.com.cn 14 2018 AUG OPA277OPA2277/OPA4277 Feature Description (continued) V+ Trim Range: Exceeds Offset Voltage Specification 0.1µF 20kΩ 7 1 2 8 3 0.1µF OPA277 4 6 OPA277 Hsingleopamponly. Use offset adjust pins only to null offset voltage of op amp—see text. V– Figure 24. OPA277 Offset Voltage Trim Circuit 7.3.3 Input Protection The inputs of the OPAx277 series are protected with 1-kΩ series input resistors and diode clamps. The inputs can withstand ±30-V differential inputs without damage. The protection diodes conduct current when the inputs are over-driven. This may disturb the slewing behavior of unity-gain follower applications, but will not damage the operational amplifier. 1 k + 1 k ± Figure 25. OPAx277 Input Protection 7.3.4 Input Bias Current Cancellation The input stage base current of the OPAx277series is internally compensated with an equal and opposite cancellation circuit. The resulting input bias current is the difference between the input stage base current and the cancellation current. This residual input bias current can be positive or negative. When the bias current is canceled in this manner, the input bias current and input offset current are approximately the same magnitude. As a result, it is not necessary to use a bias current cancellation resistor, as is often done with other operational amplifiers (see Figure 26). A resistor added to cancel input bias current errors may actually increase offset voltage and noise. R2 R2 R1 R1 Op Amp OPA277 RB = R2 || R1 No bias current cancellation resistor (see text) (a) (b) Conventional op amp with external bias current cancellation resistor. OPA277HG with no external bias current cancellation resistor. Figure 26. Input Bias Current Cancellation http://www.hgsemi.com.cn 15 2018 AUG OPA277OPA2277/OPA4277 Feature Description (continued) 7.3.5 EMI Rejection Ratio (EMIRR) The electromagnetic interference (EMI) rejection ratio, or EMIRR, describes the EMI immunity of operational amplifiers. An adverse effect that is common to many operational amplifiers is a change in the offset voltage as a result of RF signal rectification. An operational amplifier that is more efficient at rejecting this change in offset as a result of EMI has a higher EMIRR and is quantified by a decibel value. Measuring EMIRR can be performed in many ways, but this report provides the EMIRR IN+, which specifically describes the EMIRR performance when the RF signal is applied to the noninverting input pin of the operational amplifier. In general, only the noninverting input is tested for EMIRR for the following three reasons: 1. Operational amplifier input pins are known to be the most sensitive to EMI, and typically rectify RF signals better than the supply or output pins. 2. The noninverting and inverting operational amplifier inputs have symmetrical physical layouts and exhibit nearly matching EMIRR performance. 3. EMIRR is easier to measure on noninverting pins than on other pins because the noninverting input terminal can be isolated on a printed circuit board (PCB). This isolation allows the RF signal to be applied directly to the noninverting input terminal with no complex interactions from other components or connecting PCB traces. 120 EMIRR IN+ (db) PRF = -10 dbm VS = r2.5 V 100 VCM = 0 V 80 60 40 20 0 10 100 1k Frequency (MHz) 10k Figure 27. OPA277 EMIRR IN+ vs Frequency If available, any dual and quad operational amplifier device versions have nearly similar EMIRR IN+ performance. The OPA277unity-gain bandwidth is 1 MHz. EMIRR performance below this frequency denotes interfering signals that fall within the operational amplifier bandwidth. http://www.hgsemi.com.cn 16 2018 AUG OPA277OPA2277/OPA4277 Feature Description (continued) Table 1 shows the EMIRR IN+ values for the OPA277at particular frequencies commonly encountered in realworld applications. Applications listed in Table 1 may be centered on or operated near the particular frequency shown. This information may be of special interest to designers working with these types of applications, or working in other fields likely to encounter RF interference from broad sources, such as the industrial, scientific, and medical (ISM) radio band. Table 1. OPA277 EMIRR IN+ for Frequencies of Interest FREQUENCY APPLICATION/ALLOCATION EMIRR IN+ 400 MHz Mobile radio, mobile satellite/space operation, weather, radar, UHF 59.1 dB 900 MHz GSM, radio com/nav./GPS (to 1.6 GHz), ISM, aeronautical mobile, UHF 77.9 dB 1.8 GHz GSM, mobile personal comm. broadband, satellite, L-band 91.3 dB 2.4 GHz 802.11b/g/n, Bluetooth™, mobile personal comm., ISM, amateur radio/satellite, S-band 93.3 dB 3.6 GHz Radiolocation, aero comm./nav., satellite, mobile, S-band 105.9 dB 5.0 GHz 802.11a/n, aero comm./nav., mobile comm., space/satellite operation, C-band 107.5 dB 7.3.5.1 EMIRR IN+ Test Configuration Figure 28 shows the circuit configuration for testing the EMIRR IN+. An RF source is connected to the operational amplifier noninverting input terminal using a transmission line. The operational amplifier is configured in a unity gain buffer topology with the output connected to a low-pass filter (LPF) and a digital multimeter (DMM). Note that a large impedance mismatch at the operational amplifier input causes a voltage reflection; however, this effect is characterized and accounted for when determining the EMIRR IN+. The resulting dc offset voltage is sampled and measured by the multimeter. The LPF isolates the multimeter from residual RF signals that may interfere with multimeter accuracy. Refer to SBOA128 for more details. Ambient temperature: 25Û& +VS ± 50  Low-Pass Filter + RF source DC Bias: 0 V Modulation: None (CW) Frequency Sweep: 201 pt. Log -VS Not shown: 0.1 µF and 10 µF supply decoupling Sample / Averaging Digital Multimeter Figure 28. EMIRR IN+ Test Configuration Schematic 7.4 Device Functional Modes TheOPAx277 has a single functional mode and is operational when the power-supply voltage is greater than 4 V (±2 V). The maximum power supply voltage for the OPAx277 is 36 V (±18 V). http://www.hgsemi.com.cn 17 2018 AUG OPA277OPA2277/OPA4277 PACKAGE SOP8  

    Dimensions In Millimeters Symbol
Min
Max
Symbol
Min
Max
A 1.225 1.570 D 
  A1   Q  B
   a 
  b   C    C1  
 DIP8
   
 
    
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                   2018 AUG OPA277OPA2277/OPA4277 PACKAGE SOP14 Q A C C1 B D A1 a 0.25 b Dimensions In Millimeters Symbol： Min： Max： Symbol： Min： Max： A 1.225 1.570 D 0.400 0.950 A1 0.100 0.250 Q 0° 8° B 8.500 9.000 a 0.420 TYP C 5.800 6.250 b 1.270 TYP C1 3.800 4.000 DIP14         Dimensions In Millimeters Symbol：
http://www.hgsemi.com.cn 19 Min： Max： Symbol： Min： Max： A 6.100 6.680 L 0.500 0.800 B 18.940 19.560 L1 3.000 3.600 D 8.200 9.200 a 1.524 TYP D1 7.42 7.820 c 0.457 TYP E 3.100 3.550 d 2.540 TYP 2018 AUG OPA277OPA2277/OPA4277 PACKAGE ＤＦＮ－８ A A1 A1 D a F  Dimensions In Millimeters Symbol
http://www.hgsemi.com.cn 20 Min
Max
Symbol
Min
Max
A 3.900 4.100  0.230 0.380 A1 3.900 4.100 F 0.300 0.500 B 0.800 1.000 a D 0.000 0.050 0.80 TYP 2018 AUG OPA277OPA2277/OPA4277 Important statement: Huaguan Semiconductor Co,Ltd. reserves the right to change the products and services provided without notice. Customers should obtain the latest relevant information before ordering, and verify the timeliness and accuracy of this information. Customers are responsible for complying with safety standards and taking safety measures when using our products for system design and machine manufacturing to avoid potential risks that may result in personal injury or property damage. Our products are not licensed for applications in life support, military, aerospace, etc., so we do not bear the consequences of the application of these products in these fields. Our documentation is only permitted to be copied without any tampering with the content, so we do not accept any responsibility or liability for the altered documents. http://www.hgsemi.com.cn 21 2018 AUG