TPL9052 Series
500-mA High PSRR, Ultra-low Noise LDO
Features
Description
Input Voltage Range: 1.75 V to 5.5 V
The TPL9052 series products are 500-mA high PSRR,
ultra-low noise, low dropout linear regulators with
high output accuracy. The TPL9052 series products
support both fixed output voltage ranges from 0.9 V
to 5 V and is stable with 1 μF or larger ceramic output
capacitor.
Output Voltage Range: 0.9 V to 5 V
±2.5% Output Accuracy Over Line, Load
Regulation, and Operating Temperature Range
500 mA Maximum Output Current
Low Dropout Voltage: 150 mV typical at 500 mA
High PSRR:
− 82 dB at 1 kHz
− 88 dB at 10 kHz
− 61 dB at 100 kHz
− 45 dB at 1 MHz
8.6 μVRMS Output Voltage Noise
Excellent Transient Response
Stable with a 1 μF or Larger Ceramic Output
Capacitor
Output Reverse Current Protection
Output Shortage Protection
Over-Temperature and Over-Current Protection
Junction Temperature Range: −40°C to +125°C
Package Options:
− SOT23-5
The TPL9052 series products have high PSRR with
88 dB at 10 kHz and 8.6 μVRMS ultra-low noise.
These features make TPL9052 series products very
suitable for noise-sensitive applications with high
noise from previous stage power supply, such as
high-performance analog devices, or high-definition
imaging equipment.
The TPL9052 series products integrate protection
features: output reverse current protection, output
shortage protection, over-temperature protection and
overload protection. All these features significantly
improve the system reliability and simplify circuitry
design under different operating conditions.
The TPL9052 series products provide SOT23-5, and
DFN1X1-4 packages with guaranteed operating
junction temperature range (TJ) from −40°C to
+125°C.
− DFN1X1-4
Application
Portable and Battery-Powered Equipment
Mobile Phones and Tablets
Digital Cameras and Audio Devices Power
Supply
Video Surveillance
Typical Application Schematic
Input
CIN = 1µF
Off On
www.3peakic.com.cn
VOUT
VIN
COUT = 1µF
TPL9052
EN
Output
GND
1 / 21
Rev.A.1
TPL9052 Series
500-mA High PSRR, Ultra-low Noise LDO
Product Family Table
Order Number
Output Voltage (V)
Package
TPL905209-S5TR
0.9 V
SOT23-5
TPL905210-S5TR
1.0 V
SOT23-5
TPL905211-S5TR
1.1 V
SOT23-5
TPL905212-S5TR
1.2 V
SOT23-5
TPL905213-S5TR
1.3 V
SOT23-5
TPL905215-S5TR
1.5 V
SOT23-5
TPL905216-S5TR
1.6 V
SOT23-5
TPL905218-S5TR
1.8 V
SOT23-5
TPL905219-S5TR
1.9 V
SOT23-5
TPL905221-S5TR
2.1 V
SOT23-5
TPL905222-S5TR
2.2 V
SOT23-5
TPL905224-S5TR
2.4 V
SOT23-5
TPL905225-S5TR
2.5 V
SOT23-5
TPL905226-S5TR
2.6 V
SOT23-5
TPL905227-S5TR
2.7 V
SOT23-5
TPL905228-S5TR
2.8 V
SOT23-5
TPL905229-S5TR
2.9 V
SOT23-5
TPL905230-S5TR
3.0 V
SOT23-5
TPL905231-S5TR
3.1 V
SOT23-5
TPL905232-S5TR
3.2 V
SOT23-5
TPL905233-S5TR
3.3 V
SOT23-5
TPL905235-S5TR
3.5 V
SOT23-5
TPL905236-S5TR
3.6 V
SOT23-5
TPL905237-S5TR
3.7 V
SOT23-5
TPL905240-S5TR
4.0 V
SOT23-5
TPL905245-S5TR
4.5 V
SOT23-5
TPL905250-S5TR
5.0 V
SOT23-5
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2 / 21
Rev.A.1
TPL9052 Series
500-mA High PSRR, Ultra-low Noise LDO
Order Number
Output Voltage (V)
Package
TPL905209-DF1R
0.9 V
DFN1X1-4
TPL905210-DF1R
1.0 V
DFN1X1-4
TPL905211-DF1R
1.1 V
DFN1X1-4
TPL905212-DF1R
1.2 V
DFN1X1-4
TPL905213-DF1R
1.3 V
DFN1X1-4
TPL905215-DF1R
1.5 V
DFN1X1-4
TPL905216-DF1R
1.6 V
DFN1X1-4
TPL905218-DF1R
1.8 V
DFN1X1-4
TPL905219-DF1R
1.9 V
DFN1X1-4
TPL905221-DF1R
2.1 V
DFN1X1-4
TPL905222-DF1R
2.2 V
DFN1X1-4
TPL905224-DF1R
2.4 V
DFN1X1-4
TPL905225-DF1R
2.5 V
DFN1X1-4
TPL905226-DF1R
2.6 V
DFN1X1-4
TPL905227-DF1R
2.7 V
DFN1X1-4
TPL905228-DF1R
2.8 V
DFN1X1-4
TPL905229-DF1R
2.9 V
DFN1X1-4
TPL905230-DF1R
3.0 V
DFN1X1-4
TPL905231-DF1R
3.1 V
DFN1X1-4
TPL905232-DF1R
3.2 V
DFN1X1-4
TPL905233-DF1R
3.3 V
DFN1X1-4
TPL905235-DF1R
3.5 V
DFN1X1-4
TPL905236-DF1R
3.6 V
DFN1X1-4
TPL905237-DF1R
3.7 V
DFN1X1-4
TPL905240-DF1R
4.0 V
DFN1X1-4
TPL905245-DF1R
4.5 V
DFN1X1-4
TPL905250-DF1R
5.0 V
DFN1X1-4
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3 / 21
Rev.A.1
TPL9052 Series
500-mA High PSRR, Ultra-low Noise LDO
Table of Contents
Features .............................................................................................................................................................. 1
Application ......................................................................................................................................................... 1
Description ......................................................................................................................................................... 1
Typical Application Schematic ......................................................................................................................... 1
Product Family Table ......................................................................................................................................... 2
Revision History ................................................................................................................................................ 5
Pin Configuration and Functions ..................................................................................................................... 6
Pin Functions ................................................................................................................................................ 6
Specifications .................................................................................................................................................... 7
Absolute Maximum Ratings .......................................................................................................................... 7
ESD, Electrostatic Discharge Protection ...................................................................................................... 7
Recommended Operating Conditions .......................................................................................................... 7
Thermal Information ..................................................................................................................................... 7
Electrical Characteristics .............................................................................................................................. 8
Typical Performance Characteristics .......................................................................................................... 10
Detailed Description ........................................................................................................................................ 12
Overview..................................................................................................................................................... 12
Functional Block Diagram .......................................................................................................................... 12
Feature Description .................................................................................................................................... 12
Application and Implementation .................................................................................................................... 14
Application Information ............................................................................................................................... 14
Typical Application ...................................................................................................................................... 14
Layout ............................................................................................................................................................... 15
Layout Guideline......................................................................................................................................... 15
Tape and Reel Information .............................................................................................................................. 16
Package Outline Dimensions ......................................................................................................................... 17
SOT23-5 ..................................................................................................................................................... 17
DFN1X1-4................................................................................................................................................... 18
Order Information ............................................................................................................................................ 19
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4 / 21
Rev.A.1
TPL9052 Series
500-mA High PSRR, Ultra-low Noise LDO
Revision History
Date
Revision
2020-07-31
Rev.Pre.0
2021-11-15
Rev.A.0
Initial Released
2022-05-31
Rev.A.1
Removed WLCSP package
www.3peakic.com.cn
Notes
Preliminary Version
5 / 21
Rev.A.1
TPL9052 Series
500-mA High PSRR, Ultra-low Noise LDO
Pin Configuration and Functions
TPL9052 Series
TPL9052 Series
SOT23-5 Package
DFN1X1-4 Package
Top View
Top View
IN
1
GND
2
EN
3
5
OUT
IN
4
3
EN
Thermal
Pad
4
OUT
NC
1
2
GND
Pin Functions
Pin Name
Pin No.
I/O
Description
SOT23-5
DFN1X1-4
EN
3
3
I
Regulator enable pin. Drive EN high to turn on the regulator;
drive EN low to turn off the regulator. For automatic startup,
connect EN to IN directly.
GND
2
2
–
Ground reference pin. Connect GND pin to PCB ground plane
directly.
IN
1
4
I
Input voltage pin. Bypass IN to GND with a 1 μF or greater
capacitor.
NC
4
–
–
No connection.
OUT
5
1
O
Regulated output voltage pin. Bypass OUT to GND with a 1 μF or
greater capacitor.
(1) Thermal Pad MUST be connected to PCB ground plane directly.
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6 / 21
Rev.A.1
TPL9052 Series
500-mA High PSRR, Ultra-low Noise LDO
Specifications
Absolute Maximum Ratings
Parameter
Min
Max
Unit
IN, EN
−0.3
6
V
OUT
−0.3
6
V
TJ
Junction Temperature Range
−40
150
°C
TSTG
Storage Temperature Range
−65
150
°C
TL
Lead Temperature (Soldering 10 sec)
260
°C
(1) Stresses beyond the Absolute Maximum Ratings may permanently damage the device.
(2) All voltage values are with respect to GND.
ESD, Electrostatic Discharge Protection
Symbol
Parameter
Condition
HBM
Human Body Model ESD
CDM
Charged Device Model ESD
Minimum Level
Unit
ANSI/ESDA/JEDEC JS-001(1)
±6000
V
JS-002(2)
±1500
V
ANSI/ESDA/JEDEC
(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
Recommended Operating Conditions
Parameter
Min
Max
Unit
IN
1.75
5.5
V
EN
0
VIN
V
OUT
0
5.5
V
COUT
1
10
µF
0.001
0.1
Ω
−40
125
°C
0
400
mW
ESR of COUT
TJ
Junction Temperature Range
PD
Power Dissipation
Thermal Information
Package Type
θJA
θJC
Unit
SOT23-5
280
62
°C/W
DFN1X1-4
210
110
°C/W
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7 / 21
Rev.A.1
TPL9052 Series
500-mA High PSRR, Ultra-low Noise LDO
Electrical Characteristics
All test condition: VIN = VOUT(NOM) + 1 V, IOUT = 1 mA, CIN = 1 µF, COUT = 1 µF, −40°C ≤ TJ ≤ +125°C, unless
otherwise noted.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
5.5
V
Supply Input Voltage and Current
VIN
Input supply voltage
range
IGND
Ground pin current
IOUT = 0 mA
120
ISHDN
Shutdown current
EN = GND
0.02
1.75
µA
2
µA
1.2
VIN
V
0
0.4
V
2
µA
Enable Input Voltage and Current
VIH(EN)
EN logic-input high
level (enable)
VIL(EN)
EN logic-input low level
(disable)
IEN
EN pin leakage current
VEN = 5 V
1
Regulated Output Voltage and Current
VOUT
ΔVOUT
VDO
(1)
Output voltage
accuracy
−40°C ≤ TJ ≤ +125°C, 0 mA ≤ IOUT ≤ 300 mA
−2%
2%
−40°C ≤ TJ ≤ +125°C, 0 mA ≤ IOUT ≤ 500 mA
−2.5%
2.5
%
Line regulation
VIN = VOUT(NOM) + 1 V to 5.5 V
1
mV
Load regulation
VIN = VOUT(NOM) + 1 V, IOUT = 1 mA to 500 mA
5
mV
VOUT = 3.3 V, IOUT = 100 mA
30
mV
VOUT = 3.3 V, IOUT = 300 mA
90
180
mV
VOUT = 3.3 V, IOUT = 500 mA
150
300
mV
500
mA
Dropout voltage
IOUT
Output voltage
VOUT in regulation
ICL
Output current limit
VOUT = 0.9 × VOUT(NOM)
ISC
Short-circuit current
limit
RDIS
Active output discharge
resistance
PSRR
Power supply rejection
ratio
VN
Output noise voltage
tSTR
Start-up time
0
800
mA
RLOAD = 20 mΩ, TA = 25°C
100
mA
VEN < VIL(EN)
290
Ω
IOUT = 20 mA, f = 100 Hz
82
dB
IOUT = 20 mA, f = 1 kHz
82
dB
IOUT = 20 mA, f = 10 kHz
88
dB
IOUT = 20 mA, f = 100 kHz
61
dB
IOUT = 20 mA, f = 1 MHz
45
dB
IOUT = 150 mA, BW = 10Hz to 100 kHz
8.6
VOUT reaches 95% of nominal output voltage after
EN = high
550
750
μVRM
S
μs
(1) Dropout voltage is the minimum input to output voltage differential needed to maintain regulation at a specified output
current and measure for VOUT(NOM) ≥ 1.8 V. In dropout, the output voltage will be equal to: VIN − VDROPOUT.
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8 / 21
Rev.A.1
TPL9052 Series
500-mA High PSRR, Ultra-low Noise LDO
Electrical Characteristics (Continued)
All test condition: VIN = VOUT(NOM) + 1 V, IOUT = 1 mA, CIN = 1 µF, COUT = 1 µF, −40°C ≤ TJ ≤ +125°C, unless
otherwise noted.
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
Temperature Range
TSD
Thermal shutdown temperature
165
ºC
Thermal shutdown hysteresis
15
ºC
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9 / 21
Rev.A.1
TPL9052 Series
500-mA High PSRR, Ultra-low Noise LDO
Typical Performance Characteristics
All test condition: VIN = VOUT(NOM) + 1 V, IOUT = 1 mA, CIN = 1 µF, COUT = 1 µF, −40°C ≤ TJ ≤ +125°C, unless
otherwise noted.
0.2
–40°C
25°C
85°C
125°C
Shutdown Current (µA)
Ground Current (µA)
300
200
100
EN = GND
25°C
0.15
0.1
0.05
VOUT = 2.8 V
0
0
3
3.5
4
4.5
5
5.5
0 0.5 1 1.5 2 2.5 3 3.5 4 4.5 5 5.5
Supply Voltage (V)
Supply Voltage (V)
Figure 1 Quiescent Current vs Input Voltage
Figure 2 Quiescent Current vs Input Voltage
3.350
3.310
–40°C
25°C
–40°C
25°C
85°C
125°C
85°C
125°C
Output Voltage (V)
Output Voltage (V)
3.320
3.300
3.290
3.325
3.300
3.275
VOUT = 3.3 V
3.280
3.5
4
4.5
5
5.5
0
100
200
300
400
Supply Voltage (V)
Load Current (mA)
Figure 3 Line Regulation
Figure 4 Load Regulation
1.0
0.9
500
3.350
VOUT = 3.3 V
0.8
Output Voltage (V)
Line Regulation (mV)
VOUT = 3.3 V
3.250
0.7
0.6
0.5
0.4
0.3
0.2
0.1
0.0
3.325
10 mA
100 mA
200 mA
300 mA
500 mA
3.300
3.275
VOUT = 3.3 V
3.250
-40 -25 -10 5
20 35 50 65 80 95 110 125
-40 -25 -10 5 20 35 50 65 80 95 110 125
Ambient Temperature (°C)
Ambient Temperature (°C)
Figure 5 Line Regulation vs. Temperature
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Figure 6 Output Voltage vs. Temperature
10 / 21
Rev.A.1
TPL9052 Series
500-mA High PSRR, Ultra-low Noise LDO
Typical Performance Characteristics (Continued)
All test condition: VIN = VOUT(NOM) + 1 V, IOUT = 1 mA, CIN = 1 µF, COUT = 1 µF, −40°C ≤ TJ ≤ +125°C, unless
otherwise noted.
1
150
−40°C
25°C
85°C
125°C
VIH(EN)
Enable Threshold (V)
Dropout Voltage (mV)
200
100
50
0
VIL(EN)
0.9
0.8
0.7
0.6
0
100
200
300
400
500
-40 -25 -10 5
Load Current (mA)
Figure 7 Dropout Voltage vs Output Current
Figure 8 Enable Threshold vs. Temperature
1E+4
Noise Density (nV/sqrt(Hz))
120
100
PSRR(dB)
20 35 50 65 80 95 110 125
Ambient Temperature (°C)
80
60
IOUT = 1 mA
40
IOUT = 10 mA
IOUT = 100 mA
20
IOUT = 300 mA
0
IOUT = 100 mA
1E+3
1E+2
1E+1
1E+0
10
100
1K
10K
100K
1M
10
Frequency (Hz)
1K
10K
100K
Frequency (Hz)
Figure 10 Noise
Figure 9 PSRR
Output VPP = 21.766 mV
VIN = 3.9 V to 4.9 V
IOUT = 1 mA to 100 mA
Output VPP = 4.388 mV
Figure 11 Load Transient
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100
Figure 12 Line Transient
11 / 21
Rev.A.1
TPL9052 Series
500-mA High PSRR, Ultra-low Noise LDO
Detailed Description
Overview
The TPL9052 series products are 500-mA high PSRR, ultra-low noise, low dropout linear regulators with high
output accuracy. The TPL9052 series products support both fixed output voltage ranges from 0.9 V to 5 V is
stable with 1 μF or larger ceramic output capacitor.
The TPL9052 series products have high PSRR with 88 dB at 10 kHz and 8.6 μVRMS ultra-low noise. These
features make TPL9052 series products very suitable for noise-sensitive applications with high noise from
previous stage power supply, such as high-performance analog devices, or high-definition imaging equipment.
The TPL9052 series products integrate protection features: output reverse current protection, output shortage
protection, over-temperature protection and overload protection. All these features significantly improve the
system reliability and simplify circuitry design under different operating conditions.
Functional Block Diagram
Reverse Curre nt
Pro tection
IN
OUT
Curren t Co ntr ol
Thermal Control
Regula tor
Control
EA
+
VREF
RDIS
–
EN
Ena ble Co ntro l
GND
Figure 13 Functional Block Diagram
Feature Description
Enable (EN)
The enable pin (EN) is active high. Connect this pin to the GPIO of an external processor or digital logic control
circuit to enable and disable the device. Or connect this pin to the IN pin for self-bias applications.
Operating Voltage Range (VIN)
The TPL9052 series do not include any dedicated UVLO circuitry. The output voltage of the TPL9052 series is
not well regulated until VIN exceeds 1.75 V or (VOUT + VDO), whichever is greater.
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12 / 21
Rev.A.1
TPL9052 Series
500-mA High PSRR, Ultra-low Noise LDO
Regulated Output Voltage (VOUT)
The TPL9052 series are available in fixed voltage versions of 0.9 V to 5 V. When the input voltage is higher than
VOUT(NOM) + 1, output pin is the regulated output based on the selected voltage version. When the input voltage
falls below VOUT(NOM) + 1, output pin tracks the input voltage minus the dropout voltage based on the load current.
Reverse-Current Protection (RCP)
The TPL9052 series provide the reverse-current protection (RCP) to prevent output reverse current. If large
capacitors are used at the output, there would be large reverse current when the input voltage is lower than
output voltage. The TPL9052 series can shut off the regulator and body diode path to prevent the device
damaged from reverse current fault.
Current Limit
The TPL9052 series integrate an internal current limit that helps to protect the regulator during fault conditions.
When the output is shorted, the LDO supplies a typical current of 100 mA. Output voltage is not regulated when
the device is in current limit, and VOUT = ICL × RLOAD.
Thermal Shutdown
During normal operation, LDO junction temperature should not exceed 125°C. When the junction temperature
exceeds the thermal-shutdown threshold, the LDO shuts down the output immediately. Until when the junction
temperature falls below the value of thermal-shutdown threshold minus thermal-shutdown hysteresis, the output
turns on again.
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13 / 21
Rev.A.1
TPL9052 Series
500-mA High PSRR, Ultra-low Noise LDO
Application and Implementation
NOTE
Information in the following applications sections is not part of the 3PEAK’s component specification and
3PEAK does not warrant its accuracy or completeness. 3PEAK’s customers are responsible for determining
suitability of components for their purposes. Customers should validate and test their design implementation
to confirm system functionality.
Application Information
The TPL9052 devices are a series of 500-mA high PSRR, ultra-low noise, low-dropout linear regulators. The
following application schematic shows a typical usage of the TPL9052 series.
Typical Application
Figure 14 shows the typical application schematic of the TPL9052 series.
Input
Output
VOUT
VIN
CIN
COUT
TPL9052
Off On
EN
GND
Figure 14 TPL9052 Typical Application Circuit
Input Capacitor and Output Capacitor
3PEAK recommends adding a 1 μF or greater capacitor with a 0.1 μF bypass capacitor in parallel at IN pin to
keep the input voltage stable. The voltage rating of the capacitors must be greater than the maximum input
voltage.
To ensure loop stability, the TPL9052 series require an output capacitor of 1 μF or greater. 3PEAK recommends
selecting a X5R- or X7R-type ceramic capacitor with low ESR over temperature.
Both input capacitors and output capacitors must be placed as close to the device pins as possible.
Power Dissipation
During normal operation, LDO junction temperature should not exceed 125°C. Using below equations to
calculate the power dissipation and estimate the junction temperature.
The power dissipation can be calculated using Equation 1.
PD = ( VIN − VOUT ) IOUT + VIN IGND
(1)
The junction temperature can be estimated using Equation 2. θJA is the junction-to-ambient thermal resistance.
TJ = TA + PD JA
www.3peakic.com.cn
(2)
14 / 21
Rev.A.1
TPL9052 Series
500-mA High PSRR, Ultra-low Noise LDO
Layout
Layout Guideline
Both input capacitors and output capacitors must be placed as close to the device pins as possible.
It is recommended to bypass the input pin to ground with a 0.1 μF bypass capacitor. The loop area
formed by the bypass capacitor connection, IN pin and the GND pin of the system must be as small as
possible.
It is recommended to use wide trace lengths or thick copper weight to minimize I×R drop and heat
dissipation.
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15 / 21
Rev.A.1
TPL9052 Series
500-mA High PSRR, Ultra-low Noise LDO
Tape and Reel Information
Package
D1
(mm)
W1
(mm)
A0
(mm)
B0
(mm)
K0
(mm)
P0
(mm)
W0
(mm)
Pin1
Quadrant
TPL9052xx-S5TR (1)
SOT23-5
180.0
13.1
3.2
3.2
1.4
4.0
8.0
Q3
TPL9052xx-DF1R (2)
DFN1X1-4
180.0
10.0
1.16
1.16
0.5
2.0
8.0
Q1
TPL905228-DF1R
DFN1X1-4
180.0
10.0
1.16
1.16
0.5
2.0
8.0
Q2
TPL905229-DF1R
DFN1X1-4
180.0
10.0
1.16
1.16
0.5
2.0
8.0
Q2
Order Number
(1) Output voltage value, xx = 09 to 50. e.g., 33 means 3.3 V output voltage.
(2) Output voltage 2.8 V and 2.9 V are not included.
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16 / 21
Rev.A.1
TPL9052 Series
500-mA High PSRR, Ultra-low Noise LDO
Package Outline Dimensions
SOT23-5
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17 / 21
Rev.A.1
TPL9052 Series
500-mA High PSRR, Ultra-low Noise LDO
DFN1X1-4
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18 / 21
Rev.A.1
TPL9052 Series
500-mA High PSRR, Ultra-low Noise LDO
Order Information
Operating Temperature
Range
Package
Marking
Information
MSL
Transport Media, Quantity
Eco Plan
TPL905209-S5TR (1)
−40°C to +125°C
SOT23-5
L8D
MSL3
Tape and Reel, 3,000
Green
TPL905210-S5TR
(1)
−40°C to +125°C
SOT23-5
L8E
MSL3
Tape and Reel, 3,000
Green
TPL905211-S5TR
(1)
−40°C to +125°C
SOT23-5
L8F
MSL3
Tape and Reel, 3,000
Green
TPL905212-S5TR
−40°C to +125°C
SOT23-5
L8G
MSL3
Tape and Reel, 3,000
Green
TPL905213-S5TR (1)
−40°C to +125°C
SOT23-5
L8H
MSL3
Tape and Reel, 3,000
Green
TPL905215-S5TR
−40°C to +125°C
SOT23-5
L8I
MSL3
Tape and Reel, 3,000
Green
−40°C to +125°C
SOT23-5
L8J
MSL3
Tape and Reel, 3,000
Green
Order Number
TPL905216-S5TR
(1)
TPL905218-S5TR
−40°C to +125°C
SOT23-5
L8K
MSL3
Tape and Reel, 3,000
Green
TPL905219-S5TR
(1)
−40°C to +125°C
SOT23-5
L8L
MSL3
Tape and Reel, 3,000
Green
TPL905221-S5TR
(1)
−40°C to +125°C
SOT23-5
L8M
MSL3
Tape and Reel, 3,000
Green
TPL905222-S5TR (1)
−40°C to +125°C
SOT23-5
L8N
MSL3
Tape and Reel, 3,000
Green
TPL905224-S5TR (1)
−40°C to +125°C
SOT23-5
L8O
MSL3
Tape and Reel, 3,000
Green
TPL905225-S5TR
−40°C to +125°C
SOT23-5
L8P
MSL3
Tape and Reel, 3,000
Green
TPL905226-S5TR
(1)
−40°C to +125°C
SOT23-5
L8Q
MSL3
Tape and Reel, 3,000
Green
TPL905227-S5TR
(1)
−40°C to +125°C
SOT23-5
L8R
MSL3
Tape and Reel, 3,000
Green
TPL905228-S5TR
−40°C to +125°C
SOT23-5
L8T
MSL3
Tape and Reel, 3,000
Green
TPL905229-S5TR
−40°C to +125°C
SOT23-5
L8V
MSL3
Tape and Reel, 3,000
Green
TPL905230-S5TR
−40°C to +125°C
SOT23-5
L8W
MSL3
Tape and Reel, 3,000
Green
TPL905231-S5TR (1)
−40°C to +125°C
SOT23-5
L8X
MSL3
Tape and Reel, 3,000
Green
(1)
−40°C to +125°C
SOT23-5
L8Y
MSL3
Tape and Reel, 3,000
Green
−40°C to +125°C
SOT23-5
L8Z
MSL3
Tape and Reel, 3,000
Green
−40°C to +125°C
SOT23-5
L81
MSL3
Tape and Reel, 3,000
Green
TPL905232-S5TR
TPL905233-S5TR
TPL905235-S5TR
(1)
www.3peakic.com.cn
19 / 21
Rev.A.1
TPL9052 Series
500-mA High PSRR, Ultra-low Noise LDO
Order Number
TPL905236-S5TR
Operating Temperature
Range
Package
Marking
Information
MSL
Transport Media, Quantity
Eco Plan
−40°C to +125°C
SOT23-5
L82
MSL3
Tape and Reel, 3,000
Green
(1)
−40°C to +125°C
SOT23-5
L83
MSL3
Tape and Reel, 3,000
Green
TPL905240-S5TR (1)
−40°C to +125°C
SOT23-5
L84
MSL3
Tape and Reel, 3,000
Green
TPL905245-S5TR
TPL905237-S5TR
−40°C to +125°C
SOT23-5
L85
MSL3
Tape and Reel, 3,000
Green
TPL905250-S5TR
(1)
−40°C to +125°C
SOT23-5
L86
MSL3
Tape and Reel, 3,000
Green
TPL905209-DF1R
(1)
−40°C to +125°C
DFN1X1-4
L8D
MSL3
Tape and Reel, 3,000
Green
TPL905210-DF1R
(1)
−40°C to +125°C
DFN1X1-4
L8E
MSL3
Tape and Reel, 3,000
Green
TPL905211-DF1R
(1)
−40°C to +125°C
DFN1X1-4
L8F
MSL3
Tape and Reel, 3,000
Green
TPL905212-DF1R (1)
−40°C to +125°C
DFN1X1-4
L8G
MSL3
Tape and Reel, 3,000
Green
TPL905213-DF1R (1)
−40°C to +125°C
DFN1X1-4
L8H
MSL3
Tape and Reel, 3,000
Green
TPL905215-DF1R (1)
−40°C to +125°C
DFN1X1-4
L8I
MSL3
Tape and Reel, 3,000
Green
(1)
−40°C to +125°C
DFN1X1-4
L8J
MSL3
Tape and Reel, 3,000
Green
TPL905216-DF1R
TPL905218-DF1R
−40°C to +125°C
DFN1X1-4
L8K
MSL3
Tape and Reel, 3,000
Green
TPL905219-DF1R
(1)
−40°C to +125°C
DFN1X1-4
L8L
MSL3
Tape and Reel, 3,000
Green
TPL905221-DF1R
(1)
−40°C to +125°C
DFN1X1-4
L8M
MSL3
Tape and Reel, 3,000
Green
TPL905222-DF1R (1)
−40°C to +125°C
DFN1X1-4
L8N
MSL3
Tape and Reel, 3,000
Green
TPL905224-DF1R (1)
−40°C to +125°C
DFN1X1-4
L8O
MSL3
Tape and Reel, 3,000
Green
TPL905225-DF1R
−40°C to +125°C
DFN1X1-4
L8P
MSL3
Tape and Reel, 3,000
Green
TPL905226-DF1R
(1)
−40°C to +125°C
DFN1X1-4
L8Q
MSL3
Tape and Reel, 3,000
Green
TPL905227-DF1R
(1)
−40°C to +125°C
DFN1X1-4
L8R
MSL3
Tape and Reel, 3,000
Green
TPL905228-DF1R
(1)
−40°C to +125°C
DFN1X1-4
L8T
MSL3
Tape and Reel, 3,000
Green
TPL905229-DF1R
−40°C to +125°C
DFN1X1-4
L8V
MSL3
Tape and Reel, 3,000
Green
TPL905230-DF1R
−40°C to +125°C
DFN1X1-4
L8W
MSL3
Tape and Reel, 3,000
Green
TPL905231-DF1R
−40°C to +125°C
DFN1X1-4
L8X
MSL3
Tape and Reel, 3,000
Green
www.3peakic.com.cn
20 / 21
Rev.A.1
TPL9052 Series
500-mA High PSRR, Ultra-low Noise LDO
Order Number
Operating Temperature
Range
Package
Marking
Information
MSL
Transport Media, Quantity
Eco Plan
TPL905232-DF1R (1)
−40°C to +125°C
DFN1X1-4
L8Y
MSL3
Tape and Reel, 3,000
Green
TPL905233-DF1R
−40°C to +125°C
DFN1X1-4
L8Z
MSL3
Tape and Reel, 3,000
Green
TPL905235-DF1R (1)
−40°C to +125°C
DFN1X1-4
L81
MSL3
Tape and Reel, 3,000
Green
TPL905236-DF1R (1)
−40°C to +125°C
DFN1X1-4
L82
MSL3
Tape and Reel, 3,000
Green
TPL905237-DF1R
(1)
−40°C to +125°C
DFN1X1-4
L83
MSL3
Tape and Reel, 3,000
Green
TPL905240-DF1R
(1)
−40°C to +125°C
DFN1X1-4
L84
MSL3
Tape and Reel, 3,000
Green
TPL905245-DF1R
(1)
−40°C to +125°C
DFN1X1-4
L85
MSL3
Tape and Reel, 3,000
Green
TPL905250-DF1R
(1)
−40°C to +125°C
DFN1X1-4
L86
MSL3
Tape and Reel, 3,000
Green
(1) Future product, contact 3PEAK factory for more information and sample.
(2) Green: 3PEAK defines "Green" to mean RoHS compatible and free of halogen substances.
3PEAK and the 3PEAK logo are registered trademarks of 3PEAK INCORPORATED. All other trademarks are the
property of their respective owners.
www.3peakic.com.cn
21 / 21
Rev.A.1
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